os/kernelhwsrv/kernel/eka/memmodel/epoc/flexible/mmu/arm/xmmu.cia
author sl@SLION-WIN7.fritz.box
Fri, 15 Jun 2012 03:10:57 +0200
changeset 0 bde4ae8d615e
permissions -rw-r--r--
First public contribution.
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// Copyright (c) 1997-2009 Nokia Corporation and/or its subsidiary(-ies).
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// All rights reserved.
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// This component and the accompanying materials are made available
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// under the terms of the License "Eclipse Public License v1.0"
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// which accompanies this distribution, and is available
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// at the URL "http://www.eclipse.org/legal/epl-v10.html".
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//
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// Initial Contributors:
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// Nokia Corporation - initial contribution.
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//
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// Contributors:
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//
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// Description:
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//
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#include <arm_mem.h>
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#include "execs.h"
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__NAKED__ TUint32 TTCR()
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	{
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	asm("mrc p15, 0, r0, c2, c0, 2 ");
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	asm("and r0, r0, #7 ");	// only bottom 3 bits are defined
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	__JUMP(,lr);
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	}
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__NAKED__ TUint32 CPUID(TInt /*aRegNum*/)
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	{
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	asm("movs r1, r0");
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	asm("mrcmi p15, 0, r0, c0, c0, 0 "); // for -ve reg, return old CPUID register
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	asm("mrceq p15, 0, r0, c0, c1, 0 ");
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	asm("subs r1, r1, #1");
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	asm("mrceq p15, 0, r0, c0, c1, 1 ");
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	asm("subs r1, r1, #1");
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	asm("mrceq p15, 0, r0, c0, c1, 2 ");
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	asm("subs r1, r1, #1");
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	asm("mrceq p15, 0, r0, c0, c1, 3 ");
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	asm("subs r1, r1, #1");
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	asm("mrceq p15, 0, r0, c0, c1, 4 ");
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	asm("subs r1, r1, #1");
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	asm("mrceq p15, 0, r0, c0, c1, 5 ");
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	asm("subs r1, r1, #1");
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	asm("mrceq p15, 0, r0, c0, c1, 6 ");
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	asm("subs r1, r1, #1");
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	asm("mrceq p15, 0, r0, c0, c1, 7 ");
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	asm("subs r1, r1, #1");
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	asm("mrceq p15, 0, r0, c0, c2, 0 ");
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	asm("subs r1, r1, #1");
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	asm("mrceq p15, 0, r0, c0, c2, 1 ");
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	asm("subs r1, r1, #1");
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	asm("mrceq p15, 0, r0, c0, c2, 2 ");
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	asm("subs r1, r1, #1");
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	asm("mrceq p15, 0, r0, c0, c2, 3 ");
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	asm("subs r1, r1, #1");
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	asm("mrceq p15, 0, r0, c0, c2, 4 ");
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	asm("subs r1, r1, #1");
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	asm("mrceq p15, 0, r0, c0, c2, 5 ");
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	asm("subs r1, r1, #1");
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	asm("mrceq p15, 0, r0, c0, c2, 6 ");
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	asm("subs r1, r1, #1");
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	asm("mrceq p15, 0, r0, c0, c2, 7 ");
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	__JUMP(,lr);
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	}
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__NAKED__ void UnlockIPCAlias()
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	{
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	asm("mrc p15, 0, r0, c3, c0, 0 ");
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	asm("orr r0, r0, #%a0 " : : "i" (1 << (2*KIPCAliasDomain)));	// Allow client access to Alias mappings
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	asm("mcr p15, 0, r0, c3, c0, 0 ");
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	__INST_SYNC_BARRIER_Z__(r0);
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	__JUMP(,lr);
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	}
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__NAKED__ void LockIPCAlias()
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	{
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	asm("mrc p15, 0, r0, c3, c0, 0 ");
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	asm("bic r0, r0, #%a0 " : : "i" (3 << (2*KIPCAliasDomain)));	// Prevent access to Alias mappings
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	asm("mcr p15, 0, r0, c3, c0, 0 ");
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	__INST_SYNC_BARRIER_Z__(r0);
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	__JUMP(,lr);
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	}
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__NAKED__ void M::LockUserMemory()
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	{
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	USER_MEMORY_GUARD_ON(,r0,r0);		// Prevent access to User mappings in domain 15
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	__JUMP(,lr);
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	}
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__NAKED__ void M::UnlockUserMemory()
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	{
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	USER_MEMORY_GUARD_OFF(,r0,r0);		// Allow access to User mappings in domain 15
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	__JUMP(,lr);
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	}
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__NAKED__ void UserWriteFault(TLinAddr /*aAddr*/)
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	{
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	asm("strbt r1,[r0]");
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	__JUMP(,lr);
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	}
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__NAKED__ void UserReadFault(TLinAddr  /*aAddr*/)
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	{	
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	asm("ldrbt r1,[r0]");
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	__JUMP(,lr);
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	}
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extern "C" __NAKED__ void __e32_instruction_barrier()
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	{
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	__INST_SYNC_BARRIER_Z__(r0);
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	__JUMP(,lr);
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	}
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