| author | sl@SLION-WIN7.fritz.box |
| Fri, 15 Jun 2012 03:10:57 +0200 | |
| changeset 0 | bde4ae8d615e |
| permissions | -rw-r--r-- |
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// Copyright (c) 2004-2009 Nokia Corporation and/or its subsidiary(-ies). |
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// All rights reserved. |
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// This component and the accompanying materials are made available |
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// under the terms of the License "Eclipse Public License v1.0" |
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// which accompanies this distribution, and is available |
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// at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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// |
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// Initial Contributors: |
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// Nokia Corporation - initial contribution. |
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// |
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// Contributors: |
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// |
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// Description: |
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// |
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|
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|
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|
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/** |
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@file |
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@internalComponent |
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@released |
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*/ |
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|
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#ifndef D_RMD_STEPPING_INL |
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#define D_RMD_STEPPING_INL |
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|
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// |
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// IsBitSet |
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// |
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// Returns 1 if the bit 'aNum' is set within aBitset, 0 otherwise |
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inline TUint32 DRMDStepping::IsBitSet(const TUint32 aBitset, const TUint8 aNum) |
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{
|
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return (aBitset & (1 << aNum) ); |
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} |
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|
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// |
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// BitCount |
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// |
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// Count number of bits in aVal |
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inline TUint32 DRMDStepping::BitCount(const TUint32 aVal) |
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{
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TUint32 num = 0; |
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|
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for(TInt i = 0; i < 32; i++) |
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{
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if ((1 << i) & aVal) |
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{
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num++; |
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} |
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} |
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return num; |
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} |
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|
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// |
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// Thumb2 opcode decoding |
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// |
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// Special data instructions and branch and exchange. |
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// |
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// Returns Opcode as defined in ARM ARM DDI0406A, section A6.2.3 |
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inline TUint16 DRMDStepping::t2opcode16special(const TUint16 aInst) |
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{
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TUint8 aVal = (aInst & 0x03C0) >> 5; |
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|
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return aVal; |
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} |
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|
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|
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// Thumb2 opcode decoding instructions |
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// |
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// Returns Opcode as defined in ARM ARM DDI0406A, section A6.2 |
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// 16-bit Thumb instruction encoding |
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inline TUint16 DRMDStepping::t2opcode16(const TUint16 aInst) |
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{
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TUint16 aVal = (aInst & 0xFC00) >> 9; |
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|
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return aVal; |
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} |
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|
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// ARM opcode decoding functions |
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inline TUint32 DRMDStepping::arm_opcode(const TUint32 aInst) |
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{
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// #define ARM_OPCODE(x) (((TUint32)(x) & 0x0E000000) >> 25) |
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|
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TUint32 aVal = ((aInst) & 0x0E000000) >> 25; |
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|
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return aVal; |
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} |
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|
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inline TUint32 DRMDStepping:: arm_rm(const TUint32 aInst) |
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{
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//#define ARM_RM(x) ((TUint32)(x) & 0x0000000F) // bit 0- 4 |
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|
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TUint32 aVal = (aInst) & 0x0000000F; |
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|
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return aVal; |
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} |
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|
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inline TUint32 DRMDStepping:: arm_rs(const TUint32 aInst) |
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{
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//#define ARM_RS(x) (((TUint32)(x) & 0x00000F00) >> 8) // bit 8-11 |
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|
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TUint32 aVal = ((aInst) & 0x00000F00) >> 8; |
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|
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return aVal; |
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} |
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|
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inline TUint32 DRMDStepping:: arm_rd(const TUint32 aInst) |
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{
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//#define ARM_RD(x) (((TUint32)(x) & 0x0000F000) >> 12) // bit 12-15 |
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|
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TUint32 aVal = ((aInst) & 0x0000F000) >> 12; |
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|
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return aVal; |
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} |
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|
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inline TUint32 DRMDStepping:: arm_rn(const TUint32 aInst) |
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{
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//#define ARM_RN(x) (((TUint32)(x) & 0x000F0000) >> 16) // bit 16-19 |
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|
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TUint32 aVal = ((aInst) & 0x000F0000) >> 16; |
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|
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return aVal; |
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} |
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|
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inline TUint32 DRMDStepping::arm_load(const TUint32 aInst) |
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{
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//#define ARM_LOAD(x) (((TUint32)(x) & 0x00100000) >> 20) // bit 20 |
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|
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TUint32 aVal = ((aInst) & 0x00100000) >> 20; |
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|
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return aVal; |
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} |
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|
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// Data processing instruction defines |
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inline TUint32 DRMDStepping::arm_data_shift(const TUint32 aInst) |
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{
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//#define ARM_DATA_SHIFT(x) (((TUint32)(x) & 0x00000060) >> 5) // bit 5- 6 |
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|
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TUint32 aVal = ((aInst) & 0x00000060) >> 5; |
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return aVal; |
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} |
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|
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inline TUint32 DRMDStepping::arm_data_c(const TUint32 aInst) |
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{
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//#define ARM_DATA_C(x) (((TUint32)(x) & 0x00000F80) >> 7) // bit 7-11 |
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|
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TUint32 aVal = ((aInst) & 0x00000F80) >> 7; |
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return aVal; |
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} |
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|
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inline TUint32 DRMDStepping::arm_data_imm(const TUint32 aInst) |
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{
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//#define ARM_DATA_IMM(x) ((TUint32)(x) & 0x000000FF) // bit 0-7 |
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|
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TUint32 aVal = (aInst) & 0x000000FF; |
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return aVal; |
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} |
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|
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inline TUint32 DRMDStepping::arm_data_rot(const TUint32 aInst) |
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{
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//#define ARM_DATA_ROT(x) (((TUint32)(x) & 0x00000F00) >> 8) // bit 8-11 |
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|
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TUint32 aVal = ((aInst) & 0x00000F00) >> 8; |
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|
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return aVal; |
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} |
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|
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// Single date transfer instruction defines |
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inline TUint32 DRMDStepping::arm_single_imm(const TUint32 aInst) |
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{
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//#define ARM_SINGLE_IMM(x) ((TUint32)(x) & 0x00000FFF) // bit 0-11 |
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|
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TUint32 aVal = (aInst) & 0x00000FFF; |
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return aVal; |
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} |
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|
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inline TUint32 DRMDStepping::arm_single_byte(const TUint32 aInst) |
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{
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//#define ARM_SINGLE_BYTE(x) (((TUint32)(x) & 0x00400000) >> 22) // bit 22 |
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|
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TUint32 aVal = ((aInst) & 0x00400000) >> 22; |
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return aVal; |
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} |
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|
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inline TUint32 DRMDStepping::arm_single_u(const TUint32 aInst) |
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{
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//#define ARM_SINGLE_U(x) (((TUint32)(x) & 0x00800000) >> 23) // bit 23 |
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|
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TUint32 aVal = ((aInst) & 0x00800000) >> 23; |
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return aVal; |
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} |
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|
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inline TUint32 DRMDStepping::arm_single_pre(const TUint32 aInst) |
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{
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//#define ARM_SINGLE_PRE(x) (((TUint32)(x) & 0x01000000) >> 24) // bit 24 |
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|
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TUint32 aVal = ((aInst) & 0x01000000) >> 24; |
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return aVal; |
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} |
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|
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// Block data transfer instruction defines |
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inline TUint32 DRMDStepping::arm_block_reglist(const TUint32 aInst) |
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{
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//#define ARM_BLOCK_REGLIST(x) ((TUint32)(x) & 0x0000FFFF) // bit 0-15 |
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|
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TUint32 aVal = (aInst) & 0x0000FFFF; |
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return aVal; |
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} |
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|
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inline TUint32 DRMDStepping::arm_block_u(const TUint32 aInst) |
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{
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//#define ARM_BLOCK_U(x) (((TUint32)(x) & 0x00800000) >> 23) // bit 23 |
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TUint32 aVal = ((aInst) & 0x00800000) >> 23; |
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return aVal; |
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} |
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|
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inline TUint32 DRMDStepping::arm_block_pre(const TUint32 aInst) |
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{
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//#define ARM_BLOCK_PRE(x) (((TUint32)(x) & 0x01000000) >> 24) // bit 24 |
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|
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TUint32 aVal = ((aInst) & 0x01000000) >> 24; |
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return aVal; |
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} |
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|
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// Branch instruction defines |
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inline TUint32 DRMDStepping::arm_b_addr(const TUint32 aInst) |
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{
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//#define ARM_B_ADDR(x) ((x & 0x00800000) ? ((TUint32)(x) & 0x00FFFFFF | 0xFF000000) : (TUint32)(x) & 0x00FFFFFF) |
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|
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TUint32 aVal = ((aInst & 0x00800000) ? ((TUint32)(aInst) & 0x00FFFFFF | 0xFF000000) : (TUint32)(aInst) & 0x00FFFFFF); |
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return aVal; |
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} |
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|
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inline TUint32 DRMDStepping::arm_instr_b_dest(const TUint32 aInst, TUint32& aAddress) |
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{
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//#define ARM_INSTR_B_DEST(x,a) (ARM_B_ADDR(x) << 2) + ((TUint32)(a) + 8) |
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TUint32 aVal = (arm_b_addr(aInst) << 2) + ((TUint32)(aAddress) + 8); |
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return aVal; |
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} |
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|
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inline TUint32 DRMDStepping::thumb_b_addr(const TUint32 aInst) |
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{
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//#define THUMB_B_ADDR(x) ((x & 0x0400) ? ((((TUint32)(x) & 0x07FF)<<11) | (((TUint32)(x) & 0x07FF0000)>>16) | 0xFFC00000) :\ |
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((TUint32)(x) & 0x07FF)<<11) | (((TUint32)(x) & 0x07FF0000)>>16) |
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|
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TUint32 aVal = ((((TUint32)(aInst) & 0x07FF)<<11) | ((TUint32)(aInst) & 0x07FF0000)>>16); |
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|
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return ((aInst & 0x0400) ? (aVal | 0xFFC00000) : aVal); |
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} |
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|
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inline TUint32 DRMDStepping::thumb_instr_b_dest(const TUint32 aInst, TUint32& aAddress) |
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{
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//#define THUMB_INSTR_B_DEST(x,a) (THUMB_B_ADDR(x) << 1) + ((TUint32)(a) + 4) |
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|
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TUint32 aVal = (thumb_b_addr(aInst) << 1) + ((TUint32)(aAddress) + 4); |
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return aVal; |
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} |
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|
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inline TUint32 DRMDStepping::arm_carry_bit(void) |
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{
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//#define ARM_CARRY_BIT 0x20000000 // bit 30 |
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|
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TUint32 aVal = 0x20000000; |
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|
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return aVal; |
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} |
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|
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// Thumb instruction bitmasks |
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inline TUint16 DRMDStepping::thumb_opcode(const TUint16 aInst) |
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{
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// #define THUMB_OPCODE(x) (((TUint16)(x) & 0xF800) >> 11) |
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|
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TUint16 aVal = ((aInst) & 0xF800) >> 11; |
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|
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return aVal; |
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} |
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|
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inline TUint16 DRMDStepping::thumb_inst_7_15(const TUint16 aInst) |
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{
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// #define THUMB_INST_7_15(x) (((TUint16)(x) & 0xFF80) >> 7) |
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|
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TUint16 aVal = ((aInst) & 0xFF80) >> 7; |
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return aVal; |
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} |
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|
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inline TUint16 DRMDStepping::thumb_inst_8_15(const TUint16 aInst) |
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{
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// #define THUMB_INST_8_15(x) (((TUint16)(x) & 0xFF00) >> 8) |
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|
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TUint16 aVal = ((aInst) & 0xFF00) >> 8; |
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return aVal; |
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} |
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|
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#endif // D_RMD_STEPPPING_INL |
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|
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// End of file - d-rmd-stepping.inl |