Symaptic: os/kernelhwsrv/kernel/eka/drivers/debug/rmdebug/d_rmd

     1 // Copyright (c) 2004-2009 Nokia Corporation and/or its subsidiary(-ies).

     2 // All rights reserved.

     3 // This component and the accompanying materials are made available

     4 // under the terms of the License "Eclipse Public License v1.0"

     5 // which accompanies this distribution, and is available

     6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".

     7 //

     8 // Initial Contributors:

     9 // Nokia Corporation - initial contribution.

    10 //

    11 // Contributors:

    12 //

    13 // Description:

    14 //

    18 /**

    19  @file

    20  @internalComponent

    21  @released

    22 */

    24 #ifndef D_RMD_STEPPING_INL

    25 #define D_RMD_STEPPING_INL

    27 //

    28 // IsBitSet

    29 //

    30 // Returns 1 if the bit 'aNum' is set within aBitset, 0 otherwise

    31 inline TUint32 DRMDStepping::IsBitSet(const TUint32 aBitset, const TUint8 aNum)

    32 	{

    33 	return (aBitset & (1 << aNum) );

    34 	}

    36 //

    37 // BitCount

    38 //

    39 // Count number of bits in aVal

    40 inline TUint32 DRMDStepping::BitCount(const TUint32 aVal)

    41 	{

    42 	TUint32 num = 0;

    44 	for(TInt i = 0; i < 32; i++)

    45 		{

    46 		if ((1 << i) & aVal)

    47 			{

    48 			num++;

    49 			}

    50 		}

    51 	return num;

    52 	}

    54 //

    55 // Thumb2 opcode decoding

    56 //

    57 // Special data instructions and branch and exchange.

    58 //

    59 // Returns Opcode as defined in ARM ARM DDI0406A, section A6.2.3

    60 inline TUint16 DRMDStepping::t2opcode16special(const TUint16 aInst)

    61 	{

    62 	TUint8 aVal = (aInst & 0x03C0) >> 5;

    64 	return aVal;

    65 	}

    68 // Thumb2 opcode decoding instructions

    69 //

    70 // Returns Opcode as defined in ARM ARM DDI0406A, section A6.2

    71 // 16-bit Thumb instruction encoding

    72 inline TUint16 DRMDStepping::t2opcode16(const TUint16 aInst)

    73 {

    74 	TUint16 aVal = (aInst & 0xFC00) >> 9;

    76 	return aVal;

    77 }

    79 // ARM opcode decoding functions

    80 inline TUint32 DRMDStepping::arm_opcode(const TUint32 aInst)

    81 {

    82 // #define ARM_OPCODE(x)		(((TUint32)(x) & 0x0E000000) >> 25)

    84 	TUint32 aVal = ((aInst) & 0x0E000000) >> 25;

    86 	return aVal;

    87 }

    89 inline TUint32 DRMDStepping:: arm_rm(const TUint32 aInst)

    90 {

    91 //#define ARM_RM(x)				((TUint32)(x) & 0x0000000F)			// bit 0- 4

    93 	TUint32 aVal = (aInst) & 0x0000000F;

    95 	return aVal;

    96 }

    98 inline TUint32 DRMDStepping:: arm_rs(const TUint32 aInst)

    99 {

   100 //#define ARM_RS(x)				(((TUint32)(x) & 0x00000F00) >> 8)	// bit 8-11

   102 	TUint32 aVal = ((aInst) & 0x00000F00) >> 8;

   104 	return aVal;

   105 }

   107 inline TUint32 DRMDStepping:: arm_rd(const TUint32 aInst)

   108 {

   109 //#define ARM_RD(x)				(((TUint32)(x) & 0x0000F000) >> 12)	// bit 12-15

   111 	TUint32 aVal = ((aInst) & 0x0000F000) >> 12;

   113 	return aVal;

   114 }

   116 inline TUint32 DRMDStepping:: arm_rn(const TUint32 aInst)

   117 {

   118 //#define ARM_RN(x)				(((TUint32)(x) & 0x000F0000) >> 16)	// bit 16-19

   120 	TUint32 aVal = ((aInst) & 0x000F0000) >> 16;

   122 	return aVal;

   123 }

   125 inline TUint32 DRMDStepping::arm_load(const TUint32 aInst)

   126 {

   127 //#define ARM_LOAD(x)				(((TUint32)(x) & 0x00100000) >> 20)	// bit 20

   129 	TUint32 aVal = ((aInst) & 0x00100000) >> 20;

   131 	return aVal;

   132 }

   134 // Data processing instruction defines

   135 inline TUint32 DRMDStepping::arm_data_shift(const TUint32 aInst)

   136 {

   137 //#define ARM_DATA_SHIFT(x)		(((TUint32)(x) & 0x00000060) >> 5) 	// bit 5- 6

   139 	TUint32 aVal = ((aInst) & 0x00000060) >> 5;

   141 	return aVal;

   142 }

   144 inline TUint32 DRMDStepping::arm_data_c(const TUint32 aInst)

   145 {

   146 //#define ARM_DATA_C(x)			(((TUint32)(x) & 0x00000F80) >> 7) 	// bit 7-11

   148 	TUint32 aVal = ((aInst) & 0x00000F80) >> 7;

   150 	return aVal;

   151 }

   153 inline TUint32 DRMDStepping::arm_data_imm(const TUint32 aInst)

   154 {

   155 //#define ARM_DATA_IMM(x)			((TUint32)(x) & 0x000000FF)			// bit 0-7

   157 	TUint32 aVal = (aInst) & 0x000000FF;

   159 	return aVal;

   160 }

   162 inline TUint32 DRMDStepping::arm_data_rot(const TUint32 aInst)

   163 {

   164 //#define ARM_DATA_ROT(x)			(((TUint32)(x) & 0x00000F00) >> 8) 	// bit 8-11

   166 	TUint32 aVal = ((aInst) & 0x00000F00) >> 8;

   168 	return aVal;

   169 }

   171 // Single date transfer instruction defines

   172 inline TUint32 DRMDStepping::arm_single_imm(const TUint32 aInst)

   173 {

   174 //#define ARM_SINGLE_IMM(x)		((TUint32)(x) & 0x00000FFF)			// bit 0-11

   176 	TUint32 aVal = (aInst) & 0x00000FFF;

   178 	return aVal;

   179 }

   181 inline TUint32 DRMDStepping::arm_single_byte(const TUint32 aInst)

   182 {

   183 //#define ARM_SINGLE_BYTE(x)		(((TUint32)(x) & 0x00400000) >> 22)	// bit 22

   185 	TUint32 aVal = ((aInst) & 0x00400000) >> 22;

   187 	return aVal;

   188 }

   190 inline TUint32 DRMDStepping::arm_single_u(const TUint32 aInst)

   191 {

   192 //#define ARM_SINGLE_U(x)			(((TUint32)(x) & 0x00800000) >> 23)	// bit 23

   194 	TUint32 aVal = ((aInst) & 0x00800000) >> 23;

   196 	return aVal;

   197 }

   199 inline TUint32 DRMDStepping::arm_single_pre(const TUint32 aInst)

   200 {

   201 //#define ARM_SINGLE_PRE(x)		(((TUint32)(x) & 0x01000000) >> 24)	// bit 24

   203 	TUint32 aVal = ((aInst) & 0x01000000) >> 24;

   205 	return aVal;

   206 }

   208 // Block data transfer instruction defines

   209 inline TUint32 DRMDStepping::arm_block_reglist(const TUint32 aInst)

   210 {

   211 //#define ARM_BLOCK_REGLIST(x)	((TUint32)(x) & 0x0000FFFF)		// bit 0-15

   213 	TUint32 aVal = (aInst) & 0x0000FFFF;

   215 	return aVal;

   216 }

   218 inline TUint32 DRMDStepping::arm_block_u(const TUint32 aInst)

   219 {

   220 //#define ARM_BLOCK_U(x)			(((TUint32)(x) & 0x00800000) >> 23)	// bit 23

   222 	TUint32 aVal = ((aInst) & 0x00800000) >> 23;

   224 	return aVal;

   225 }

   227 inline TUint32 DRMDStepping::arm_block_pre(const TUint32 aInst)

   228 {

   229 //#define ARM_BLOCK_PRE(x)		(((TUint32)(x) & 0x01000000) >> 24)	// bit 24

   231 	TUint32 aVal = ((aInst) & 0x01000000) >> 24;

   233 	return aVal;

   234 }

   236 // Branch instruction defines

   237 inline TUint32 DRMDStepping::arm_b_addr(const TUint32 aInst)

   238 {

   239 //#define ARM_B_ADDR(x)			((x & 0x00800000) ? ((TUint32)(x) & 0x00FFFFFF | 0xFF000000) : (TUint32)(x) & 0x00FFFFFF)

   241 	TUint32 aVal = ((aInst & 0x00800000) ? ((TUint32)(aInst) & 0x00FFFFFF | 0xFF000000) : (TUint32)(aInst) & 0x00FFFFFF);

   243 	return aVal;

   244 }

   246 inline TUint32 DRMDStepping::arm_instr_b_dest(const TUint32 aInst, TUint32& aAddress)

   247 {

   248 //#define ARM_INSTR_B_DEST(x,a)	(ARM_B_ADDR(x) << 2) + ((TUint32)(a) + 8)

   250 	TUint32 aVal = (arm_b_addr(aInst) << 2) + ((TUint32)(aAddress) + 8);

   252 	return aVal;

   253 }

   255 inline TUint32 DRMDStepping::thumb_b_addr(const TUint32 aInst)

   256 {

   257 //#define THUMB_B_ADDR(x) ((x & 0x0400) ? ((((TUint32)(x) & 0x07FF)<<11) | (((TUint32)(x) & 0x07FF0000)>>16) | 0xFFC00000) :\

   258                                             ((TUint32)(x) & 0x07FF)<<11) | (((TUint32)(x) & 0x07FF0000)>>16)

   260 	TUint32 aVal = ((((TUint32)(aInst) & 0x07FF)<<11) | ((TUint32)(aInst) & 0x07FF0000)>>16);

   262 	return ((aInst & 0x0400) ? (aVal | 0xFFC00000) : aVal);

   263 }

   265 inline TUint32 DRMDStepping::thumb_instr_b_dest(const TUint32 aInst, TUint32& aAddress)

   266 {

   267 //#define THUMB_INSTR_B_DEST(x,a)	(THUMB_B_ADDR(x) << 1) + ((TUint32)(a) + 4)

   269 	TUint32 aVal = (thumb_b_addr(aInst) << 1) + ((TUint32)(aAddress) + 4);

   271 	return aVal;

   272 }

   274 inline TUint32 DRMDStepping::arm_carry_bit(void)

   275 {

   276 //#define ARM_CARRY_BIT			0x20000000	// bit 30

   278 	TUint32 aVal = 0x20000000;

   280 	return aVal;

   281 }

   283 // Thumb instruction bitmasks

   284 inline TUint16 DRMDStepping::thumb_opcode(const TUint16 aInst)

   285 {

   286 //	#define THUMB_OPCODE(x)		(((TUint16)(x) & 0xF800) >> 11)

   288 	TUint16 aVal = ((aInst) & 0xF800) >> 11;

   290 	return aVal;

   291 }

   293 inline TUint16 DRMDStepping::thumb_inst_7_15(const TUint16 aInst)

   294 {

   295 //	#define THUMB_INST_7_15(x)	(((TUint16)(x) & 0xFF80) >> 7)

   297 	TUint16 aVal = ((aInst) & 0xFF80) >> 7;

   299 	return aVal;

   300 }

   302 inline TUint16 DRMDStepping::thumb_inst_8_15(const TUint16 aInst)

   303 {

   304 //	#define THUMB_INST_8_15(x)	(((TUint16)(x) & 0xFF00) >> 8)

   306 	TUint16 aVal = ((aInst) & 0xFF00) >> 8;

   308 	return aVal;

   309 }

   311 #endif	// D_RMD_STEPPPING_INL

   313 // End of file - d-rmd-stepping.inl

author	sl
	Tue, 10 Jun 2014 14:32:02 +0200
changeset 1	260cb5ec6c19
permissions	-rw-r--r--