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// Copyright (c) 1998-2009 Nokia Corporation and/or its subsidiary(-ies).
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// All rights reserved.
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// This component and the accompanying materials are made available
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// under the terms of the License "Eclipse Public License v1.0"
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// which accompanies this distribution, and is available
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// at the URL "http://www.eclipse.org/legal/epl-v10.html".
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//
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// Initial Contributors:
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// Nokia Corporation - initial contribution.
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//
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// Contributors:
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//
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// Description:
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// e32\include\memmodel\epoc\multiple\memmodel.h
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//
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// WARNING: This file contains some APIs which are internal and are subject
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// to change without notice. Such APIs should therefore not be used
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// outside the Kernel and Hardware Services package.
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//
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#ifndef __MEMMODEL_H__
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#define __MEMMODEL_H__
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#include <memmodel/epoc/mmubase/mmubase.h>
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#ifdef __SMP__
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// SubScheduler fields for each processor
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#define i_AliasLinAddr iExtras[0]
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#define i_AliasPdePtr iExtras[1]
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#endif
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/********************************************
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* Dynamic Branch Predictor Support
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********************************************/
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/**
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@internalComponent
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*/
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#ifdef __SMP__
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//#define LastUserSelfMod ((DProcess*&)SubScheduler().iExtras[0])
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#else
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#define LastUserSelfMod ((DProcess*&)TheScheduler.iExtras[0])
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#endif
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/********************************************
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* RAM Defrag Page Table Moving Support
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********************************************/
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/**
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@internalComponent
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*/
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#define AliasRemapOld ((TPhysAddr&)TheScheduler.iExtras[1])
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/**
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@internalComponent
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*/
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#define AliasRemapNew ((TPhysAddr&)TheScheduler.iExtras[2])
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/********************************************
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* Thread Control Block
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********************************************/
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class DMemModelProcess;
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/**
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@internalComponent
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*/
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class DMemModelThread : public DThread
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{
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public:
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TInt Alias(TLinAddr aAddr, DMemModelProcess* aProcess, TInt aSize, TInt aPerm, TLinAddr& aAliasAddr, TInt& aAliasSize);
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void RemoveAlias();
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virtual void DoExit1();
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static void RestoreAddressSpace();
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public:
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TLinAddr iAliasLinAddr; // linear address to access aliased memory (0 means no alias is present).
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TPde* iAliasPdePtr; // Address of PDE which has been modified to make aliased memory accessible.
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TPde iAliasPde; // PDE to store at iAliasPdePtr.
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TInt iAliasOsAsid; // asid for the process whoes memory is aliased.
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SDblQueLink iAliasLink; // link to make TheMmu.iAliasList.
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TLinAddr iAliasTarget; // linear address of the memory which has been aliased
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#ifdef __SMP__
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TInt iCpuRestoreCookie;
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#endif
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};
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/********************************************
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* Process Control Block
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********************************************/
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class DMemModelChunk;
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class DMemModelCodeSegMemory;
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/**
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@internalComponent
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*/
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class DMemModelProcess : public DEpocProcess
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{
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public:
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void Destruct();
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public:
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virtual TInt DoCreate(TBool aKernelProcess, TProcessCreateInfo& aInfo);
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virtual TInt NewChunk(DChunk*& aChunk, SChunkCreateInfo& aInfo, TLinAddr& aRunAddr);
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virtual TInt AddChunk(DChunk* aChunk,TBool isReadOnly);
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virtual TInt NewShPool(DShPool*& aPool, TShPoolCreateInfo& aInfo);
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virtual TInt CreateDataBssStackArea(TProcessCreateInfo& aInfo);
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virtual TInt MapCodeSeg(DCodeSeg* aCodeSeg);
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virtual void UnmapCodeSeg(DCodeSeg* aCodeSeg);
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virtual void RemoveDllData();
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virtual void FinalRelease();
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public:
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virtual TInt GetNewChunk(DMemModelChunk*& aChunk, SChunkCreateInfo& aInfo)=0;
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public:
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TInt AddChunk(DMemModelChunk* aChunk, TLinAddr& aDataSectionBase, TBool isReadOnly);
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TInt AllocateDataSectionBase(DMemModelChunk& aChunk, TUint& aBase);
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TUint8* DataSectionBase(DMemModelChunk* aChunk);
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void RemoveChunk(DMemModelChunk *aChunk);
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void DoRemoveChunk(TInt aIndex);
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TInt ChunkIndex(DMemModelChunk* aChunk,TInt& aPos);
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TInt CreateCodeChunk();
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void FreeCodeChunk();
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TInt CreateDllDataChunk();
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void FreeDllDataChunk();
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TInt CommitDllData(TLinAddr aBase, TInt aSize);
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void DecommitDllData(TLinAddr aBase, TInt aSize);
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TInt MapUserRamCode(DMemModelCodeSegMemory* aMemory, TBool aLoading);
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void UnmapUserRamCode(DMemModelCodeSegMemory* aMemory, TBool aLoading);
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public:
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enum TMemModelProcessAttributes
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{
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ESeparateGlobalSpace=0x40000000,
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EMMProcessAttributesMask = ESeparateGlobalSpace,
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};
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struct SChunkInfo
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{
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DMemModelChunk* iChunk;
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TInt16 iAccessCount;
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TInt16 isReadOnly;
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};
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TInt iChunkCount;
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TInt iChunkAlloc;
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SChunkInfo* iChunks;
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TLinearSection* iLocalSection;
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TInt iOsAsid;
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TPhysAddr iLocalPageDir;
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TPhysAddr iGlobalPageDir;
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TUint32 iAddressCheckMaskR;
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TUint32 iAddressCheckMaskW;
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DMemModelChunk* iCodeChunk;
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DMemModelChunk* iDllDataChunk;
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TInt iSelfModChunks;
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public:
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friend class Monitor;
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};
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/********************************************
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* Chunk Control Block
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********************************************/
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/**
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@internalComponent
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*/
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class DMemModelChunk : public DChunk
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{
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public:
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/**
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@see DChunk::TChunkAttributes for generic attribute flags
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*/
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enum TMemModelChunkAttributes
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{
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EPrivate =0x80000000,
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ECode =0x40000000,
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EAddressAllocDown =0x20000000,
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EAddressRangeMask =0x0f000000,
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EAddressRangeShift =24,
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EAddressLocal =0x00000000,
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EAddressShared =0x01000000,
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EAddressUserGlobal =0x02000000,
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EAddressKernel =0x03000000,
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EAddressFixed =0x04000000,
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EMapTypeMask =0x00c00000,
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EMapTypeLocal =0x00000000,
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EMapTypeGlobal =0x00400000,
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EMapTypeShared =0x00800000,
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EMMChunkAttributesMask = EPrivate|ECode|EAddressAllocDown|EAddressRangeMask|EMapTypeMask,
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};
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public:
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DMemModelChunk();
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void Destruct();
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public:
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virtual TInt Close(TAny* aPtr);
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virtual TInt DoCreate(SChunkCreateInfo& aInfo);
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virtual TInt Adjust(TInt aNewSize);
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virtual TInt AdjustDoubleEnded(TInt aBottom, TInt aTop);
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virtual TInt CheckAccess();
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virtual TInt Commit(TInt aOffset, TInt aSize, TCommitType aCommitType=DChunk::ECommitDiscontiguous, TUint32* aExtraArg=0);
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virtual TInt Allocate(TInt aSize, TInt aGuard=0, TInt aAlign=0);
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virtual TInt Decommit(TInt aOffset, TInt aSize);
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virtual TInt Lock(TInt anOffset, TInt aSize);
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virtual TInt Unlock(TInt anOffset, TInt aSize);
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virtual TInt Address(TInt aOffset, TInt aSize, TLinAddr& aKernelAddress);
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virtual TInt PhysicalAddress(TInt aOffset, TInt aSize, TLinAddr& aKernelAddress, TUint32& aPhysicalAddress, TUint32* aPhysicalPageList=NULL);
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virtual void BTracePrime(TInt aCategory);
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virtual void Substitute(TInt aOffset, TPhysAddr aOldAddr, TPhysAddr aNewAddr);
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virtual TUint8* Base(DProcess* aProcess);
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inline TUint8* Base() const { return DChunk::Base(); }
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public:
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TInt Decommit(TInt aOffset, TInt aSize, TDecommitType aDecommitType);
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void ClaimInitialPages();
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void SetFixedAddress(TLinAddr aAddr, TInt aInitialSize);
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TInt Reserve(TInt aInitialSize);
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TInt DoCommit(TInt aOffset, TInt aSize, TCommitType aCommitType=DChunk::ECommitDiscontiguous, TUint32* aExtraArg=0);
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void DoDecommit(TInt aOffset, TInt aSize, TDecommitType aDecommitType=EDecommitNormal);
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TInt AllocateAddress();
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void ApplyPermissions(TInt aOffset, TInt aSize, TPte aPtePerm);
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TLinearSection* LinearSection();
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TZonePageType GetPageType();
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public:
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virtual TInt SetupPermissions()=0;
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public:
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TBitMapAllocator* iOsAsids; // NULL for local or fully global else list of OS ASIDs
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TPte iPtePermissions;
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TPde iPdePermissions;
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TUint16* iPageTables;
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TBitMapAllocator* iPageBitMap; // NULL if not disconnected chunk
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TBitMapAllocator* iPermanentPageBitMap;
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DMemModelChunk* iKernelMirror;
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public:
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friend class Monitor;
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};
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/********************************************
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* Code segment
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********************************************/
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/**
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@internalComponent
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*/
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class DMemModelCodeSegMemory : public DMmuCodeSegMemory
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{
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public:
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DMemModelCodeSegMemory(DEpocCodeSeg* aCodeSeg);
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~DMemModelCodeSegMemory();
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TInt Create(TCodeSegCreateInfo& aInfo);
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TInt Loaded(TCodeSegCreateInfo& aInfo);
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void Substitute(TInt aOffset, TPhysAddr aOld, TPhysAddr aNew);
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void Destroy();
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public:
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DMemModelProcess* iCreator; // process loading this code segment
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TPhysAddr* iPages; // list of physical pages (iPageCount+iDataPageCount)
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/**
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List of OS ASIDs this code segment is mapped into.
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Protected by RamAllocMutex and System Lock.
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*/
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TBitMapAllocator* iOsAsids;
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TLinAddr* iCopyOfExportDir; // kernel side copy of export directory or NULL
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};
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/**
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@internalComponent
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*/
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class DMemModelCodeSeg: public DEpocCodeSeg
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{
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public:
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DMemModelCodeSeg();
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virtual ~DMemModelCodeSeg();
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virtual TInt DoCreateRam(TCodeSegCreateInfo& aInfo, DProcess* aProcess);
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virtual TInt DoCreateXIP(DProcess* aProcess);
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virtual TInt Loaded(TCodeSegCreateInfo& aInfo);
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virtual void ReadExportDir(TUint32* aDest);
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virtual TBool FindCheck(DProcess* aProcess);
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virtual TBool OpenCheck(DProcess* aProcess);
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virtual void BTracePrime(TInt aCategory);
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inline DMemModelCodeSegMemory* Memory()
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{ return (DMemModelCodeSegMemory*)iMemory; }
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inline TPhysAddr* Pages()
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{ return iMemory!=0 ? Memory()->iPages : (TPhysAddr*)0; }
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291 |
public:
|
|
sl@0
|
292 |
TInt iCodeAllocBase;
|
|
sl@0
|
293 |
TInt iDataAllocBase;
|
|
sl@0
|
294 |
TAny* iKernelData; // only for kernel modules
|
|
sl@0
|
295 |
};
|
|
sl@0
|
296 |
|
|
sl@0
|
297 |
|
|
sl@0
|
298 |
/********************************************
|
|
sl@0
|
299 |
* MMU stuff
|
|
sl@0
|
300 |
********************************************/
|
|
sl@0
|
301 |
|
|
sl@0
|
302 |
/**
|
|
sl@0
|
303 |
@internalComponent
|
|
sl@0
|
304 |
Indicates that corresponding linear address applies to unknown address space.
|
|
sl@0
|
305 |
Common for EMemTypeShared types of chunks with no owning process.
|
|
sl@0
|
306 |
*/
|
|
sl@0
|
307 |
#define UNKNOWN_MAPPING ((TInt)-2)
|
|
sl@0
|
308 |
|
|
sl@0
|
309 |
/**
|
|
sl@0
|
310 |
@internalComponent
|
|
sl@0
|
311 |
Indicates that corresponding linear address applies to global address space.
|
|
sl@0
|
312 |
*/
|
|
sl@0
|
313 |
#define GLOBAL_MAPPING ((const TAny*)-1)
|
|
sl@0
|
314 |
|
|
sl@0
|
315 |
/**
|
|
sl@0
|
316 |
@internalComponent
|
|
sl@0
|
317 |
Indicates that corresponding linear address applies to kernel process (either global or Kernel's local space).
|
|
sl@0
|
318 |
*/
|
|
sl@0
|
319 |
#define KERNEL_MAPPING ((TInt)0)
|
|
sl@0
|
320 |
|
|
sl@0
|
321 |
|
|
sl@0
|
322 |
/**
|
|
sl@0
|
323 |
@internalComponent
|
|
sl@0
|
324 |
*/
|
|
sl@0
|
325 |
class Mmu : public MmuBase
|
|
sl@0
|
326 |
{
|
|
sl@0
|
327 |
public:
|
|
sl@0
|
328 |
enum TFlushFlags {
|
|
sl@0
|
329 |
EFlushDTLB=0x01,
|
|
sl@0
|
330 |
EFlushDCache=0x02,
|
|
sl@0
|
331 |
EFlushITLB=0x04,
|
|
sl@0
|
332 |
EFlushICache=0x08,
|
|
sl@0
|
333 |
EFlushDDecommit=0x80000000,
|
|
sl@0
|
334 |
EFlushDPermChg=0x20000000,
|
|
sl@0
|
335 |
EFlushDMove=0x40000000,
|
|
sl@0
|
336 |
EFlushIPermChg=0x04000000,
|
|
sl@0
|
337 |
EFlushIMove=0x10000000,
|
|
sl@0
|
338 |
EFlushInheritMask=EFlushDPermChg|EFlushDMove|EFlushIPermChg|EFlushIMove,
|
|
sl@0
|
339 |
};
|
|
sl@0
|
340 |
|
|
sl@0
|
341 |
enum TPanic
|
|
sl@0
|
342 |
{
|
|
sl@0
|
343 |
ELocalPageDirBadAsid,
|
|
sl@0
|
344 |
EGlobalPageDirBadAsid,
|
|
sl@0
|
345 |
EPDEBadAsid,
|
|
sl@0
|
346 |
EFreeOsAsidBadAsid,
|
|
sl@0
|
347 |
EOsAsidAllocCreateFailed,
|
|
sl@0
|
348 |
EBadInitialPageAddr,
|
|
sl@0
|
349 |
EAssignPageTableInvalidUsage,
|
|
sl@0
|
350 |
EUserCodeAllocatorCreateFailed,
|
|
sl@0
|
351 |
EDllDataAllocatorCreateFailed,
|
|
sl@0
|
352 |
ERomUserDataAddressInvalid,
|
|
sl@0
|
353 |
ERomUserDataSizeInvalid,
|
|
sl@0
|
354 |
ECreateSharedSectionFailed,
|
|
sl@0
|
355 |
ECreateUserGlobalSectionFailed,
|
|
sl@0
|
356 |
ERemapPageFailed,
|
|
sl@0
|
357 |
ERemapPageTableFailed,
|
|
sl@0
|
358 |
EFixupXPTFailed,
|
|
sl@0
|
359 |
ETempMappingFailed,
|
|
sl@0
|
360 |
EDefragDisablePageFailed,
|
|
sl@0
|
361 |
EDefragFaultWhilstFMHeld,
|
|
sl@0
|
362 |
};
|
|
sl@0
|
363 |
|
|
sl@0
|
364 |
public:
|
|
sl@0
|
365 |
TPde* LocalPageDir(TInt aOsAsid);
|
|
sl@0
|
366 |
TPde* GlobalPageDir(TInt aOsAsid);
|
|
sl@0
|
367 |
TPde& PDE(TLinAddr aAddr, TInt aOsAsid);
|
|
sl@0
|
368 |
TInt NewOsAsid(TBool aSeparateGlobal);
|
|
sl@0
|
369 |
void FreeOsAsid(TInt aOsAsid);
|
|
sl@0
|
370 |
void CreateUserGlobalSection(TLinAddr aBase, TLinAddr aEnd);
|
|
sl@0
|
371 |
TInt CreateGlobalCodeChunk();
|
|
sl@0
|
372 |
|
|
sl@0
|
373 |
// virtual - inherited/overridden from MmuBase
|
|
sl@0
|
374 |
virtual void Init1();
|
|
sl@0
|
375 |
// virtual void Init2();
|
|
sl@0
|
376 |
virtual void DoInit2();
|
|
sl@0
|
377 |
// virtual TBool PteIsPresent(TPte aPte)=0;
|
|
sl@0
|
378 |
// virtual TPhysAddr PtePhysAddr(TPte aPte, TInt aPteIndex)=0;
|
|
sl@0
|
379 |
// virtual TPhysAddr PdePhysAddr(TLinAddr aAddr)=0;
|
|
sl@0
|
380 |
virtual void SetupInitialPageInfo(SPageInfo* aPageInfo, TLinAddr aChunkAddr, TInt aPdeIndex);
|
|
sl@0
|
381 |
virtual void SetupInitialPageTableInfo(TInt aId, TLinAddr aChunkAddr, TInt aNumPtes);
|
|
sl@0
|
382 |
virtual void AssignPageTable(TInt aId, TInt aUsage, TAny* aObject, TLinAddr aAddr, TPde aPdePerm);
|
|
sl@0
|
383 |
virtual TInt UnassignPageTable(TLinAddr aAddr);
|
|
sl@0
|
384 |
// virtual void BootstrapPageTable(TInt aXptId, TPhysAddr aXptPhys, TInt aId, TPhysAddr aPhysAddr)=0;
|
|
sl@0
|
385 |
virtual TInt PageTableId(TLinAddr aAddr);
|
|
sl@0
|
386 |
// virtual TInt BootPageTableId(TLinAddr aAddr, TPhysAddr& aPtPhys)=0;
|
|
sl@0
|
387 |
// virtual void ClearPageTable(TInt aId, TInt aFirstIndex=0)=0;
|
|
sl@0
|
388 |
virtual TPhysAddr LinearToPhysical(TLinAddr aAddr);
|
|
sl@0
|
389 |
virtual TInt LinearToPhysical(TLinAddr aAddr, TInt aSize, TPhysAddr& aPhysicalAddress, TPhysAddr* aPhysicalPageList=NULL);
|
|
sl@0
|
390 |
// virtual void MapRamPages(TInt aId, SPageInfo::TType aType, TAny* aPtr, TUint32 aOffset, const TPhysAddr* aPageList, TInt aNumPages, TPte aPtePerm)=0;
|
|
sl@0
|
391 |
// virtual void MapPhysicalPages(TInt aId, SPageInfo::TType aType, TAny* aPtr, TUint32 aOffset, TPhysAddr aPhysAddr, TInt aNumPages, TPte aPtePerm)=0;
|
|
sl@0
|
392 |
// virtual TInt UnmapPages(TInt aId, TUint32 aAddr, TInt aNumPages, TPhysAddr* aPageList, TBool aSetPagesFree, TInt& aNumPtes, TInt& aNumFree, DProcess* aProcess)=0;
|
|
sl@0
|
393 |
// virtual void ClearRamDrive(TLinAddr aStart)=0;
|
|
sl@0
|
394 |
// virtual TInt PdePtePermissions(TUint& aMapAttr, TPde& aPde, TPte& aPte)=0;
|
|
sl@0
|
395 |
// virtual void Map(TLinAddr aLinAddr, TPhysAddr aPhysAddr, TInt aSize, TPde aPdePerm, TPte aPtePerm, TInt aMapShift)=0;
|
|
sl@0
|
396 |
// virtual void Unmap(TLinAddr aLinAddr, TInt aSize)=0;
|
|
sl@0
|
397 |
// virtual void InitShadowPageTable(TInt aId, TLinAddr aRomAddr, TPhysAddr aOrigPhys)=0;
|
|
sl@0
|
398 |
// virtual void InitShadowPage(TPhysAddr aShadowPhys, TLinAddr aRomAddr)=0;
|
|
sl@0
|
399 |
// virtual void DoUnmapShadowPage(TInt aId, TLinAddr aRomAddr, TPhysAddr aOrigPhys)=0;
|
|
sl@0
|
400 |
// virtual TInt UnassignShadowPageTable(TLinAddr aRomAddr, TPhysAddr aOrigPhys)=0;
|
|
sl@0
|
401 |
// virtual void DoFreezeShadowPage(TInt aId, TLinAddr aRomAddr)=0;
|
|
sl@0
|
402 |
// virtual void FlushShadow(TLinAddr aRomAddr)=0;
|
|
sl@0
|
403 |
// virtual void AssignShadowPageTable(TInt aId, TLinAddr aRomAddr)=0;
|
|
sl@0
|
404 |
// virtual void ClearPages(TInt aNumPages, TPhysAddr* aPageList)=0;
|
|
sl@0
|
405 |
virtual TPte PtePermissions(TChunkType aChunkType)=0;
|
|
sl@0
|
406 |
virtual TInt MoveKernelPage(DChunk* aChunk, TUint32 aOffset, TPhysAddr aOld, TPhysAddr& aNew, TUint aBlockZoneId, TBool aBlockRest);
|
|
sl@0
|
407 |
virtual TInt MoveCodeSegMemoryPage(DMemModelCodeSegMemory* aCodeSegMemory, TUint32 aOffset, TPhysAddr aOld, TPhysAddr& aNew, TUint aBlockZoneId, TBool aBlockRest);
|
|
sl@0
|
408 |
virtual TInt MoveCodeChunkPage(DChunk* aChunk, TUint32 aOffset, TPhysAddr aOld, TPhysAddr& aNew, TUint aBlockZoneId, TBool aBlockRest);
|
|
sl@0
|
409 |
virtual TInt MoveDataChunkPage(DChunk* aChunk, TUint32 aOffset, TPhysAddr aOld, TPhysAddr& aNew, TUint aBlockZoneId, TBool aBlockRest);
|
|
sl@0
|
410 |
|
|
sl@0
|
411 |
// pure virtual - new in Mmu
|
|
sl@0
|
412 |
virtual TInt NewPageDirectory(TInt aOsAsid, TBool aSeparateGlobal, TPhysAddr& aPhysAddr, TInt& aNumPages)=0;
|
|
sl@0
|
413 |
virtual void InitPageDirectory(TInt aOsAsid, TBool aGlobal)=0;
|
|
sl@0
|
414 |
virtual TInt PageTableId(TLinAddr aAddr, TInt aOsAsid)=0;
|
|
sl@0
|
415 |
virtual TPhysAddr LinearToPhysical(TLinAddr aAddr, TInt aOsAsid)=0;
|
|
sl@0
|
416 |
virtual TInt LinearToPhysical(TLinAddr aAddr, TInt aSize, TPhysAddr& aPhysicalAddress, TPhysAddr* aPhysicalPageList, TInt aOsAsid)=0;
|
|
sl@0
|
417 |
virtual TInt PreparePagesForDMA(TLinAddr aAddr, TInt aSize, TInt aOsAsid, TPhysAddr* aPhysicalPageList)=0;
|
|
sl@0
|
418 |
virtual TInt ReleasePagesFromDMA(TPhysAddr* aPhysicalPageList, TInt aPageCount)=0;
|
|
sl@0
|
419 |
virtual void DoAssignPageTable(TInt aId, TLinAddr aAddr, TPde aPdePerm, const TAny* aOsAsids)=0;
|
|
sl@0
|
420 |
virtual void RemapPageTableSingle(TPhysAddr aOld, TPhysAddr aNew, TLinAddr aAddr, TInt aOsAsid)=0;
|
|
sl@0
|
421 |
virtual void RemapPageTableMultiple(TPhysAddr aOld, TPhysAddr aNew, TLinAddr aAddr, const TAny* aOsAsids)=0;
|
|
sl@0
|
422 |
virtual void RemapPageTableGlobal(TPhysAddr aOld, TPhysAddr aNew, TLinAddr aAddr)=0;
|
|
sl@0
|
423 |
virtual void RemapPageTableAliases(TPhysAddr aOld, TPhysAddr aNew)=0;
|
|
sl@0
|
424 |
virtual void DoUnassignPageTable(TLinAddr aAddr, const TAny* aOsAsids)=0;
|
|
sl@0
|
425 |
virtual TPde PdePermissions(TChunkType aChunkType, TBool aRO)=0;
|
|
sl@0
|
426 |
virtual void ApplyTopLevelPermissions(TLinAddr aAddr, TInt aOsAsid, TInt aNumPdes, TPde aPdePerm)=0;
|
|
sl@0
|
427 |
virtual void ApplyPagePermissions(TInt aId, TInt aPageOffset, TInt aNumPages, TPte aPtePerm)=0;
|
|
sl@0
|
428 |
virtual void GenericFlush(TUint32 aMask)=0;
|
|
sl@0
|
429 |
virtual TLinAddr MapTemp(TPhysAddr aPage,TLinAddr aLinAddr, TInt aPages=1)=0;
|
|
sl@0
|
430 |
virtual TLinAddr MapTemp(TPhysAddr aPage,TLinAddr aLinAddr,TInt aPages, TMemoryType aMemType)=0;
|
|
sl@0
|
431 |
virtual TLinAddr MapSecondTemp(TPhysAddr aPage,TLinAddr aLinAddr, TInt aPages=1)=0;
|
|
sl@0
|
432 |
virtual void UnmapTemp()=0;
|
|
sl@0
|
433 |
virtual void UnmapSecondTemp()=0;
|
|
sl@0
|
434 |
virtual TBool ValidateLocalIpcAddress(TLinAddr aAddr,TInt aSize,TBool aWrite)=0;
|
|
sl@0
|
435 |
virtual TInt UnlockRamCachePages(TLinAddr aLinAddr, TInt aNumPages, DProcess* aProcess)=0;
|
|
sl@0
|
436 |
virtual TInt LockRamCachePages(TLinAddr aLinAddr, TInt aNumPages, DProcess* aProcess)=0;
|
|
sl@0
|
437 |
virtual void MapVirtual(TInt aId, TInt aNumPages)=0;
|
|
sl@0
|
438 |
virtual TInt UnmapUnownedPages(TInt aId, TUint32 aAddr, TInt aNumPages, TPhysAddr* aPageList, TLinAddr* aLAPageList, TInt& aNumPtes, TInt& aNumFree, DProcess* aProcess)=0;
|
|
sl@0
|
439 |
virtual TInt UnmapVirtual(TInt aId, TUint32 aAddr, TInt aNumPages, TPhysAddr* aPageList, TBool aSetPagesFree, TInt& aNumPtes, TInt& aNumFree, DProcess* aProcess)=0;
|
|
sl@0
|
440 |
virtual TInt UnmapUnownedVirtual(TInt aId, TUint32 aAddr, TInt aNumPages, TPhysAddr* aPageList, TLinAddr* aLAPageList, TInt& aNumPtes, TInt& aNumFree, DProcess* aProcess)=0;
|
|
sl@0
|
441 |
virtual void RemapPageByAsid(TBitMapAllocator* aOsAsids, TLinAddr aLinAddr, TPhysAddr aOldAddr, TPhysAddr aNewAddr, TPte aPtePerm)=0;
|
|
sl@0
|
442 |
virtual void CacheMaintenanceOnDecommit(const TPhysAddr* aPhysAddr, TInt aPageCount)=0;
|
|
sl@0
|
443 |
virtual void CacheMaintenanceOnDecommit(const TPhysAddr aPhysAddr)=0; // Maintains physical (VIPT & PIPT) cache for pages to be reused.
|
|
sl@0
|
444 |
virtual void CacheMaintenanceOnPreserve(const TPhysAddr* aPhysAddr, TInt aPageCount, TUint iMapAttr)=0;
|
|
sl@0
|
445 |
virtual void CacheMaintenanceOnPreserve(const TPhysAddr aPhysAddr, TUint iMapAttr)=0;
|
|
sl@0
|
446 |
virtual void CacheMaintenanceOnPreserve(TPhysAddr aPhysAddr, TInt aSize, TLinAddr aLinAddr, TUint iMapAttr)=0;
|
|
sl@0
|
447 |
|
|
sl@0
|
448 |
public:
|
|
sl@0
|
449 |
inline static Mmu& Get()
|
|
sl@0
|
450 |
{return *(Mmu*)TheMmu;}
|
|
sl@0
|
451 |
static void Panic(TPanic aPanic);
|
|
sl@0
|
452 |
public:
|
|
sl@0
|
453 |
TInt iNumOsAsids;
|
|
sl@0
|
454 |
TInt iNumGlobalPageDirs;
|
|
sl@0
|
455 |
TBitMapAllocator* iOsAsidAllocator;
|
|
sl@0
|
456 |
TInt iGlobalPdSize;
|
|
sl@0
|
457 |
TInt iGlobalPdShift;
|
|
sl@0
|
458 |
TInt iLocalPdSize;
|
|
sl@0
|
459 |
TInt iLocalPdShift;
|
|
sl@0
|
460 |
TInt iAsidGroupSize; // number of global page directories mapped by a page table
|
|
sl@0
|
461 |
TInt iAsidGroupMask; // number of global page directories mapped by a page table - 1
|
|
sl@0
|
462 |
TInt iAsidGroupShift; // log2(number of global page directories mapped by a page table)
|
|
sl@0
|
463 |
TInt iAliasSize; // minimum allowed spacing between synonyms of any physical address
|
|
sl@0
|
464 |
TInt iAliasMask;
|
|
sl@0
|
465 |
TInt iAliasShift;
|
|
sl@0
|
466 |
TLinAddr iUserLocalBase; // lowest local data address
|
|
sl@0
|
467 |
TLinAddr iUserLocalEnd; // 1+highest local data address (lowest DLL data address)
|
|
sl@0
|
468 |
TLinAddr iUserSharedBase; // lowest shared data address (1+highest DLL data address)
|
|
sl@0
|
469 |
TLinAddr iUserSharedEnd; // 1+highest shared data address (=local PD size)
|
|
sl@0
|
470 |
TLinAddr iDllDataBase;
|
|
sl@0
|
471 |
TInt iMaxDllDataSize;
|
|
sl@0
|
472 |
TLinAddr iUserCodeBase;
|
|
sl@0
|
473 |
TInt iMaxUserCodeSize;
|
|
sl@0
|
474 |
TUint32* iAsidInfo;
|
|
sl@0
|
475 |
TLinAddr iPdeBase;
|
|
sl@0
|
476 |
TPte iPdPtePerm;
|
|
sl@0
|
477 |
TPde iPdPdePerm;
|
|
sl@0
|
478 |
TPte iUserCodeLoadPtePerm;
|
|
sl@0
|
479 |
TPte iKernelCodePtePerm;
|
|
sl@0
|
480 |
TPte iGlobalCodePtePerm;
|
|
sl@0
|
481 |
TUint32 iRamDriveMask;
|
|
sl@0
|
482 |
TLinearSection* iSharedSection;
|
|
sl@0
|
483 |
TLinearSection* iUserGlobalSection;
|
|
sl@0
|
484 |
DMemModelChunk* iGlobalCode;
|
|
sl@0
|
485 |
SDblQue iAliasList;
|
|
sl@0
|
486 |
TInt iTempMapCount;
|
|
sl@0
|
487 |
TInt iSecondTempMapCount;
|
|
sl@0
|
488 |
TPte* iSecondTempPte; // second PTE used for temporary mappings
|
|
sl@0
|
489 |
TLinAddr iSecondTempAddr; // address corresponding to iSecondTempPte
|
|
sl@0
|
490 |
TInt iCacheMaintenanceTempMapAttr; // holds SP_PTE's attr. entry for cache maintenance
|
|
sl@0
|
491 |
// temporary mapping.
|
|
sl@0
|
492 |
public:
|
|
sl@0
|
493 |
friend class Monitor;
|
|
sl@0
|
494 |
friend TPte& PageTableEntry(TLinAddr aLinAddr);
|
|
sl@0
|
495 |
};
|
|
sl@0
|
496 |
|
|
sl@0
|
497 |
|
|
sl@0
|
498 |
/********************************************
|
|
sl@0
|
499 |
* Functions/Data defined in memory model
|
|
sl@0
|
500 |
********************************************/
|
|
sl@0
|
501 |
|
|
sl@0
|
502 |
/**
|
|
sl@0
|
503 |
@internalComponent
|
|
sl@0
|
504 |
*/
|
|
sl@0
|
505 |
class MM
|
|
sl@0
|
506 |
{
|
|
sl@0
|
507 |
public:
|
|
sl@0
|
508 |
enum TMemModelPanic
|
|
sl@0
|
509 |
{
|
|
sl@0
|
510 |
EChunkTransferBadOwner=0,
|
|
sl@0
|
511 |
EChunkDecommitNoPageTable=1,
|
|
sl@0
|
512 |
EChunkTransferAllocAddrFailed=2,
|
|
sl@0
|
513 |
EFsRegisterThread=3,
|
|
sl@0
|
514 |
EClaimInitialPagesBadPageTable=4,
|
|
sl@0
|
515 |
EChunkNotDisconnected1=5,
|
|
sl@0
|
516 |
EChunkNotDisconnected2=6,
|
|
sl@0
|
517 |
EChunkCommitNoPageTable=7,
|
|
sl@0
|
518 |
EProcessDestructChunksRemaining=8,
|
|
sl@0
|
519 |
ECommitInvalidDllDataAddress=9,
|
|
sl@0
|
520 |
EDecommitInvalidDllDataAddress=10,
|
|
sl@0
|
521 |
EChunkApplyPermissions1=11,
|
|
sl@0
|
522 |
EChunkApplyPermissions2=12,
|
|
sl@0
|
523 |
ECodeSegLoadedNotCreator=13,
|
|
sl@0
|
524 |
EChunkBadAddressRange=14,
|
|
sl@0
|
525 |
EPdeAlreadyInUse=15,
|
|
sl@0
|
526 |
EPteAlreadyInUse=16,
|
|
sl@0
|
527 |
EMmuMapNoPageTable=17,
|
|
sl@0
|
528 |
EUnmapBadAlignment=18,
|
|
sl@0
|
529 |
EBootstrapPageTableBadAddr=19,
|
|
sl@0
|
530 |
ETempMappingAlreadyInUse=20,
|
|
sl@0
|
531 |
EDecommitFailed=21,
|
|
sl@0
|
532 |
EPageTableNotFound=22,
|
|
sl@0
|
533 |
EUnexpectedPageType=23,
|
|
sl@0
|
534 |
EOperationNotSupported=24,
|
|
sl@0
|
535 |
EChunkRemapNoPageTable=25,
|
|
sl@0
|
536 |
EChunkRemapUnsupported=26,
|
|
sl@0
|
537 |
ECodeSegRemapWrongPage=27,
|
|
sl@0
|
538 |
EChunkRemapWrongPageTable=28,
|
|
sl@0
|
539 |
ETempMappingNoRoom=29,
|
|
sl@0
|
540 |
};
|
|
sl@0
|
541 |
|
|
sl@0
|
542 |
static void Panic(TMemModelPanic aPanic);
|
|
sl@0
|
543 |
public:
|
|
sl@0
|
544 |
static void Init1();
|
|
sl@0
|
545 |
static void StartCrashDebugger();
|
|
sl@0
|
546 |
public:
|
|
sl@0
|
547 |
static TInt MaxPagesInOneGo;
|
|
sl@0
|
548 |
static DMemModelChunk* SvStackChunk;
|
|
sl@0
|
549 |
static DMemModelChunk* TheRamDriveChunk;
|
|
sl@0
|
550 |
static TBitMapAllocator* UserCodeAllocator;
|
|
sl@0
|
551 |
static TBitMapAllocator* DllDataAllocator;
|
|
sl@0
|
552 |
};
|
|
sl@0
|
553 |
|
|
sl@0
|
554 |
#endif
|