sl@0: // Copyright (c) 1998-2009 Nokia Corporation and/or its subsidiary(-ies).
sl@0: // All rights reserved.
sl@0: // This component and the accompanying materials are made available
sl@0: // under the terms of the License "Eclipse Public License v1.0"
sl@0: // which accompanies this distribution, and is available
sl@0: // at the URL "http://www.eclipse.org/legal/epl-v10.html".
sl@0: //
sl@0: // Initial Contributors:
sl@0: // Nokia Corporation - initial contribution.
sl@0: //
sl@0: // Contributors:
sl@0: //
sl@0: // Description:
sl@0: // e32\include\memmodel\epoc\multiple\memmodel.h
sl@0: // 
sl@0: // WARNING: This file contains some APIs which are internal and are subject
sl@0: //          to change without notice. Such APIs should therefore not be used
sl@0: //          outside the Kernel and Hardware Services package.
sl@0: //
sl@0: 
sl@0: #ifndef __MEMMODEL_H__
sl@0: #define __MEMMODEL_H__
sl@0: #include <memmodel/epoc/mmubase/mmubase.h>
sl@0: 
sl@0: #ifdef __SMP__
sl@0: // SubScheduler fields for each processor
sl@0: #define	i_AliasLinAddr			iExtras[0]
sl@0: #define	i_AliasPdePtr			iExtras[1]
sl@0: #endif
sl@0: 
sl@0: /********************************************
sl@0:  * Dynamic Branch Predictor Support
sl@0:  ********************************************/
sl@0: 
sl@0: /**
sl@0: @internalComponent
sl@0: */
sl@0: #ifdef __SMP__
sl@0: //#define LastUserSelfMod                   ((DProcess*&)SubScheduler().iExtras[0])
sl@0: #else
sl@0: #define LastUserSelfMod                   ((DProcess*&)TheScheduler.iExtras[0])
sl@0: #endif
sl@0: 
sl@0: /********************************************
sl@0:  * RAM Defrag Page Table Moving Support
sl@0:  ********************************************/
sl@0: 
sl@0: /**
sl@0: @internalComponent
sl@0: */
sl@0: #define AliasRemapOld					((TPhysAddr&)TheScheduler.iExtras[1])
sl@0: 
sl@0: /**
sl@0: @internalComponent
sl@0: */
sl@0: #define AliasRemapNew					((TPhysAddr&)TheScheduler.iExtras[2])
sl@0: 
sl@0: /********************************************
sl@0:  * Thread Control Block
sl@0:  ********************************************/
sl@0: 
sl@0: class DMemModelProcess;
sl@0: 
sl@0: /**
sl@0: @internalComponent
sl@0: */
sl@0: class DMemModelThread : public DThread
sl@0: 	{
sl@0: public:
sl@0: 	TInt Alias(TLinAddr aAddr, DMemModelProcess* aProcess, TInt aSize, TInt aPerm, TLinAddr& aAliasAddr, TInt& aAliasSize);
sl@0: 	void RemoveAlias();
sl@0: 	virtual void DoExit1();
sl@0: 	static void RestoreAddressSpace();
sl@0: public:
sl@0: 	TLinAddr iAliasLinAddr;	// linear address to access aliased memory (0 means no alias is present).
sl@0: 	TPde* iAliasPdePtr;		// Address of PDE which has been modified to make aliased memory accessible.
sl@0: 	TPde iAliasPde;			// PDE to store at iAliasPdePtr.
sl@0: 	TInt iAliasOsAsid;		// asid for the process whoes memory is aliased.
sl@0: 	SDblQueLink iAliasLink;	// link to make TheMmu.iAliasList.
sl@0: 	TLinAddr iAliasTarget;	// linear address of the memory which has been aliased
sl@0: #ifdef __SMP__
sl@0: 	TInt iCpuRestoreCookie;
sl@0: #endif
sl@0: 	};
sl@0: 
sl@0: 
sl@0: /********************************************
sl@0:  * Process Control Block
sl@0:  ********************************************/
sl@0: 
sl@0: class DMemModelChunk;
sl@0: class DMemModelCodeSegMemory;
sl@0: 
sl@0: /**
sl@0: @internalComponent
sl@0: */
sl@0: class DMemModelProcess : public DEpocProcess
sl@0: 	{
sl@0: public:
sl@0: 	void Destruct();
sl@0: public:
sl@0: 	virtual TInt DoCreate(TBool aKernelProcess, TProcessCreateInfo& aInfo);
sl@0: 	virtual TInt NewChunk(DChunk*& aChunk, SChunkCreateInfo& aInfo, TLinAddr& aRunAddr);
sl@0: 	virtual TInt AddChunk(DChunk* aChunk,TBool isReadOnly);
sl@0: 	virtual TInt NewShPool(DShPool*& aPool, TShPoolCreateInfo& aInfo);
sl@0: 	virtual TInt CreateDataBssStackArea(TProcessCreateInfo& aInfo);
sl@0: 	virtual TInt MapCodeSeg(DCodeSeg* aCodeSeg);
sl@0: 	virtual void UnmapCodeSeg(DCodeSeg* aCodeSeg);
sl@0: 	virtual void RemoveDllData();
sl@0: 	virtual void FinalRelease();
sl@0: public:
sl@0: 	virtual TInt GetNewChunk(DMemModelChunk*& aChunk, SChunkCreateInfo& aInfo)=0;
sl@0: public:
sl@0: 	TInt AddChunk(DMemModelChunk* aChunk, TLinAddr& aDataSectionBase, TBool isReadOnly);
sl@0: 	TInt AllocateDataSectionBase(DMemModelChunk& aChunk, TUint& aBase);
sl@0: 	TUint8* DataSectionBase(DMemModelChunk* aChunk);
sl@0: 	void RemoveChunk(DMemModelChunk *aChunk);
sl@0: 	void DoRemoveChunk(TInt aIndex);
sl@0: 	TInt ChunkIndex(DMemModelChunk* aChunk,TInt& aPos);
sl@0: 	TInt CreateCodeChunk();
sl@0: 	void FreeCodeChunk();
sl@0: 	TInt CreateDllDataChunk();
sl@0: 	void FreeDllDataChunk();
sl@0: 	TInt CommitDllData(TLinAddr aBase, TInt aSize);
sl@0: 	void DecommitDllData(TLinAddr aBase, TInt aSize);
sl@0: 	TInt MapUserRamCode(DMemModelCodeSegMemory* aMemory, TBool aLoading);
sl@0: 	void UnmapUserRamCode(DMemModelCodeSegMemory* aMemory, TBool aLoading);
sl@0: public:
sl@0: 	enum TMemModelProcessAttributes
sl@0: 		{
sl@0: 		ESeparateGlobalSpace=0x40000000,
sl@0: 		EMMProcessAttributesMask = ESeparateGlobalSpace,
sl@0: 		};
sl@0: 
sl@0: 	struct SChunkInfo
sl@0: 		{
sl@0: 		DMemModelChunk* iChunk;
sl@0: 		TInt16 iAccessCount;
sl@0: 		TInt16 isReadOnly;
sl@0: 		};
sl@0: 
sl@0: 	TInt iChunkCount;
sl@0: 	TInt iChunkAlloc;
sl@0: 	SChunkInfo* iChunks;
sl@0: 	TLinearSection* iLocalSection;
sl@0: 	TInt iOsAsid;
sl@0: 	TPhysAddr iLocalPageDir;
sl@0: 	TPhysAddr iGlobalPageDir;
sl@0: 	TUint32 iAddressCheckMaskR;
sl@0: 	TUint32 iAddressCheckMaskW;
sl@0: 	DMemModelChunk* iCodeChunk;
sl@0: 	DMemModelChunk* iDllDataChunk;
sl@0: 	TInt iSelfModChunks;
sl@0: public:
sl@0: 	friend class Monitor;
sl@0: 	};
sl@0: 
sl@0: 
sl@0: /********************************************
sl@0:  * Chunk Control Block
sl@0:  ********************************************/
sl@0: 
sl@0: /**
sl@0: @internalComponent
sl@0: */
sl@0: class DMemModelChunk : public DChunk
sl@0: 	{
sl@0: public:
sl@0: 	/**
sl@0: 	@see DChunk::TChunkAttributes for generic attribute flags
sl@0: 	*/
sl@0: 	enum TMemModelChunkAttributes
sl@0: 		{
sl@0: 		EPrivate			=0x80000000,
sl@0: 		ECode				=0x40000000,
sl@0: 		EAddressAllocDown	=0x20000000,
sl@0: 
sl@0: 		EAddressRangeMask	=0x0f000000,
sl@0: 		EAddressRangeShift	=24,
sl@0: 		EAddressLocal		=0x00000000,
sl@0: 		EAddressShared		=0x01000000,
sl@0: 		EAddressUserGlobal	=0x02000000,
sl@0: 		EAddressKernel		=0x03000000,
sl@0: 		EAddressFixed		=0x04000000,
sl@0: 
sl@0: 		EMapTypeMask		=0x00c00000,
sl@0: 		EMapTypeLocal		=0x00000000,
sl@0: 		EMapTypeGlobal		=0x00400000,
sl@0: 		EMapTypeShared		=0x00800000,
sl@0: 
sl@0: 		EMMChunkAttributesMask = EPrivate|ECode|EAddressAllocDown|EAddressRangeMask|EMapTypeMask,
sl@0: 		};
sl@0: 	
sl@0: public:
sl@0: 	DMemModelChunk();
sl@0: 	void Destruct();
sl@0: public:
sl@0: 	virtual TInt Close(TAny* aPtr);
sl@0: 	virtual TInt DoCreate(SChunkCreateInfo& aInfo);
sl@0: 	virtual TInt Adjust(TInt aNewSize);
sl@0: 	virtual TInt AdjustDoubleEnded(TInt aBottom, TInt aTop);
sl@0: 	virtual TInt CheckAccess();
sl@0: 	virtual TInt Commit(TInt aOffset, TInt aSize, TCommitType aCommitType=DChunk::ECommitDiscontiguous, TUint32* aExtraArg=0);
sl@0: 	virtual TInt Allocate(TInt aSize, TInt aGuard=0, TInt aAlign=0);
sl@0: 	virtual TInt Decommit(TInt aOffset, TInt aSize);
sl@0: 	virtual TInt Lock(TInt anOffset, TInt aSize);
sl@0: 	virtual TInt Unlock(TInt anOffset, TInt aSize);
sl@0: 	virtual TInt Address(TInt aOffset, TInt aSize, TLinAddr& aKernelAddress);
sl@0: 	virtual TInt PhysicalAddress(TInt aOffset, TInt aSize, TLinAddr& aKernelAddress, TUint32& aPhysicalAddress, TUint32* aPhysicalPageList=NULL);
sl@0: 	virtual void BTracePrime(TInt aCategory);
sl@0: 	virtual void Substitute(TInt aOffset, TPhysAddr aOldAddr, TPhysAddr aNewAddr);
sl@0: 	virtual TUint8* Base(DProcess* aProcess);
sl@0: 	inline TUint8* Base() const { return DChunk::Base(); }
sl@0: public:
sl@0: 	TInt Decommit(TInt aOffset, TInt aSize, TDecommitType aDecommitType);
sl@0: 	void ClaimInitialPages();
sl@0: 	void SetFixedAddress(TLinAddr aAddr, TInt aInitialSize);
sl@0: 	TInt Reserve(TInt aInitialSize);
sl@0: 	TInt DoCommit(TInt aOffset, TInt aSize, TCommitType aCommitType=DChunk::ECommitDiscontiguous, TUint32* aExtraArg=0);
sl@0: 	void DoDecommit(TInt aOffset, TInt aSize, TDecommitType aDecommitType=EDecommitNormal);
sl@0: 	TInt AllocateAddress();
sl@0: 	void ApplyPermissions(TInt aOffset, TInt aSize, TPte aPtePerm);
sl@0: 	TLinearSection* LinearSection();
sl@0: 	TZonePageType GetPageType();
sl@0: 
sl@0: public:
sl@0: 	virtual TInt SetupPermissions()=0;
sl@0: 
sl@0: public:
sl@0: 	TBitMapAllocator* iOsAsids;			// NULL for local or fully global else list of OS ASIDs
sl@0: 	TPte iPtePermissions;
sl@0: 	TPde iPdePermissions;
sl@0: 	TUint16* iPageTables;
sl@0: 	TBitMapAllocator* iPageBitMap;		// NULL if not disconnected chunk
sl@0: 	TBitMapAllocator* iPermanentPageBitMap;
sl@0: 	DMemModelChunk* iKernelMirror;
sl@0: public:
sl@0: 	friend class Monitor;
sl@0: 	};
sl@0: 
sl@0: 
sl@0: /********************************************
sl@0:  * Code segment
sl@0:  ********************************************/
sl@0: 
sl@0: /**
sl@0: @internalComponent
sl@0: */
sl@0: class DMemModelCodeSegMemory : public DMmuCodeSegMemory
sl@0: 	{
sl@0: public:
sl@0: 	DMemModelCodeSegMemory(DEpocCodeSeg* aCodeSeg);
sl@0: 	~DMemModelCodeSegMemory();
sl@0: 	TInt Create(TCodeSegCreateInfo& aInfo);
sl@0: 	TInt Loaded(TCodeSegCreateInfo& aInfo);
sl@0: 	void Substitute(TInt aOffset, TPhysAddr aOld, TPhysAddr aNew);
sl@0: 	void Destroy();
sl@0: public:
sl@0: 	DMemModelProcess* iCreator;	// process loading this code segment
sl@0: 
sl@0: 	TPhysAddr* iPages;			// list of physical pages (iPageCount+iDataPageCount)
sl@0: 
sl@0: 	/**
sl@0: 	List of OS ASIDs this code segment is mapped into.
sl@0: 	Protected by RamAllocMutex and System Lock.
sl@0: 	*/
sl@0: 	TBitMapAllocator* iOsAsids;
sl@0: 
sl@0: 	TLinAddr* iCopyOfExportDir;	// kernel side copy of export directory or NULL
sl@0: 	};
sl@0: 
sl@0: /**
sl@0: @internalComponent
sl@0: */
sl@0: class DMemModelCodeSeg: public DEpocCodeSeg
sl@0: 	{
sl@0: public:
sl@0: 	DMemModelCodeSeg();
sl@0: 	virtual ~DMemModelCodeSeg();
sl@0: 	virtual TInt DoCreateRam(TCodeSegCreateInfo& aInfo, DProcess* aProcess);
sl@0: 	virtual TInt DoCreateXIP(DProcess* aProcess);
sl@0: 	virtual TInt Loaded(TCodeSegCreateInfo& aInfo);
sl@0: 	virtual void ReadExportDir(TUint32* aDest);
sl@0: 	virtual TBool FindCheck(DProcess* aProcess);
sl@0: 	virtual TBool OpenCheck(DProcess* aProcess);
sl@0: 	virtual void BTracePrime(TInt aCategory);
sl@0: 	inline DMemModelCodeSegMemory* Memory()
sl@0: 		{ return (DMemModelCodeSegMemory*)iMemory; }
sl@0: 	inline TPhysAddr* Pages()
sl@0: 		{ return iMemory!=0 ? Memory()->iPages : (TPhysAddr*)0; }
sl@0: public:
sl@0: 	TInt iCodeAllocBase;
sl@0: 	TInt iDataAllocBase;
sl@0: 	TAny* iKernelData;			// only for kernel modules
sl@0: 	};
sl@0: 
sl@0: 
sl@0: /********************************************
sl@0:  * MMU stuff
sl@0:  ********************************************/
sl@0: 
sl@0: /**
sl@0: @internalComponent
sl@0: Indicates that corresponding linear address applies to unknown address space.
sl@0: Common for EMemTypeShared types of chunks with no owning process.
sl@0: */
sl@0: #define	UNKNOWN_MAPPING	((TInt)-2)
sl@0: 
sl@0: /**
sl@0: @internalComponent
sl@0: Indicates that corresponding linear address applies to global address space.
sl@0: */
sl@0: #define	GLOBAL_MAPPING	((const TAny*)-1)
sl@0: 
sl@0: 	/**
sl@0: @internalComponent
sl@0: Indicates that corresponding linear address applies to kernel process (either global or Kernel's local space).
sl@0: */
sl@0: #define	KERNEL_MAPPING	((TInt)0)
sl@0: 	
sl@0: 	
sl@0: /**
sl@0: @internalComponent
sl@0: */
sl@0: class Mmu : public MmuBase
sl@0: 	{
sl@0: public:
sl@0: 	enum TFlushFlags	{
sl@0: 						EFlushDTLB=0x01,
sl@0: 						EFlushDCache=0x02,
sl@0: 						EFlushITLB=0x04,
sl@0: 						EFlushICache=0x08,
sl@0: 						EFlushDDecommit=0x80000000,
sl@0: 						EFlushDPermChg=0x20000000,
sl@0: 						EFlushDMove=0x40000000,
sl@0: 						EFlushIPermChg=0x04000000,
sl@0: 						EFlushIMove=0x10000000,
sl@0: 						EFlushInheritMask=EFlushDPermChg|EFlushDMove|EFlushIPermChg|EFlushIMove,
sl@0: 						};
sl@0: 
sl@0: 	enum TPanic
sl@0: 		{
sl@0: 		ELocalPageDirBadAsid,
sl@0: 		EGlobalPageDirBadAsid,
sl@0: 		EPDEBadAsid,
sl@0: 		EFreeOsAsidBadAsid,
sl@0: 		EOsAsidAllocCreateFailed,
sl@0: 		EBadInitialPageAddr,
sl@0: 		EAssignPageTableInvalidUsage,
sl@0: 		EUserCodeAllocatorCreateFailed,
sl@0: 		EDllDataAllocatorCreateFailed,
sl@0: 		ERomUserDataAddressInvalid,
sl@0: 		ERomUserDataSizeInvalid,
sl@0: 		ECreateSharedSectionFailed,
sl@0: 		ECreateUserGlobalSectionFailed,
sl@0: 		ERemapPageFailed,
sl@0: 		ERemapPageTableFailed,
sl@0: 		EFixupXPTFailed,
sl@0: 		ETempMappingFailed,		
sl@0: 		EDefragDisablePageFailed,
sl@0: 		EDefragFaultWhilstFMHeld,
sl@0: 		};
sl@0: 
sl@0: public:
sl@0: 	TPde* LocalPageDir(TInt aOsAsid);
sl@0: 	TPde* GlobalPageDir(TInt aOsAsid);
sl@0: 	TPde& PDE(TLinAddr aAddr, TInt aOsAsid);
sl@0: 	TInt NewOsAsid(TBool aSeparateGlobal);
sl@0: 	void FreeOsAsid(TInt aOsAsid);
sl@0: 	void CreateUserGlobalSection(TLinAddr aBase, TLinAddr aEnd);
sl@0: 	TInt CreateGlobalCodeChunk();
sl@0: 
sl@0: 	// virtual - inherited/overridden from MmuBase
sl@0: 	virtual void Init1();
sl@0: //	virtual void Init2();
sl@0: 	virtual void DoInit2();
sl@0: //	virtual TBool PteIsPresent(TPte aPte)=0;
sl@0: //	virtual TPhysAddr PtePhysAddr(TPte aPte, TInt aPteIndex)=0;
sl@0: //	virtual TPhysAddr PdePhysAddr(TLinAddr aAddr)=0;
sl@0: 	virtual void SetupInitialPageInfo(SPageInfo* aPageInfo, TLinAddr aChunkAddr, TInt aPdeIndex);
sl@0: 	virtual void SetupInitialPageTableInfo(TInt aId, TLinAddr aChunkAddr, TInt aNumPtes);
sl@0: 	virtual void AssignPageTable(TInt aId, TInt aUsage, TAny* aObject, TLinAddr aAddr, TPde aPdePerm);
sl@0: 	virtual TInt UnassignPageTable(TLinAddr aAddr);
sl@0: //	virtual void BootstrapPageTable(TInt aXptId, TPhysAddr aXptPhys, TInt aId, TPhysAddr aPhysAddr)=0;
sl@0: 	virtual TInt PageTableId(TLinAddr aAddr);
sl@0: //	virtual TInt BootPageTableId(TLinAddr aAddr, TPhysAddr& aPtPhys)=0;
sl@0: //	virtual void ClearPageTable(TInt aId, TInt aFirstIndex=0)=0;
sl@0: 	virtual TPhysAddr LinearToPhysical(TLinAddr aAddr);
sl@0: 	virtual TInt LinearToPhysical(TLinAddr aAddr, TInt aSize, TPhysAddr& aPhysicalAddress, TPhysAddr* aPhysicalPageList=NULL);
sl@0: //	virtual void MapRamPages(TInt aId, SPageInfo::TType aType, TAny* aPtr, TUint32 aOffset, const TPhysAddr* aPageList, TInt aNumPages, TPte aPtePerm)=0;
sl@0: //	virtual void MapPhysicalPages(TInt aId, SPageInfo::TType aType, TAny* aPtr, TUint32 aOffset, TPhysAddr aPhysAddr, TInt aNumPages, TPte aPtePerm)=0;
sl@0: //	virtual TInt UnmapPages(TInt aId, TUint32 aAddr, TInt aNumPages, TPhysAddr* aPageList, TBool aSetPagesFree, TInt& aNumPtes, TInt& aNumFree, DProcess* aProcess)=0;
sl@0: //	virtual void ClearRamDrive(TLinAddr aStart)=0;
sl@0: //	virtual TInt PdePtePermissions(TUint& aMapAttr, TPde& aPde, TPte& aPte)=0;
sl@0: //	virtual void Map(TLinAddr aLinAddr, TPhysAddr aPhysAddr, TInt aSize, TPde aPdePerm, TPte aPtePerm, TInt aMapShift)=0;
sl@0: //	virtual void Unmap(TLinAddr aLinAddr, TInt aSize)=0;
sl@0: //	virtual void InitShadowPageTable(TInt aId, TLinAddr aRomAddr, TPhysAddr aOrigPhys)=0;
sl@0: //	virtual void InitShadowPage(TPhysAddr aShadowPhys, TLinAddr aRomAddr)=0;
sl@0: //	virtual void DoUnmapShadowPage(TInt aId, TLinAddr aRomAddr, TPhysAddr aOrigPhys)=0;
sl@0: //	virtual TInt UnassignShadowPageTable(TLinAddr aRomAddr, TPhysAddr aOrigPhys)=0;
sl@0: //	virtual void DoFreezeShadowPage(TInt aId, TLinAddr aRomAddr)=0;
sl@0: //	virtual void FlushShadow(TLinAddr aRomAddr)=0;
sl@0: //	virtual void AssignShadowPageTable(TInt aId, TLinAddr aRomAddr)=0;
sl@0: //	virtual void ClearPages(TInt aNumPages, TPhysAddr* aPageList)=0;
sl@0: 	virtual TPte PtePermissions(TChunkType aChunkType)=0;
sl@0: 	virtual TInt MoveKernelPage(DChunk* aChunk, TUint32 aOffset, TPhysAddr aOld, TPhysAddr& aNew, TUint aBlockZoneId, TBool aBlockRest);
sl@0: 	virtual TInt MoveCodeSegMemoryPage(DMemModelCodeSegMemory* aCodeSegMemory, TUint32 aOffset, TPhysAddr aOld, TPhysAddr& aNew, TUint aBlockZoneId, TBool aBlockRest);
sl@0: 	virtual TInt MoveCodeChunkPage(DChunk* aChunk, TUint32 aOffset, TPhysAddr aOld, TPhysAddr& aNew, TUint aBlockZoneId, TBool aBlockRest);
sl@0: 	virtual TInt MoveDataChunkPage(DChunk* aChunk, TUint32 aOffset, TPhysAddr aOld, TPhysAddr& aNew, TUint aBlockZoneId, TBool aBlockRest);
sl@0: 
sl@0: 	// pure virtual - new in Mmu
sl@0: 	virtual TInt NewPageDirectory(TInt aOsAsid, TBool aSeparateGlobal, TPhysAddr& aPhysAddr, TInt& aNumPages)=0;
sl@0: 	virtual void InitPageDirectory(TInt aOsAsid, TBool aGlobal)=0;
sl@0: 	virtual TInt PageTableId(TLinAddr aAddr, TInt aOsAsid)=0;
sl@0: 	virtual TPhysAddr LinearToPhysical(TLinAddr aAddr, TInt aOsAsid)=0;
sl@0: 	virtual TInt LinearToPhysical(TLinAddr aAddr, TInt aSize, TPhysAddr& aPhysicalAddress, TPhysAddr* aPhysicalPageList, TInt aOsAsid)=0;
sl@0: 	virtual TInt PreparePagesForDMA(TLinAddr aAddr, TInt aSize, TInt aOsAsid, TPhysAddr* aPhysicalPageList)=0;
sl@0: 	virtual TInt ReleasePagesFromDMA(TPhysAddr* aPhysicalPageList, TInt aPageCount)=0;
sl@0: 	virtual void DoAssignPageTable(TInt aId, TLinAddr aAddr, TPde aPdePerm, const TAny* aOsAsids)=0;
sl@0: 	virtual void RemapPageTableSingle(TPhysAddr aOld, TPhysAddr aNew, TLinAddr aAddr, TInt aOsAsid)=0;
sl@0: 	virtual void RemapPageTableMultiple(TPhysAddr aOld, TPhysAddr aNew, TLinAddr aAddr, const TAny* aOsAsids)=0;
sl@0: 	virtual void RemapPageTableGlobal(TPhysAddr aOld, TPhysAddr aNew, TLinAddr aAddr)=0;
sl@0: 	virtual void RemapPageTableAliases(TPhysAddr aOld, TPhysAddr aNew)=0;
sl@0: 	virtual void DoUnassignPageTable(TLinAddr aAddr, const TAny* aOsAsids)=0;
sl@0: 	virtual TPde PdePermissions(TChunkType aChunkType, TBool aRO)=0;
sl@0: 	virtual void ApplyTopLevelPermissions(TLinAddr aAddr, TInt aOsAsid, TInt aNumPdes, TPde aPdePerm)=0;
sl@0: 	virtual void ApplyPagePermissions(TInt aId, TInt aPageOffset, TInt aNumPages, TPte aPtePerm)=0;
sl@0: 	virtual void GenericFlush(TUint32 aMask)=0;
sl@0: 	virtual TLinAddr MapTemp(TPhysAddr aPage,TLinAddr aLinAddr, TInt aPages=1)=0;
sl@0: 	virtual TLinAddr MapTemp(TPhysAddr aPage,TLinAddr aLinAddr,TInt aPages, TMemoryType aMemType)=0;
sl@0: 	virtual TLinAddr MapSecondTemp(TPhysAddr aPage,TLinAddr aLinAddr, TInt aPages=1)=0;
sl@0: 	virtual void UnmapTemp()=0;
sl@0: 	virtual void UnmapSecondTemp()=0;
sl@0: 	virtual TBool ValidateLocalIpcAddress(TLinAddr aAddr,TInt aSize,TBool aWrite)=0;
sl@0: 	virtual TInt UnlockRamCachePages(TLinAddr aLinAddr, TInt aNumPages, DProcess* aProcess)=0;
sl@0: 	virtual TInt LockRamCachePages(TLinAddr aLinAddr, TInt aNumPages, DProcess* aProcess)=0;
sl@0: 	virtual void MapVirtual(TInt aId, TInt aNumPages)=0;
sl@0: 	virtual TInt UnmapUnownedPages(TInt aId, TUint32 aAddr, TInt aNumPages, TPhysAddr* aPageList, TLinAddr* aLAPageList, TInt& aNumPtes, TInt& aNumFree, DProcess* aProcess)=0;
sl@0: 	virtual TInt UnmapVirtual(TInt aId, TUint32 aAddr, TInt aNumPages, TPhysAddr* aPageList, TBool aSetPagesFree, TInt& aNumPtes, TInt& aNumFree, DProcess* aProcess)=0;
sl@0: 	virtual TInt UnmapUnownedVirtual(TInt aId, TUint32 aAddr, TInt aNumPages, TPhysAddr* aPageList, TLinAddr* aLAPageList, TInt& aNumPtes, TInt& aNumFree, DProcess* aProcess)=0;
sl@0: 	virtual void RemapPageByAsid(TBitMapAllocator* aOsAsids, TLinAddr aLinAddr, TPhysAddr aOldAddr, TPhysAddr aNewAddr, TPte aPtePerm)=0;
sl@0: 	virtual void CacheMaintenanceOnDecommit(const TPhysAddr* aPhysAddr, TInt aPageCount)=0;
sl@0: 	virtual void CacheMaintenanceOnDecommit(const TPhysAddr aPhysAddr)=0; // Maintains physical (VIPT & PIPT) cache for pages to be reused. 
sl@0: 	virtual void CacheMaintenanceOnPreserve(const TPhysAddr* aPhysAddr, TInt aPageCount, TUint iMapAttr)=0;
sl@0: 	virtual void CacheMaintenanceOnPreserve(const TPhysAddr aPhysAddr, TUint iMapAttr)=0;
sl@0: 	virtual void CacheMaintenanceOnPreserve(TPhysAddr aPhysAddr, TInt aSize, TLinAddr aLinAddr, TUint iMapAttr)=0;
sl@0: 	
sl@0: public:
sl@0: 	inline static Mmu& Get()
sl@0: 		{return *(Mmu*)TheMmu;}
sl@0: 	static void Panic(TPanic aPanic);
sl@0: public:
sl@0: 	TInt iNumOsAsids;
sl@0: 	TInt iNumGlobalPageDirs;
sl@0: 	TBitMapAllocator* iOsAsidAllocator;
sl@0: 	TInt iGlobalPdSize;
sl@0: 	TInt iGlobalPdShift;
sl@0: 	TInt iLocalPdSize;
sl@0: 	TInt iLocalPdShift;
sl@0: 	TInt iAsidGroupSize;			// number of global page directories mapped by a page table
sl@0: 	TInt iAsidGroupMask;			// number of global page directories mapped by a page table - 1
sl@0: 	TInt iAsidGroupShift;			// log2(number of global page directories mapped by a page table)
sl@0: 	TInt iAliasSize;				// minimum allowed spacing between synonyms of any physical address
sl@0: 	TInt iAliasMask;
sl@0: 	TInt iAliasShift;
sl@0: 	TLinAddr iUserLocalBase;		// lowest local data address
sl@0: 	TLinAddr iUserLocalEnd;			// 1+highest local data address (lowest DLL data address)
sl@0: 	TLinAddr iUserSharedBase;		// lowest shared data address (1+highest DLL data address)
sl@0: 	TLinAddr iUserSharedEnd;		// 1+highest shared data address (=local PD size)
sl@0: 	TLinAddr iDllDataBase;
sl@0: 	TInt iMaxDllDataSize;
sl@0: 	TLinAddr iUserCodeBase;
sl@0: 	TInt iMaxUserCodeSize;
sl@0: 	TUint32* iAsidInfo;
sl@0: 	TLinAddr iPdeBase;
sl@0: 	TPte iPdPtePerm;
sl@0: 	TPde iPdPdePerm;
sl@0: 	TPte iUserCodeLoadPtePerm;
sl@0: 	TPte iKernelCodePtePerm;
sl@0: 	TPte iGlobalCodePtePerm;
sl@0: 	TUint32 iRamDriveMask;
sl@0: 	TLinearSection* iSharedSection;
sl@0: 	TLinearSection* iUserGlobalSection;
sl@0: 	DMemModelChunk* iGlobalCode;
sl@0: 	SDblQue iAliasList;
sl@0: 	TInt iTempMapCount;
sl@0: 	TInt iSecondTempMapCount;
sl@0: 	TPte* iSecondTempPte;		// second PTE used for temporary mappings
sl@0: 	TLinAddr iSecondTempAddr;	// address corresponding to iSecondTempPte
sl@0: 	TInt iCacheMaintenanceTempMapAttr;	// holds SP_PTE's attr. entry for cache maintenance
sl@0: 										// temporary mapping.
sl@0: public:
sl@0: 	friend class Monitor;
sl@0: 	friend TPte& PageTableEntry(TLinAddr aLinAddr);
sl@0: 	};
sl@0: 
sl@0: 
sl@0: /********************************************
sl@0:  * Functions/Data defined in memory model
sl@0:  ********************************************/
sl@0: 
sl@0: /**
sl@0: @internalComponent
sl@0: */
sl@0: class MM
sl@0: 	{
sl@0: public:
sl@0: 	enum TMemModelPanic
sl@0: 		{
sl@0: 		EChunkTransferBadOwner=0,
sl@0: 		EChunkDecommitNoPageTable=1,
sl@0: 		EChunkTransferAllocAddrFailed=2,
sl@0: 		EFsRegisterThread=3,
sl@0: 		EClaimInitialPagesBadPageTable=4,
sl@0: 		EChunkNotDisconnected1=5,
sl@0: 		EChunkNotDisconnected2=6,
sl@0: 		EChunkCommitNoPageTable=7,
sl@0: 		EProcessDestructChunksRemaining=8,
sl@0: 		ECommitInvalidDllDataAddress=9,
sl@0: 		EDecommitInvalidDllDataAddress=10,
sl@0: 		EChunkApplyPermissions1=11,
sl@0: 		EChunkApplyPermissions2=12,
sl@0: 		ECodeSegLoadedNotCreator=13,
sl@0: 		EChunkBadAddressRange=14,
sl@0: 		EPdeAlreadyInUse=15,
sl@0: 		EPteAlreadyInUse=16,
sl@0: 		EMmuMapNoPageTable=17,
sl@0: 		EUnmapBadAlignment=18,
sl@0: 		EBootstrapPageTableBadAddr=19,
sl@0: 		ETempMappingAlreadyInUse=20,
sl@0: 		EDecommitFailed=21,
sl@0: 		EPageTableNotFound=22,
sl@0: 		EUnexpectedPageType=23,
sl@0: 		EOperationNotSupported=24,
sl@0: 		EChunkRemapNoPageTable=25,
sl@0: 		EChunkRemapUnsupported=26,
sl@0: 		ECodeSegRemapWrongPage=27,
sl@0: 		EChunkRemapWrongPageTable=28,
sl@0: 		ETempMappingNoRoom=29,
sl@0: 		};
sl@0: 
sl@0: 	static void Panic(TMemModelPanic aPanic);
sl@0: public:
sl@0: 	static void Init1();
sl@0: 	static void StartCrashDebugger();
sl@0: public:
sl@0: 	static TInt MaxPagesInOneGo;
sl@0: 	static DMemModelChunk* SvStackChunk;
sl@0: 	static DMemModelChunk* TheRamDriveChunk;
sl@0: 	static TBitMapAllocator* UserCodeAllocator;
sl@0: 	static TBitMapAllocator* DllDataAllocator;
sl@0: 	};
sl@0: 
sl@0: #endif