os/kernelhwsrv/kernel/eka/memmodel/epoc/multiple/x86/xmmu.cia
author sl
Tue, 10 Jun 2014 14:32:02 +0200
changeset 1 260cb5ec6c19
permissions -rw-r--r--
Update contrib.
     1 // Copyright (c) 2007-2009 Nokia Corporation and/or its subsidiary(-ies).
     2 // All rights reserved.
     3 // This component and the accompanying materials are made available
     4 // under the terms of the License "Eclipse Public License v1.0"
     5 // which accompanies this distribution, and is available
     6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".
     7 //
     8 // Initial Contributors:
     9 // Nokia Corporation - initial contribution.
    10 //
    11 // Contributors:
    12 //
    13 // Description:
    14 // e32\memmodel\epoc\multiple\x86\xmmu.cia
    15 // 
    16 //
    17 
    18 #include <x86_mem.h>
    19 
    20 #if defined(KMMU)
    21 extern "C" void __DebugMsgFlushTLB();
    22 extern "C" void __DebugMsgLocalFlushTLB();
    23 extern "C" void __DebugMsgTotalFlushTLB();
    24 extern "C" void __DebugMsgINVLPG(int a);
    25 #endif
    26 
    27 
    28 extern "C"
    29 {
    30 
    31 
    32 __NAKED__ void __fastcall DoInvalidateTLBForPage(TLinAddr /*aLinAddr*/)
    33 //
    34 // Flush a specified virtual address from the TLB.
    35 //
    36 	{
    37 	ASM_DEBUG1(INVLPG,ecx)
    38 	asm("invlpg [ecx]");
    39 	asm("ret");
    40 	}
    41 
    42 // On 486 and Pentium this invalidates all TLB entries.
    43 // On P6 and later CPUs it only invalidates non-global TLB entries.
    44 __NAKED__ void DoLocalInvalidateTLB()
    45 	{
    46 	ASM_DEBUG0(LocalFlushTLB)
    47 	asm("mov eax, cr3");
    48 	asm("mov cr3, eax");
    49 	asm("ret");
    50 	}
    51 
    52 // This function is only used on P6 and later CPUs.
    53 // It invalidates all TLB entries, including global ones.
    54 extern "C" __NAKED__ void DoTotalInvalidateTLB()
    55 	{
    56 	ASM_DEBUG0(TotalFlushTLB)
    57 	asm("pushfd");
    58 	asm("mov eax, cr3");
    59 	MOV_ECX_CR4;
    60 	asm("mov edx, ecx");
    61 	asm("and dl, 0x7f");
    62 	asm("cli");
    63 	MOV_CR4_EDX;
    64 	asm("mov cr3, eax");
    65 	MOV_CR4_ECX;
    66 	asm("popfd");
    67 	asm("ret");
    68 	}
    69 
    70 // Invalidate all TLB entries regardless of CPU type.
    71 __NAKED__ void DoInvalidateTLB()
    72 	{
    73 	ASM_DEBUG0(FlushTLB)
    74 	asm("mov edx, [%a0]": : "i"(&X86_UseGlobalPTEs));
    75 	asm("mov eax, cr3");
    76 	asm("cmp edx, 0");
    77 	asm("jz no_global_pages");
    78 	MOV_ECX_CR4;
    79 	asm("mov edx, ecx");
    80 	asm("and dl, 0x7f");
    81 	asm("pushfd");
    82 	asm("cli");
    83 	MOV_CR4_EDX;
    84 	asm("mov cr3, eax");
    85 	MOV_CR4_ECX;
    86 	asm("popfd");
    87 	asm("ret");
    88 	asm("no_global_pages:");
    89 	asm("mov cr3, eax");
    90 	asm("ret");
    91 	}
    92 }
    93 
    94 __NAKED__ void DMemModelThread::RestoreAddressSpace()
    95 	{
    96 #ifndef __SMP__
    97 	//SMP FIXME
    98 	asm("mov eax, [%a0]": : "i"(&TheScheduler.iCurrentThread));
    99 
   100 	// edx = current thread owning process...
   101 	asm("mov edx, 0");
   102 	asm("lea edx, [edx+%0]": : "i"_FOFF(DThread,iNThread));
   103 	asm("neg edx");
   104 	asm("mov edx, [eax+edx+%0]": : "i"_FOFF(DThread,iOwningProcess));
   105 
   106 	// update page directory and address space values...
   107 	asm("cli");
   108 	asm("mov [%a0], edx": :"i"(&TheScheduler.iAddressSpace));
   109 	asm("mov [eax+%0], edx": : "i"_FOFF(NThreadBase,iAddressSpace));
   110 	asm("mov edx, [edx+%0]": : "i"_FOFF(DMemModelProcess,iGlobalPageDir));
   111 	asm("mov cr3, edx");
   112 	asm("sti");
   113 #endif
   114 	asm("ret");
   115 	}
   116 
   117