os/kernelhwsrv/kernel/eka/euser/epoc/arm/uc_i64.cia
author sl
Tue, 10 Jun 2014 14:32:02 +0200
changeset 1 260cb5ec6c19
permissions -rw-r--r--
Update contrib.
     1 // Copyright (c) 1997-2009 Nokia Corporation and/or its subsidiary(-ies).
     2 // All rights reserved.
     3 // This component and the accompanying materials are made available
     4 // under the terms of the License "Eclipse Public License v1.0"
     5 // which accompanies this distribution, and is available
     6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".
     7 //
     8 // Initial Contributors:
     9 // Nokia Corporation - initial contribution.
    10 //
    11 // Contributors:
    12 //
    13 // Description:
    14 // e32\euser\epoc\arm\uc_i64.cia
    15 // 
    16 //
    17 
    18 #include <u32std.h>
    19 #include <e32math.h>
    20 
    21 #if defined(__GCC32__)
    22 extern "C" void __division_by_zero();
    23 #define DIV_BY_ZERO " __division_by_zero "
    24 #elif defined(__ARMCC__)
    25 extern "C" void __rt_div0 (void);
    26 #define DIV_BY_ZERO " __cpp(__rt_div0) "
    27 #endif
    28 
    29 
    30 
    31 
    32 EXPORT_C __NAKED__ void Math::Mul64(Int64 /*aX*/, Int64 /*aY*/, Int64& /*aOutH*/, Uint64& /*aOutL*/)
    33 /**
    34 Multiply aX by aY to generate a 128 bit result.
    35 
    36 The high order 64 bits of this calculation are stored in aOutH,
    37 and the low order 64 bits are stored in aOutL.
    38 
    39 @param aX     The first 64-bit operand.
    40 @param aY     The second 64-bit operand.
    41 @param aOutH  The high order 64 bits of the result.
    42 @param aOutL  The low order  64 bits of the result.
    43 */
    44 	{
    45 	// Enter with r1:r0=aX, r3:r2=aY, [sp]=&aOutH, [sp+4]=&aOutL
    46 	asm("stmfd sp!, {r4-r5,lr} ");
    47 	asm("umull r4, r5, r0, r2 ");	// r5:r4 = x0 * y0
    48 	asm("mov r12, #0 ");			// clear r12 initially
    49 	asm("umlal r5, r12, r0, r3 ");	// r12:r5:r4 = x0 * y
    50 	asm("mov r14, #0 ");			// clear r14 initially
    51 	asm("smlal r12, r14, r1, r3 ");	// r14:r12:r5:r4 = x0 * y + (x1*y1)<<64
    52 	asm("and r3, r0, r3, asr #32 ");	// if aY<0, r3=x0 else r3=0
    53 	asm("and r0, r2, r1, asr #32 ");	// if aX<0, r0=y0 else r0=0
    54 	asm("subs r12, r12, r3 ");
    55 	asm("sbcs r14, r14, #0 ");
    56 	asm("subs r12, r12, r0 ");
    57 	asm("sbcs r14, r14, #0 ");
    58 	asm("umull r0, r3, r1, r2 ");	// r3:r0 = x1 * y0
    59 	asm("ldr r1, [sp, #12] ");		// r1=&aOutH
    60 	asm("ldr r2, [sp, #16] ");		// r1=&aOutL
    61 	asm("adds r5, r5, r0 ");		// shift left by 32 and add to give final result
    62 	asm("adcs r12, r12, r3 ");
    63 	asm("adcs r14, r14, #0 ");		// final result now in r14:r12:r5:r4
    64 	asm("stmia r2, {r4,r5} ");		// store low 64
    65 	asm("stmia r1, {r12,r14} ");	// store high 64
    66 	__POPRET("r4-r5,");
    67 	}
    68 
    69 
    70 
    71 
    72 EXPORT_C __NAKED__ void Math::UMul64(Uint64 /*aX*/, Uint64 /*aY*/, Uint64& /*aOutH*/, Uint64& /*aOutL*/)
    73 /**
    74 Multiply aX by aY to generate a 128 bit result.
    75 
    76 The high order 64 bits of this calculation are stored in aOutH,
    77 and the low order 64 bits are stored in aOutL.
    78 
    79 @param aX     The first 64-bit operand.
    80 @param aY     The second 64-bit operand.
    81 @param aOutH  The high order 64 bits of the result.
    82 @param aOutL  The low order  64 bits of the result.
    83 */
    84 	{
    85 	// Enter with r1:r0=aX, r3:r2=aY, [sp]=&aOutH, [sp+4]=&aOutL
    86 	asm("stmfd sp!, {r4-r5,lr} ");
    87 	asm("umull r4, r5, r0, r2 ");	// r5:r4 = x0 * y0
    88 	asm("mov r12, #0 ");			// clear r12 initially
    89 	asm("umlal r5, r12, r0, r3 ");	// r12:r5:r4 = x0 * y
    90 	asm("mov r14, #0 ");			// clear r14 initially
    91 	asm("umlal r12, r14, r1, r3 ");	// r14:r12:r5:r4 = x0 * y + (x1*y1)<<64
    92 									// r0, r3 no longer required
    93 	asm("umull r0, r3, r1, r2 ");	// r3:r0 = x1 * y0
    94 	asm("ldr r1, [sp, #12] ");		// r1=&aOutH
    95 	asm("ldr r2, [sp, #16] ");		// r1=&aOutL
    96 	asm("adds r5, r5, r0 ");		// shift left by 32 and add to give final result
    97 	asm("adcs r12, r12, r3 ");
    98 	asm("adcs r14, r14, #0 ");		// final result now in r14:r12:r5:r4
    99 	asm("stmia r2, {r4,r5} ");		// store low 64
   100 	asm("stmia r1, {r12,r14} ");	// store high 64
   101 	__POPRET("r4-r5,");
   102 	}
   103 
   104 
   105 
   106 
   107 EXPORT_C __NAKED__ Int64 Math::DivMod64(Int64 /*aDividend*/, Int64 /*aDivisor*/, Int64& /*aRemainder*/)
   108 /**
   109 Divides aDividend by aDivisor.
   110 
   111 The quotient is returned, and the remainder is stored in aRemainder.
   112 The remainder has same sign as the dividend.
   113 
   114 @param aDividend The 64-bit dividend.
   115 @param aDivisor  The 64-bit divisor.
   116 @param aRemainder The 64-bit remainder.
   117 
   118 @return The 64-bit quotient.
   119 */
   120 	{
   121 	// Enter with: r1:r0=dividend, r3:r2=divisor, [sp]=&aRemainder
   122 	// Return quotient in r1:r0
   123 	asm("stmfd sp!, {r4-r8,lr} ");
   124 	__EH_FRAME_PUSH2(r4-r8,lr)
   125 	asm("mov r8, r1, asr #1 ");		// r8 bit 31 =  r8 bit 30 = dividend sign
   126 	asm("eor r8, r8, r3, lsr #1 ");	// r8 bit 31 = dividend sign, r8 bit 30 = quotient sign
   127 	asm("cmp r1, #0 ");
   128 	asm("bpl 1f ");
   129 	asm("rsbs r0, r0, #0 ");		// r1:r0=ABS(dividend)
   130 	asm("rscs r1, r1, #0 ");
   131 	asm("1: ");
   132 	asm("cmp r3, #0 ");
   133 	asm("bpl 2f ");
   134 	asm("rsbs r2, r2, #0 ");		// r3:r2=ABS(divisor)
   135 	asm("rscs r3, r3, #0 ");
   136 	asm("2: ");
   137 #ifndef __EABI__
   138 	asm(".extern UDiv01 ");
   139 	asm("bl UDiv01 ");				// do division, quotient->r5:r4, rem->r6:r3
   140 	asm("mov r2, r3");				// move to make regs same as EABI function
   141 	asm("mov r0, r4");
   142 	asm("mov r1, r5");
   143 	asm("mov r3, r6");
   144 #else //__EABI__
   145 	asm(".extern __aeabi_uldivmod ");
   146 	asm("bl __aeabi_uldivmod ");	// do division, quotient->r1:r0, rem->r3:r2
   147 #endif //__EABI__
   148 	asm("add ip, r8, r8 ");			// ip bit 31 = quotient sign
   149 	asm("ldr r6, [sp, #24] ");		// r6 = &aRemainder
   150 	asm("eors r4, r0, ip, asr #32 ");	// quotient into r5:r4, inverted if quotient -ve
   151 	asm("eors r5, r1, ip, asr #32 ");
   152 	asm("adcs r0, r4, #0 ");		// if quotient -ve, add 1 whilst moving back to r1:r0
   153 	asm("adcs r1, r5, #0 ");
   154 	asm("cmp r8, #0 ");
   155 	asm("bpl 3f ");
   156 	asm("rsbs r2, r2, #0 ");		// if dividend -ve, negate remainder
   157 	asm("rscs r3, r3, #0 ");
   158 	asm("3: ");
   159 	asm("stmia r6, {r2,r3} ");		// store remainder
   160 	__POPRET("r4-r8,");
   161 	}
   162 
   163 
   164 
   165 
   166 EXPORT_C __NAKED__ Uint64 Math::UDivMod64(Uint64 /*aDividend*/, Uint64 /*aDivisor*/, Uint64& /*aRemainder*/)
   167 /**
   168 Divides aDividend by aDivisor.
   169 
   170 The quotient is returned, and the remainder is stored in aRemainder.
   171 
   172 @param aDividend The 64-bit dividend.
   173 @param aDivisor  The 64-bit divisor.
   174 @param aRemainder The 64-bit remainder.
   175 
   176 @return The 64-bit quotient.
   177 */
   178 	{
   179 	// Enter with: r1:r0=dividend, r3:r2=divisor, [sp]=&aRemainder
   180 	// Return quotient in r1:r0
   181 #ifdef __EABI__
   182 	// need to keep sp 8-byte aligned
   183 	asm("stmfd sp!, {r4-r8,lr} ");
   184 	__EH_FRAME_PUSH2(r4-r8,lr)
   185 #else
   186 	asm("stmfd sp!, {r4-r7,lr} ");
   187 #endif
   188 
   189 #ifndef __EABI__
   190 	asm(".extern UDiv01 ");
   191 	asm("bl UDiv01 ");				// do division, quotient->r5:r4, rem->r6:r3
   192 	asm("mov r2, r3");				// move to make regs same as EABI function
   193 	asm("mov r0, r4");
   194 	asm("mov r1, r5");
   195 	asm("mov r3, r6");
   196 #else //__EABI__
   197 	asm("bl __aeabi_uldivmod ");	// do division, quotient->r1:r0, rem->r3:r2
   198 #endif //__EABI__
   199 
   200 #ifdef __EABI__
   201 	asm("ldr r6, [sp, #24] ");		// r6 = &aRemainder
   202 #else 
   203 	asm("ldr r6, [sp, #20] ");		// r6 = &aRemainder
   204 #endif 
   205 
   206 	asm("stmia r6, {r2,r3} ");		// store remainder
   207 
   208 #ifdef __EABI__
   209 	__POPRET("r4-r8,");
   210 #else
   211 	__POPRET("r4-r7,");
   212 #endif
   213 	}