1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/os/kernelhwsrv/kernel/eka/memmodel/epoc/multiple/x86/xmmu.cia Fri Jun 15 03:10:57 2012 +0200
1.3 @@ -0,0 +1,117 @@
1.4 +// Copyright (c) 2007-2009 Nokia Corporation and/or its subsidiary(-ies).
1.5 +// All rights reserved.
1.6 +// This component and the accompanying materials are made available
1.7 +// under the terms of the License "Eclipse Public License v1.0"
1.8 +// which accompanies this distribution, and is available
1.9 +// at the URL "http://www.eclipse.org/legal/epl-v10.html".
1.10 +//
1.11 +// Initial Contributors:
1.12 +// Nokia Corporation - initial contribution.
1.13 +//
1.14 +// Contributors:
1.15 +//
1.16 +// Description:
1.17 +// e32\memmodel\epoc\multiple\x86\xmmu.cia
1.18 +//
1.19 +//
1.20 +
1.21 +#include <x86_mem.h>
1.22 +
1.23 +#if defined(KMMU)
1.24 +extern "C" void __DebugMsgFlushTLB();
1.25 +extern "C" void __DebugMsgLocalFlushTLB();
1.26 +extern "C" void __DebugMsgTotalFlushTLB();
1.27 +extern "C" void __DebugMsgINVLPG(int a);
1.28 +#endif
1.29 +
1.30 +
1.31 +extern "C"
1.32 +{
1.33 +
1.34 +
1.35 +__NAKED__ void __fastcall DoInvalidateTLBForPage(TLinAddr /*aLinAddr*/)
1.36 +//
1.37 +// Flush a specified virtual address from the TLB.
1.38 +//
1.39 + {
1.40 + ASM_DEBUG1(INVLPG,ecx)
1.41 + asm("invlpg [ecx]");
1.42 + asm("ret");
1.43 + }
1.44 +
1.45 +// On 486 and Pentium this invalidates all TLB entries.
1.46 +// On P6 and later CPUs it only invalidates non-global TLB entries.
1.47 +__NAKED__ void DoLocalInvalidateTLB()
1.48 + {
1.49 + ASM_DEBUG0(LocalFlushTLB)
1.50 + asm("mov eax, cr3");
1.51 + asm("mov cr3, eax");
1.52 + asm("ret");
1.53 + }
1.54 +
1.55 +// This function is only used on P6 and later CPUs.
1.56 +// It invalidates all TLB entries, including global ones.
1.57 +extern "C" __NAKED__ void DoTotalInvalidateTLB()
1.58 + {
1.59 + ASM_DEBUG0(TotalFlushTLB)
1.60 + asm("pushfd");
1.61 + asm("mov eax, cr3");
1.62 + MOV_ECX_CR4;
1.63 + asm("mov edx, ecx");
1.64 + asm("and dl, 0x7f");
1.65 + asm("cli");
1.66 + MOV_CR4_EDX;
1.67 + asm("mov cr3, eax");
1.68 + MOV_CR4_ECX;
1.69 + asm("popfd");
1.70 + asm("ret");
1.71 + }
1.72 +
1.73 +// Invalidate all TLB entries regardless of CPU type.
1.74 +__NAKED__ void DoInvalidateTLB()
1.75 + {
1.76 + ASM_DEBUG0(FlushTLB)
1.77 + asm("mov edx, [%a0]": : "i"(&X86_UseGlobalPTEs));
1.78 + asm("mov eax, cr3");
1.79 + asm("cmp edx, 0");
1.80 + asm("jz no_global_pages");
1.81 + MOV_ECX_CR4;
1.82 + asm("mov edx, ecx");
1.83 + asm("and dl, 0x7f");
1.84 + asm("pushfd");
1.85 + asm("cli");
1.86 + MOV_CR4_EDX;
1.87 + asm("mov cr3, eax");
1.88 + MOV_CR4_ECX;
1.89 + asm("popfd");
1.90 + asm("ret");
1.91 + asm("no_global_pages:");
1.92 + asm("mov cr3, eax");
1.93 + asm("ret");
1.94 + }
1.95 +}
1.96 +
1.97 +__NAKED__ void DMemModelThread::RestoreAddressSpace()
1.98 + {
1.99 +#ifndef __SMP__
1.100 + //SMP FIXME
1.101 + asm("mov eax, [%a0]": : "i"(&TheScheduler.iCurrentThread));
1.102 +
1.103 + // edx = current thread owning process...
1.104 + asm("mov edx, 0");
1.105 + asm("lea edx, [edx+%0]": : "i"_FOFF(DThread,iNThread));
1.106 + asm("neg edx");
1.107 + asm("mov edx, [eax+edx+%0]": : "i"_FOFF(DThread,iOwningProcess));
1.108 +
1.109 + // update page directory and address space values...
1.110 + asm("cli");
1.111 + asm("mov [%a0], edx": :"i"(&TheScheduler.iAddressSpace));
1.112 + asm("mov [eax+%0], edx": : "i"_FOFF(NThreadBase,iAddressSpace));
1.113 + asm("mov edx, [edx+%0]": : "i"_FOFF(DMemModelProcess,iGlobalPageDir));
1.114 + asm("mov cr3, edx");
1.115 + asm("sti");
1.116 +#endif
1.117 + asm("ret");
1.118 + }
1.119 +
1.120 +