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; Copyright (c) 2007-2009 Nokia Corporation and/or its subsidiary(-ies).
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; All rights reserved.
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; This component and the accompanying materials are made available
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; under the terms of the License "Eclipse Public License v1.0"
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; which accompanies this distribution, and is available
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; at the URL "http://www.eclipse.org/legal/epl-v10.html".
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;
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; Initial Contributors:
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; Nokia Corporation - initial contribution.
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;
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; Contributors:
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;
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; Description:
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;
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AREA |d-rmdebug-bkpt$$Code|, CODE, READONLY, ALIGN=6
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CODE32
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; ARM tests
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;
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; Non-PC modifying
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;
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EXPORT RMDebug_StepTest_Non_PC_Modifying
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EXPORT RMDebug_StepTest_Non_PC_Modifying_OK
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RMDebug_StepTest_Non_PC_Modifying
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mov r0,r0 ; nop
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RMDebug_StepTest_Non_PC_Modifying_OK
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bx lr ; should return to normal execution of the test thread
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;
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; Branch
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;
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EXPORT RMDebug_StepTest_Branch
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EXPORT RMDebug_StepTest_Branch_1
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RMDebug_StepTest_Branch
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b RMDebug_StepTest_Branch_1
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mov r0, #2 ; if the pc ends up here, we know its gone wrong
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RMDebug_StepTest_Branch_1
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bx lr ; return
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;
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; Branch and Link
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;
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EXPORT RMDebug_StepTest_Branch_And_Link
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EXPORT RMDebug_StepTest_Branch_And_Link_1
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EXPORT RMDebug_StepTest_Branch_And_Link_2
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RMDebug_StepTest_Branch_And_Link
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mov r0, lr ; preserve lr for the moment
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RMDebug_StepTest_Branch_And_Link_1
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bl RMDebug_StepTest_Branch_And_Link_2
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mov r1, #1 ; insert a gap in the instruction stream so we know we branched.
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RMDebug_StepTest_Branch_And_Link_2
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mov lr, r0 ; restore lr
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bx lr ; should return to normal execution of the test thread
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;
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; MOV PC
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;
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EXPORT RMDebug_StepTest_MOV_PC
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EXPORT RMDebug_StepTest_MOV_PC_1
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EXPORT RMDebug_StepTest_MOV_PC_2
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RMDebug_StepTest_MOV_PC
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mov r0, #4
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RMDebug_StepTest_MOV_PC_1
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add pc, pc, r0 ; should be a jump (bear in mind reading pc = current inst + 8bytes for arm)
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mov r0, #1 ; Simple instructions which allow us to test where the PC really is
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mov r0, #2 ; just by reading r0.
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RMDebug_StepTest_MOV_PC_2
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mov r0, #3 ;
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mov r0, #4 ;
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bx lr ; should return to normal execution of the test thread
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;
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; LDR PC
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;
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EXPORT RMDebug_StepTest_LDR_PC
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EXPORT RMDebug_StepTest_LDR_PC_1
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RMDebug_StepTest_LDR_PC
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ldr pc, =RMDebug_StepTest_LDR_PC_1
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mov r0, #1 ; separate the branch target so we can prove it works
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RMDebug_StepTest_LDR_PC_1
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bx lr ; should return to normal execution of the test thread
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;
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; ARM -> Thumb -> ARM interworking test
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;
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; Note: We always start and finish this test
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; in ARM mode.
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EXPORT RMDebug_StepTest_Interwork
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EXPORT RMDebug_StepTest_Interwork_1
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EXPORT RMDebug_StepTest_Interwork_2
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EXPORT RMDebug_StepTest_Interwork_3
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RMDebug_StepTest_Interwork
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mov r0, lr ; preserve lr
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RMDebug_StepTest_Interwork_1
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blx RMDebug_StepTest_Interwork_2
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CODE16
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RMDebug_StepTest_Interwork_2
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blx RMDebug_StepTest_Interwork_3
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CODE32
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RMDebug_StepTest_Interwork_3
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bx r0
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;
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; Stepping performance tests
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;
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; This counts down from 100000 to 0
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; This means that for all practical purposes
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; we can single-step as much as we like
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; in less than one second and have some likelyhood
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; that we will not step too far from our loop
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EXPORT RMDebug_StepTest_Count
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EXPORT RMDebug_StepTest_Count_1
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EXPORT RMDebug_StepTest_Count_2
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RMDebug_StepTest_Count
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ldr r2, =100000
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RMDebug_StepTest_Count_1
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subs r2, r2, #1
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RMDebug_StepTest_Count_2
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bne RMDebug_StepTest_Count_1
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bx lr
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; Thumb tests
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; Thumb non-pc modifying
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;
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;
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RMDebug_StepTest_Thumb_Non_PC_Modifying
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mov r0, lr ; preserve lr
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blx RMDebug_StepTest_Thumb_Non_PC_Modifying_1
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bx r0
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;
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; Thumb Branch
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;
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RMDebug_StepTest_Thumb_Branch
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mov r0, lr ; preserve lr
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blx RMDebug_StepTest_Thumb_Branch_1
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bx r0
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;
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; Thumb Branch and link
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;
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RMDebug_StepTest_Thumb_Branch_And_Link
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mov r0, lr ; preserve lr
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blx RMDebug_StepTest_Thumb_Branch_And_Link_1
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bx r0
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;
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; Thumb Back Branch and link
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;
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RMDebug_StepTest_Thumb_Back_Branch_And_Link
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mov r0, lr ; preserve lr
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blx RMDebug_StepTest_Thumb_Back_Branch_And_Link_1
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bx r0
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;
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; Thumb ADD PC,PC, #0
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;
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RMDebug_StepTest_Thumb_AddPC
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mov r0, lr ; preserve lr
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blx RMDebug_StepTest_Thumb_AddPC_1
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bx r0
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CODE16
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; Thumb tests
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EXPORT RMDebug_StepTest_Thumb_Non_PC_Modifying
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EXPORT RMDebug_StepTest_Thumb_Non_PC_Modifying_1
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EXPORT RMDebug_StepTest_Thumb_Non_PC_Modifying_2
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EXPORT RMDebug_StepTest_Thumb_Branch
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EXPORT RMDebug_StepTest_Thumb_Branch_1
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EXPORT RMDebug_StepTest_Thumb_Branch_2
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EXPORT RMDebug_StepTest_Thumb_Branch_And_Link
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EXPORT RMDebug_StepTest_Thumb_Branch_And_Link_1
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EXPORT RMDebug_StepTest_Thumb_Branch_And_Link_2
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EXPORT RMDebug_StepTest_Thumb_Branch_And_Link_3
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EXPORT RMDebug_StepTest_Thumb_Back_Branch_And_Link
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EXPORT RMDebug_StepTest_Thumb_Back_Branch_And_Link_1
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EXPORT RMDebug_StepTest_Thumb_Back_Branch_And_Link_2
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EXPORT RMDebug_StepTest_Thumb_Back_Branch_And_Link_3
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RMDebug_StepTest_Thumb_Non_PC_Modifying_1
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mov r0, r0 ; nop
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RMDebug_StepTest_Thumb_Non_PC_Modifying_2
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bx lr
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RMDebug_StepTest_Thumb_Branch_1
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b RMDebug_StepTest_Thumb_Branch_2
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mov r0, r0
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RMDebug_StepTest_Thumb_Branch_2
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bx lr
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RMDebug_StepTest_Thumb_Branch_And_Link_1
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mov r1, lr
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RMDebug_StepTest_Thumb_Branch_And_Link_2
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bl RMDebug_StepTest_Thumb_Branch_And_Link_3
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mov r0, r0
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RMDebug_StepTest_Thumb_Branch_And_Link_3
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bx r1
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RMDebug_StepTest_Thumb_Back_Branch_And_Link_3
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bx r1
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RMDebug_StepTest_Thumb_Back_Branch_And_Link_1
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mov r1, lr
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RMDebug_StepTest_Thumb_Back_Branch_And_Link_2
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bl RMDebug_StepTest_Thumb_Back_Branch_And_Link_3
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bx r1
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;
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; ADD PC
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;
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EXPORT RMDebug_StepTest_Thumb_AddPC
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EXPORT RMDebug_StepTest_Thumb_AddPC_1
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EXPORT RMDebug_StepTest_Thumb_AddPC_2
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EXPORT RMDebug_StepTest_Thumb_AddPC_3
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RMDebug_StepTest_Thumb_AddPC_1
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mov r1, lr
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mov r2, #4
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RMDebug_StepTest_Thumb_AddPC_2
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add pc, pc, r2 ; should arrive at RMDebug_StepTest_Thumb_AddPC_3
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mov r0, r0
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mov r0, r0
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mov r0, r0
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RMDebug_StepTest_Thumb_AddPC_3
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bx r1
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ALIGN 4
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CODE32
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;
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; ARM multiple-step ( 5 steps )
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;
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EXPORT RMDebug_StepTest_ARM_Step_Multiple
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EXPORT RMDebug_StepTest_ARM_Step_Multiple_1
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RMDebug_StepTest_ARM_Step_Multiple
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mov r0,r0 ; nop
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mov r0,r0 ; nop
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mov r0,r0 ; nop
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mov r0,r0 ; nop
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mov r0,r0 ; nop
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RMDebug_StepTest_ARM_Step_Multiple_1
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bx lr
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END
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; End of file - d_rmdebug_bkpt.s
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