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// Copyright (c) 2003-2009 Nokia Corporation and/or its subsidiary(-ies).
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// All rights reserved.
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// This component and the accompanying materials are made available
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// under the terms of the License "Eclipse Public License v1.0"
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// which accompanies this distribution, and is available
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// at the URL "http://www.eclipse.org/legal/epl-v10.html".
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//
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// Initial Contributors:
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// Nokia Corporation - initial contribution.
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//
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// Contributors:
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//
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// Description:
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// e32test\math\t_vfp.cpp
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// Overview:
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// Test the ARM Vector Floating Point operations.
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// API Information:
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// VFP
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// Details:
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// - Check that the HAL agrees with the hardware about whether
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// VFP is supported.
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// - Test setting VFP to IEEE with no exceptions mode, if IEEE mode is
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// supported, otherwise leave the mode alone.
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// - Test single and double precision vector floating point operations:
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// ABS, NEG, ADD, SUB, MUL, DIV, NMUL, SQRT, MAC, MSC, NMAC and NMSC.
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// Verify results are as expected - if IEEE mode was set, verify
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// bit-for-bit, in accordance with the IEEE specification, otherwise
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// use normal floating point equality.
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// - Test VFP context save.
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// - Test various VFP operations that cause bounces to support code if
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// IEEE mode is supported.
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// - Test setting VFP to RunFast mode if RunFast mode is supported.
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// - Test setting VFP rounding mode.
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// - Test inheriting VFP mode to created threads.
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// Platforms/Drives/Compatibility:
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// All
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// Assumptions/Requirement/Pre-requisites:
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// Failures and causes:
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// Base Port information:
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//
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//
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//! @file
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//! @SYMTestCaseID KBASE-0017-T_VFP
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//! @SYMTestCaseDesc VFPv2 general functionality and bounce handling
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//! @SYMREQ 5159
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//! @SYMTestPriority Critical
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//! @SYMTestActions Check VFP functions correctly in all modes and that mode switching works correctly.
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//! @SYMTestExpectedResults Test runs until this message is emitted: RTEST: SUCCESS : T_VFP test completed O.K.
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//! @SYMTestType UT
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#include "t_vfp.h"
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#define __E32TEST_EXTENSION__
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#include <e32test.h>
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#include <e32math.h>
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#include <hal.h>
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#include <e32svr.h>
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#include <u32hal.h>
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RTest test(_L("T_VFP"));
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TUint32 FPSID;
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TUint32 ArchVersion;
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TBool Double;
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TBool IEEEMode;
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TInt CPUs;
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TInt CurrentCpu1;
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TInt CurrentCpu2;
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typedef void TSglTest(const TReal32* aArgs, TReal32* aResults);
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typedef void TDblTest(const TReal64* aArgs, TReal64* aResults);
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TBool DetectVFP()
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{
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TInt r = UserSvr::HalFunction(EHalGroupKernel, EKernelHalFloatingPointSystemId, &FPSID, NULL);
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return (r==KErrNone);
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}
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TInt TestVFPInitThreadFn(TAny* aPtr)
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{
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UserSvr::HalFunction(EHalGroupKernel, EKernelHalLockThreadToCpu, (TAny*)CurrentCpu1, 0);
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TReal32* p = (TReal32*)aPtr;
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TInt i;
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for (i=0; i<32; ++i)
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*p++ = Vfp::SReg(i);
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return 0;
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}
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void TestVFPInitialState()
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{
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for (CurrentCpu1 = 0; CurrentCpu1 < CPUs; CurrentCpu1++)
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{
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TReal32 f[32];
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RThread t;
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TInt r = t.Create(KNullDesC, &TestVFPInitThreadFn, 0x1000, NULL, f);
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test(r==KErrNone);
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TRequestStatus s;
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t.Logon(s);
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t.Resume();
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User::WaitForRequest(s);
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TInt xt = t.ExitType();
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TInt xr = t.ExitReason();
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test(xt == EExitKill && xr == KErrNone);
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CLOSE_AND_WAIT(t);
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UserSvr::HalFunction(EHalGroupKernel, EKernelHalLockThreadToCpu, (TAny*)CurrentCpu1, 0);
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test.Printf(_L("FPSCR = %08x for core %d\n"), Vfp::Fpscr(), CurrentCpu1);
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const TUint32* p = (const TUint32*)f;
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for (TInt i=0; i<32; ++i)
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{
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if (f[i] != 0.0f)
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{
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test.Printf(_L("S%d = 0x%08x\n"), i, p[i]);
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test(f[i] == 0.0f);
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}
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}
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}
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}
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void TestVFPSglRegs(TInt aIter=2)
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{
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TInt i;
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TInt j;
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TInt nSglRegs=0;
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switch(ArchVersion)
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{
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case ARCH_VERSION_VFPV2:
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case ARCH_VERSION_VFPV3_SUBARCH_V2:
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case ARCH_VERSION_VFPV3_SUBARCH_NULL:
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case ARCH_VERSION_VFPV3_SUBARCH_V3:
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nSglRegs = 32;
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break;
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case 0:
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default:
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__ASSERT_ALWAYS(0, User::Panic(_L("Bad VFP version"),__LINE__));
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/* NOTREACHED */
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}
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for (i=0; i<aIter; ++i)
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{
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for (j=0; j<nSglRegs; ++j)
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{
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TInt32 f = i + j;
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Vfp::SetSReg(f, j);
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}
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for (j=0; j<nSglRegs; ++j)
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{
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TInt32 f = i + j;
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TInt32 g = Vfp::SRegInt(j);
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test(f == g);
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}
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}
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}
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TInt TestVFPSglRegsThread(TAny*)
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{
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UserSvr::HalFunction(EHalGroupKernel, EKernelHalLockThreadToCpu, (TAny*)CurrentCpu1, 0);
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TestVFPSglRegs(KMaxTInt);
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return 0;
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}
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void TestVFPDblRegs(TInt aIter=2)
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{
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TInt i;
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TInt j;
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TInt nDblRegs=0;
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switch(ArchVersion)
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{
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case ARCH_VERSION_VFPV2:
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{
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nDblRegs = 16;
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break;
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}
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case ARCH_VERSION_VFPV3_SUBARCH_V2:
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case ARCH_VERSION_VFPV3_SUBARCH_NULL:
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case ARCH_VERSION_VFPV3_SUBARCH_V3:
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{
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TInt vfpType;
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TInt ret = HAL::Get(HALData::EHardwareFloatingPoint, vfpType);
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if (ret == KErrNone && vfpType == EFpTypeVFPv3)
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nDblRegs = 32;
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else
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nDblRegs = 16;
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break;
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}
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case 0:
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default:
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__ASSERT_ALWAYS(0, User::Panic(_L("Bad VFP version"),__LINE__));
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}
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for (i=0; i<aIter; ++i)
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{
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for (j=0; j<nDblRegs; ++j)
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{
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TInt64 f = i + j + KMaxTUint;
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Vfp::SetDReg(f, j);
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}
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for (j=0; j<nDblRegs; ++j)
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{
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TInt64 f = i + j + KMaxTUint;
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TInt64 g = Vfp::DRegInt(j);
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test(f == g);
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}
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}
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}
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TInt TestVFPDblRegsThread(TAny*)
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{
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UserSvr::HalFunction(EHalGroupKernel, EKernelHalLockThreadToCpu, (TAny*)CurrentCpu2, 0);
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TestVFPDblRegs(KMaxTInt);
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return 0;
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}
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void TestVFPContextSave()
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{
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for (CurrentCpu2 = 0; CurrentCpu2 < CPUs; CurrentCpu2++)
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{
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for (CurrentCpu1 = 0; CurrentCpu1 < CPUs; CurrentCpu1++)
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{
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TThreadFunction tf1 = &TestVFPSglRegsThread;
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TThreadFunction tf2 = Double ? &TestVFPDblRegsThread : &TestVFPSglRegsThread;
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RThread t1, t2;
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TInt r;
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r = t1.Create(KNullDesC, tf1, 0x1000, 0x1000, 0x1000, NULL);
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test(r==KErrNone);
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t1.SetPriority(EPriorityLess);
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r = t2.Create(KNullDesC, tf2, 0x1000, 0x1000, 0x1000, NULL);
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test(r==KErrNone);
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t2.SetPriority(EPriorityLess);
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TRequestStatus s1, s2;
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t1.Logon(s1);
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t2.Logon(s2);
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t1.Resume();
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t2.Resume();
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test.Printf(_L("Let threads run concurrently (cores %d and %d)\n"), CurrentCpu1, CurrentCpu2);
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User::After(20*1000*1000/CPUs);
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test.Printf(_L("Kill threads\n"));
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t1.Kill(0);
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t2.Kill(0);
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User::WaitForRequest(s1);
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User::WaitForRequest(s2);
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test(t1.ExitType()==EExitKill && t1.ExitReason()==KErrNone);
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test(t2.ExitType()==EExitKill && t2.ExitReason()==KErrNone);
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CLOSE_AND_WAIT(t1);
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CLOSE_AND_WAIT(t2);
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}
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}
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}
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TInt TestBounceCtxThread1(TAny*)
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{
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UserSvr::HalFunction(EHalGroupKernel, EKernelHalLockThreadToCpu, (TAny*)Max(CPUs-1, 0), 0);
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for(TInt iter=0; iter<KMaxTInt; ++iter)
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{
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Vfp::SReg(0);
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}
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return KErrNone;
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}
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TInt TestBounceCtxThread2(TAny*)
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{
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UserSvr::HalFunction(EHalGroupKernel, EKernelHalLockThreadToCpu, (TAny*)Max(CPUs-1, 0), 0);
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TInt start_rep = 0x00800000; // smallest single precision normal number, 1*2^-126
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TReal32 start = *(TReal32*)&start_rep;
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for(TInt iter=0; iter<KMaxTInt; ++iter)
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{
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Vfp::SetSReg(start, 1);
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Vfp::SetSReg(2.0f, 2);
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Vfp::DivS();
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Vfp::CpyS0(1);
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Vfp::MulS();
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Vfp::CpyS0(1);
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TReal32 end = Vfp::SReg(0);
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TInt end_rep = *(TInt*)&end;
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if (start_rep != end_rep)
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{
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RDebug::Printf("mismatch in iter %d, start %08x end %08x\n", iter, start_rep, end_rep);
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test(0);
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}
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}
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return KErrNone;
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}
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|
286 |
void DoBounceContextSwitchTests()
|
|
sl@0
|
287 |
{
|
|
sl@0
|
288 |
UserSvr::HalFunction(EHalGroupKernel, EKernelHalLockThreadToCpu, 0, 0);
|
|
sl@0
|
289 |
RThread t1, t2;
|
|
sl@0
|
290 |
TInt r;
|
|
sl@0
|
291 |
r = t1.Create(KNullDesC, &TestBounceCtxThread1, 0x1000, 0x1000, 0x1000, NULL);
|
|
sl@0
|
292 |
test(r==KErrNone);
|
|
sl@0
|
293 |
t1.SetPriority(EPriorityLess);
|
|
sl@0
|
294 |
r = t2.Create(KNullDesC, &TestBounceCtxThread2, 0x1000, 0x1000, 0x1000, NULL);
|
|
sl@0
|
295 |
test(r==KErrNone);
|
|
sl@0
|
296 |
t2.SetPriority(EPriorityLess);
|
|
sl@0
|
297 |
TRequestStatus s1, s2;
|
|
sl@0
|
298 |
t1.Logon(s1);
|
|
sl@0
|
299 |
t2.Logon(s2);
|
|
sl@0
|
300 |
t1.Resume();
|
|
sl@0
|
301 |
t2.Resume();
|
|
sl@0
|
302 |
test.Printf(_L("Let threads run concurrently ...\n"));
|
|
sl@0
|
303 |
User::After(20*1000*1000);
|
|
sl@0
|
304 |
|
|
sl@0
|
305 |
test.Printf(_L("Kill threads\n"));
|
|
sl@0
|
306 |
t1.Kill(0);
|
|
sl@0
|
307 |
t2.Kill(0);
|
|
sl@0
|
308 |
User::WaitForRequest(s1);
|
|
sl@0
|
309 |
User::WaitForRequest(s2);
|
|
sl@0
|
310 |
test(t1.ExitType()==EExitKill && t1.ExitReason()==KErrNone);
|
|
sl@0
|
311 |
test(t2.ExitType()==EExitKill && t2.ExitReason()==KErrNone);
|
|
sl@0
|
312 |
CLOSE_AND_WAIT(t1);
|
|
sl@0
|
313 |
CLOSE_AND_WAIT(t2);
|
|
sl@0
|
314 |
}
|
|
sl@0
|
315 |
|
|
sl@0
|
316 |
void TestAbsS(const TReal32* a, TReal32* r)
|
|
sl@0
|
317 |
{
|
|
sl@0
|
318 |
Vfp::SetSReg(a[0], 1);
|
|
sl@0
|
319 |
Vfp::AbsS();
|
|
sl@0
|
320 |
r[0] = Vfp::SReg(0);
|
|
sl@0
|
321 |
r[1] = Abs(a[0]);
|
|
sl@0
|
322 |
}
|
|
sl@0
|
323 |
|
|
sl@0
|
324 |
void TestAddS(const TReal32* a, TReal32* r)
|
|
sl@0
|
325 |
{
|
|
sl@0
|
326 |
Vfp::SetSReg(a[0], 1);
|
|
sl@0
|
327 |
Vfp::SetSReg(a[1], 2);
|
|
sl@0
|
328 |
Vfp::AddS();
|
|
sl@0
|
329 |
r[0] = Vfp::SReg(0);
|
|
sl@0
|
330 |
r[1] = a[0] + a[1];
|
|
sl@0
|
331 |
}
|
|
sl@0
|
332 |
|
|
sl@0
|
333 |
void TestDivS(const TReal32* a, TReal32* r)
|
|
sl@0
|
334 |
{
|
|
sl@0
|
335 |
Vfp::SetSReg(a[0], 1);
|
|
sl@0
|
336 |
Vfp::SetSReg(a[1], 2);
|
|
sl@0
|
337 |
Vfp::DivS();
|
|
sl@0
|
338 |
r[0] = Vfp::SReg(0);
|
|
sl@0
|
339 |
TRealX x(a[0]);
|
|
sl@0
|
340 |
TRealX y(a[1]);
|
|
sl@0
|
341 |
x.DivEq(y);
|
|
sl@0
|
342 |
r[1] = (TReal32)x;
|
|
sl@0
|
343 |
}
|
|
sl@0
|
344 |
|
|
sl@0
|
345 |
void TestMacS(const TReal32* a, TReal32* r)
|
|
sl@0
|
346 |
{
|
|
sl@0
|
347 |
Vfp::SetSReg(a[0], 0);
|
|
sl@0
|
348 |
Vfp::SetSReg(a[1], 1);
|
|
sl@0
|
349 |
Vfp::SetSReg(a[2], 2);
|
|
sl@0
|
350 |
Vfp::MacS();
|
|
sl@0
|
351 |
r[0] = Vfp::SReg(0);
|
|
sl@0
|
352 |
r[1] = a[0] + a[1] * a[2];
|
|
sl@0
|
353 |
}
|
|
sl@0
|
354 |
|
|
sl@0
|
355 |
void TestMscS(const TReal32* a, TReal32* r)
|
|
sl@0
|
356 |
{
|
|
sl@0
|
357 |
Vfp::SetSReg(a[0], 0);
|
|
sl@0
|
358 |
Vfp::SetSReg(a[1], 1);
|
|
sl@0
|
359 |
Vfp::SetSReg(a[2], 2);
|
|
sl@0
|
360 |
Vfp::MscS();
|
|
sl@0
|
361 |
r[0] = Vfp::SReg(0);
|
|
sl@0
|
362 |
r[1] = a[1] * a[2] - a[0];
|
|
sl@0
|
363 |
}
|
|
sl@0
|
364 |
|
|
sl@0
|
365 |
void TestMulS(const TReal32* a, TReal32* r)
|
|
sl@0
|
366 |
{
|
|
sl@0
|
367 |
Vfp::SetSReg(a[0], 1);
|
|
sl@0
|
368 |
Vfp::SetSReg(a[1], 2);
|
|
sl@0
|
369 |
Vfp::MulS();
|
|
sl@0
|
370 |
r[0] = Vfp::SReg(0);
|
|
sl@0
|
371 |
TRealX x(a[0]);
|
|
sl@0
|
372 |
TRealX y(a[1]);
|
|
sl@0
|
373 |
x.MultEq(y);
|
|
sl@0
|
374 |
r[1] = (TReal32)x;
|
|
sl@0
|
375 |
}
|
|
sl@0
|
376 |
|
|
sl@0
|
377 |
void TestNegS(const TReal32* a, TReal32* r)
|
|
sl@0
|
378 |
{
|
|
sl@0
|
379 |
Vfp::SetSReg(a[0], 1);
|
|
sl@0
|
380 |
Vfp::NegS();
|
|
sl@0
|
381 |
r[0] = Vfp::SReg(0);
|
|
sl@0
|
382 |
r[1] = -a[0];
|
|
sl@0
|
383 |
}
|
|
sl@0
|
384 |
|
|
sl@0
|
385 |
void TestNMacS(const TReal32* a, TReal32* r)
|
|
sl@0
|
386 |
{
|
|
sl@0
|
387 |
Vfp::SetSReg(a[0], 0);
|
|
sl@0
|
388 |
Vfp::SetSReg(a[1], 1);
|
|
sl@0
|
389 |
Vfp::SetSReg(a[2], 2);
|
|
sl@0
|
390 |
Vfp::NMacS();
|
|
sl@0
|
391 |
r[0] = Vfp::SReg(0);
|
|
sl@0
|
392 |
r[1] = a[0] - a[1] * a[2];
|
|
sl@0
|
393 |
}
|
|
sl@0
|
394 |
|
|
sl@0
|
395 |
void TestNMscS(const TReal32* a, TReal32* r)
|
|
sl@0
|
396 |
{
|
|
sl@0
|
397 |
Vfp::SetSReg(a[0], 0);
|
|
sl@0
|
398 |
Vfp::SetSReg(a[1], 1);
|
|
sl@0
|
399 |
Vfp::SetSReg(a[2], 2);
|
|
sl@0
|
400 |
Vfp::NMscS();
|
|
sl@0
|
401 |
r[0] = Vfp::SReg(0);
|
|
sl@0
|
402 |
r[1] = -a[1] * a[2] - a[0];
|
|
sl@0
|
403 |
}
|
|
sl@0
|
404 |
|
|
sl@0
|
405 |
void TestNMulS(const TReal32* a, TReal32* r)
|
|
sl@0
|
406 |
{
|
|
sl@0
|
407 |
Vfp::SetSReg(a[0], 1);
|
|
sl@0
|
408 |
Vfp::SetSReg(a[1], 2);
|
|
sl@0
|
409 |
Vfp::NMulS();
|
|
sl@0
|
410 |
r[0] = Vfp::SReg(0);
|
|
sl@0
|
411 |
TRealX x(a[0]);
|
|
sl@0
|
412 |
TRealX y(a[1]);
|
|
sl@0
|
413 |
x.MultEq(y);
|
|
sl@0
|
414 |
r[1] = -(TReal32)x;
|
|
sl@0
|
415 |
}
|
|
sl@0
|
416 |
|
|
sl@0
|
417 |
void TestSqrtS(const TReal32* a, TReal32* r)
|
|
sl@0
|
418 |
{
|
|
sl@0
|
419 |
Vfp::SetSReg(a[0], 1);
|
|
sl@0
|
420 |
Vfp::SqrtS();
|
|
sl@0
|
421 |
r[0] = Vfp::SReg(0);
|
|
sl@0
|
422 |
TReal x = a[0];
|
|
sl@0
|
423 |
TReal y;
|
|
sl@0
|
424 |
Math::Sqrt(y, x);
|
|
sl@0
|
425 |
r[1] = (TReal32)y;
|
|
sl@0
|
426 |
}
|
|
sl@0
|
427 |
|
|
sl@0
|
428 |
void TestSubS(const TReal32* a, TReal32* r)
|
|
sl@0
|
429 |
{
|
|
sl@0
|
430 |
Vfp::SetSReg(a[0], 1);
|
|
sl@0
|
431 |
Vfp::SetSReg(a[1], 2);
|
|
sl@0
|
432 |
Vfp::SubS();
|
|
sl@0
|
433 |
r[0] = Vfp::SReg(0);
|
|
sl@0
|
434 |
r[1] = a[0] - a[1];
|
|
sl@0
|
435 |
}
|
|
sl@0
|
436 |
|
|
sl@0
|
437 |
|
|
sl@0
|
438 |
|
|
sl@0
|
439 |
void TestAbsD(const TReal64* a, TReal64* r)
|
|
sl@0
|
440 |
{
|
|
sl@0
|
441 |
Vfp::SetDReg(a[0], 1);
|
|
sl@0
|
442 |
Vfp::AbsD();
|
|
sl@0
|
443 |
r[0] = Vfp::DReg(0);
|
|
sl@0
|
444 |
r[1] = Abs(a[0]);
|
|
sl@0
|
445 |
}
|
|
sl@0
|
446 |
|
|
sl@0
|
447 |
void TestAddD(const TReal64* a, TReal64* r)
|
|
sl@0
|
448 |
{
|
|
sl@0
|
449 |
Vfp::SetDReg(a[0], 1);
|
|
sl@0
|
450 |
Vfp::SetDReg(a[1], 2);
|
|
sl@0
|
451 |
Vfp::AddD();
|
|
sl@0
|
452 |
r[0] = Vfp::DReg(0);
|
|
sl@0
|
453 |
r[1] = a[0] + a[1];
|
|
sl@0
|
454 |
}
|
|
sl@0
|
455 |
|
|
sl@0
|
456 |
void TestDivD(const TReal64* a, TReal64* r)
|
|
sl@0
|
457 |
{
|
|
sl@0
|
458 |
Vfp::SetDReg(a[0], 1);
|
|
sl@0
|
459 |
Vfp::SetDReg(a[1], 2);
|
|
sl@0
|
460 |
Vfp::DivD();
|
|
sl@0
|
461 |
r[0] = Vfp::DReg(0);
|
|
sl@0
|
462 |
TRealX x(a[0]);
|
|
sl@0
|
463 |
TRealX y(a[1]);
|
|
sl@0
|
464 |
x.DivEq(y);
|
|
sl@0
|
465 |
r[1] = (TReal64)x;
|
|
sl@0
|
466 |
}
|
|
sl@0
|
467 |
|
|
sl@0
|
468 |
void TestMacD(const TReal64* a, TReal64* r)
|
|
sl@0
|
469 |
{
|
|
sl@0
|
470 |
Vfp::SetDReg(a[0], 0);
|
|
sl@0
|
471 |
Vfp::SetDReg(a[1], 1);
|
|
sl@0
|
472 |
Vfp::SetDReg(a[2], 2);
|
|
sl@0
|
473 |
Vfp::MacD();
|
|
sl@0
|
474 |
r[0] = Vfp::DReg(0);
|
|
sl@0
|
475 |
r[1] = a[0] + a[1] * a[2];
|
|
sl@0
|
476 |
}
|
|
sl@0
|
477 |
|
|
sl@0
|
478 |
void TestMscD(const TReal64* a, TReal64* r)
|
|
sl@0
|
479 |
{
|
|
sl@0
|
480 |
Vfp::SetDReg(a[0], 0);
|
|
sl@0
|
481 |
Vfp::SetDReg(a[1], 1);
|
|
sl@0
|
482 |
Vfp::SetDReg(a[2], 2);
|
|
sl@0
|
483 |
Vfp::MscD();
|
|
sl@0
|
484 |
r[0] = Vfp::DReg(0);
|
|
sl@0
|
485 |
r[1] = a[1] * a[2] - a[0];
|
|
sl@0
|
486 |
}
|
|
sl@0
|
487 |
|
|
sl@0
|
488 |
void TestMulD(const TReal64* a, TReal64* r)
|
|
sl@0
|
489 |
{
|
|
sl@0
|
490 |
Vfp::SetDReg(a[0], 1);
|
|
sl@0
|
491 |
Vfp::SetDReg(a[1], 2);
|
|
sl@0
|
492 |
Vfp::MulD();
|
|
sl@0
|
493 |
r[0] = Vfp::DReg(0);
|
|
sl@0
|
494 |
TRealX x(a[0]);
|
|
sl@0
|
495 |
TRealX y(a[1]);
|
|
sl@0
|
496 |
x.MultEq(y);
|
|
sl@0
|
497 |
r[1] = (TReal64)x;
|
|
sl@0
|
498 |
}
|
|
sl@0
|
499 |
|
|
sl@0
|
500 |
void TestNegD(const TReal64* a, TReal64* r)
|
|
sl@0
|
501 |
{
|
|
sl@0
|
502 |
Vfp::SetDReg(a[0], 1);
|
|
sl@0
|
503 |
Vfp::NegD();
|
|
sl@0
|
504 |
r[0] = Vfp::DReg(0);
|
|
sl@0
|
505 |
r[1] = -a[0];
|
|
sl@0
|
506 |
}
|
|
sl@0
|
507 |
|
|
sl@0
|
508 |
void TestNMacD(const TReal64* a, TReal64* r)
|
|
sl@0
|
509 |
{
|
|
sl@0
|
510 |
Vfp::SetDReg(a[0], 0);
|
|
sl@0
|
511 |
Vfp::SetDReg(a[1], 1);
|
|
sl@0
|
512 |
Vfp::SetDReg(a[2], 2);
|
|
sl@0
|
513 |
Vfp::NMacD();
|
|
sl@0
|
514 |
r[0] = Vfp::DReg(0);
|
|
sl@0
|
515 |
r[1] = a[0] - a[1] * a[2];
|
|
sl@0
|
516 |
}
|
|
sl@0
|
517 |
|
|
sl@0
|
518 |
void TestNMscD(const TReal64* a, TReal64* r)
|
|
sl@0
|
519 |
{
|
|
sl@0
|
520 |
Vfp::SetDReg(a[0], 0);
|
|
sl@0
|
521 |
Vfp::SetDReg(a[1], 1);
|
|
sl@0
|
522 |
Vfp::SetDReg(a[2], 2);
|
|
sl@0
|
523 |
Vfp::NMscD();
|
|
sl@0
|
524 |
r[0] = Vfp::DReg(0);
|
|
sl@0
|
525 |
r[1] = -a[1] * a[2] - a[0];
|
|
sl@0
|
526 |
}
|
|
sl@0
|
527 |
|
|
sl@0
|
528 |
void TestNMulD(const TReal64* a, TReal64* r)
|
|
sl@0
|
529 |
{
|
|
sl@0
|
530 |
Vfp::SetDReg(a[0], 1);
|
|
sl@0
|
531 |
Vfp::SetDReg(a[1], 2);
|
|
sl@0
|
532 |
Vfp::NMulD();
|
|
sl@0
|
533 |
r[0] = Vfp::DReg(0);
|
|
sl@0
|
534 |
TRealX x(a[0]);
|
|
sl@0
|
535 |
TRealX y(a[1]);
|
|
sl@0
|
536 |
x.MultEq(y);
|
|
sl@0
|
537 |
r[1] = -(TReal64)x;
|
|
sl@0
|
538 |
}
|
|
sl@0
|
539 |
|
|
sl@0
|
540 |
void TestSqrtD(const TReal64* a, TReal64* r)
|
|
sl@0
|
541 |
{
|
|
sl@0
|
542 |
Vfp::SetDReg(a[0], 1);
|
|
sl@0
|
543 |
Vfp::SqrtD();
|
|
sl@0
|
544 |
r[0] = Vfp::DReg(0);
|
|
sl@0
|
545 |
TReal x = a[0];
|
|
sl@0
|
546 |
TReal y;
|
|
sl@0
|
547 |
Math::Sqrt(y, x);
|
|
sl@0
|
548 |
r[1] = (TReal64)y;
|
|
sl@0
|
549 |
}
|
|
sl@0
|
550 |
|
|
sl@0
|
551 |
void TestSubD(const TReal64* a, TReal64* r)
|
|
sl@0
|
552 |
{
|
|
sl@0
|
553 |
Vfp::SetDReg(a[0], 1);
|
|
sl@0
|
554 |
Vfp::SetDReg(a[1], 2);
|
|
sl@0
|
555 |
Vfp::SubD();
|
|
sl@0
|
556 |
r[0] = Vfp::DReg(0);
|
|
sl@0
|
557 |
r[1] = a[0] - a[1];
|
|
sl@0
|
558 |
}
|
|
sl@0
|
559 |
|
|
sl@0
|
560 |
#define DO_SGL_TEST1(name, func, a1) DoSglTest(name, __LINE__, func, a1)
|
|
sl@0
|
561 |
#define DO_SGL_TEST2(name, func, a1, a2) DoSglTest(name, __LINE__, func, a1, a2)
|
|
sl@0
|
562 |
#define DO_SGL_TEST3(name, func, a1, a2, a3) DoSglTest(name, __LINE__, func, a1, a2, a3)
|
|
sl@0
|
563 |
void DoSglTest(const char* aName, TInt aLine, TSglTest aFunc, TReal32 a1, TReal32 a2=0.0f, TReal32 a3=0.0f)
|
|
sl@0
|
564 |
{
|
|
sl@0
|
565 |
TPtrC8 name8((const TText8*)aName);
|
|
sl@0
|
566 |
TBuf<128> name16;
|
|
sl@0
|
567 |
name16.Copy(name8);
|
|
sl@0
|
568 |
test.Printf(_L("%S(%g,%g,%g)\n"), &name16, a1, a2, a3);
|
|
sl@0
|
569 |
TReal32 args[3] = {a1, a2, a3};
|
|
sl@0
|
570 |
TReal32 results[2];
|
|
sl@0
|
571 |
(*aFunc)(args, results);
|
|
sl@0
|
572 |
if (IEEEMode)
|
|
sl@0
|
573 |
{
|
|
sl@0
|
574 |
if (*((TUint32*)&(results[0])) == *((TUint32*)&(results[1])))
|
|
sl@0
|
575 |
return;
|
|
sl@0
|
576 |
}
|
|
sl@0
|
577 |
else
|
|
sl@0
|
578 |
{
|
|
sl@0
|
579 |
if (results[0] == results[1])
|
|
sl@0
|
580 |
return;
|
|
sl@0
|
581 |
}
|
|
sl@0
|
582 |
const TUint32* pa = (const TUint32*)args;
|
|
sl@0
|
583 |
const TUint32* pr = (const TUint32*)results;
|
|
sl@0
|
584 |
test.Printf(_L("a1=%08x a2=%08x a3=%08x\n"), pa[0], pa[1], pa[2]);
|
|
sl@0
|
585 |
test.Printf(_L("actual result = %08x (%g)\nexpected result = %08x (%g)\n"), pr[0], results[0], pr[1], results[1]);
|
|
sl@0
|
586 |
test.Printf(_L("Test at line %d failed\n"), aLine);
|
|
sl@0
|
587 |
test(0);
|
|
sl@0
|
588 |
}
|
|
sl@0
|
589 |
|
|
sl@0
|
590 |
void DoSglTests()
|
|
sl@0
|
591 |
{
|
|
sl@0
|
592 |
// ABS
|
|
sl@0
|
593 |
DO_SGL_TEST1("ABS", &TestAbsS, 1.0f);
|
|
sl@0
|
594 |
DO_SGL_TEST1("ABS", &TestAbsS, -1.0f);
|
|
sl@0
|
595 |
DO_SGL_TEST1("ABS", &TestAbsS, 0.0f);
|
|
sl@0
|
596 |
DO_SGL_TEST1("ABS", &TestAbsS, -3.1415926536f);
|
|
sl@0
|
597 |
|
|
sl@0
|
598 |
// NEG
|
|
sl@0
|
599 |
DO_SGL_TEST1("NEG", &TestNegS, 1.0f);
|
|
sl@0
|
600 |
DO_SGL_TEST1("NEG", &TestNegS, -1.0f);
|
|
sl@0
|
601 |
DO_SGL_TEST1("NEG", &TestNegS, 0.0f);
|
|
sl@0
|
602 |
DO_SGL_TEST1("NEG", &TestNegS, -3.1415926536f);
|
|
sl@0
|
603 |
|
|
sl@0
|
604 |
// ADD
|
|
sl@0
|
605 |
DO_SGL_TEST2("ADD", &TestAddS, 0.0f, 0.0f);
|
|
sl@0
|
606 |
DO_SGL_TEST2("ADD", &TestAddS, 0.0f, 1.0f);
|
|
sl@0
|
607 |
DO_SGL_TEST2("ADD", &TestAddS, -1.0f, 1.0f);
|
|
sl@0
|
608 |
DO_SGL_TEST2("ADD", &TestAddS, 1.0f, 2.5f);
|
|
sl@0
|
609 |
DO_SGL_TEST2("ADD", &TestAddS, 1.0f, 6.022045e23f);
|
|
sl@0
|
610 |
DO_SGL_TEST2("ADD", &TestAddS, -7.3890561f, 1.414213562f);
|
|
sl@0
|
611 |
DO_SGL_TEST2("ADD", &TestAddS, -7.3890561f, -1.414213562f);
|
|
sl@0
|
612 |
|
|
sl@0
|
613 |
// SUB
|
|
sl@0
|
614 |
DO_SGL_TEST2("SUB", &TestSubS, 0.0f, 0.0f);
|
|
sl@0
|
615 |
DO_SGL_TEST2("SUB", &TestSubS, 0.0f, 1.0f);
|
|
sl@0
|
616 |
DO_SGL_TEST2("SUB", &TestSubS, 1.0f, 1.0f);
|
|
sl@0
|
617 |
DO_SGL_TEST2("SUB", &TestSubS, 1.0f, 2.5f);
|
|
sl@0
|
618 |
DO_SGL_TEST2("SUB", &TestSubS, 91.0f, 2.5f);
|
|
sl@0
|
619 |
DO_SGL_TEST2("SUB", &TestSubS, 1.0f, 6.022045e23f);
|
|
sl@0
|
620 |
DO_SGL_TEST2("SUB", &TestSubS, -7.3890561f, 1.414213562f);
|
|
sl@0
|
621 |
DO_SGL_TEST2("SUB", &TestSubS, -7.3890561f, -1.414213562f);
|
|
sl@0
|
622 |
|
|
sl@0
|
623 |
// MUL
|
|
sl@0
|
624 |
DO_SGL_TEST2("MUL", &TestMulS, 0.0f, 0.0f);
|
|
sl@0
|
625 |
DO_SGL_TEST2("MUL", &TestMulS, 1.0f, 0.0f);
|
|
sl@0
|
626 |
DO_SGL_TEST2("MUL", &TestMulS, 0.0f, 1.0f);
|
|
sl@0
|
627 |
DO_SGL_TEST2("MUL", &TestMulS, 2.5f, 6.5f);
|
|
sl@0
|
628 |
DO_SGL_TEST2("MUL", &TestMulS, -39.6f, 19.72f);
|
|
sl@0
|
629 |
DO_SGL_TEST2("MUL", &TestMulS, -10.1f, -20.1f);
|
|
sl@0
|
630 |
DO_SGL_TEST2("MUL", &TestMulS, 1e20f, 1e20f);
|
|
sl@0
|
631 |
DO_SGL_TEST2("MUL", &TestMulS, 1e-30f, 1e-30f);
|
|
sl@0
|
632 |
|
|
sl@0
|
633 |
// DIV
|
|
sl@0
|
634 |
DO_SGL_TEST2("DIV", &TestDivS, 0.0f, 1.0f);
|
|
sl@0
|
635 |
DO_SGL_TEST2("DIV", &TestDivS, 1.0f, 5.0f);
|
|
sl@0
|
636 |
DO_SGL_TEST2("DIV", &TestDivS, 1.0f, -5.0f);
|
|
sl@0
|
637 |
DO_SGL_TEST2("DIV", &TestDivS, -1.0f, 5.0f);
|
|
sl@0
|
638 |
DO_SGL_TEST2("DIV", &TestDivS, -1.0f, -5.0f);
|
|
sl@0
|
639 |
DO_SGL_TEST2("DIV", &TestDivS, 7.3890561f, 2.7182818f);
|
|
sl@0
|
640 |
DO_SGL_TEST2("DIV", &TestDivS, 1e20f, 1e-20f);
|
|
sl@0
|
641 |
DO_SGL_TEST2("DIV", &TestDivS, 1e-30f, 1e30f);
|
|
sl@0
|
642 |
|
|
sl@0
|
643 |
// NMUL
|
|
sl@0
|
644 |
DO_SGL_TEST2("NMUL", &TestNMulS, 0.0f, 0.0f);
|
|
sl@0
|
645 |
DO_SGL_TEST2("NMUL", &TestNMulS, 1.0f, 0.0f);
|
|
sl@0
|
646 |
DO_SGL_TEST2("NMUL", &TestNMulS, 0.0f, 1.0f);
|
|
sl@0
|
647 |
DO_SGL_TEST2("NMUL", &TestNMulS, 2.5f, 6.5f);
|
|
sl@0
|
648 |
DO_SGL_TEST2("NMUL", &TestNMulS, -39.6f, 19.72f);
|
|
sl@0
|
649 |
DO_SGL_TEST2("NMUL", &TestNMulS, -10.1f, -20.1f);
|
|
sl@0
|
650 |
DO_SGL_TEST2("NMUL", &TestNMulS, 1e20f, 1e20f);
|
|
sl@0
|
651 |
DO_SGL_TEST2("NMUL", &TestNMulS, 1e-30f, 1e-30f);
|
|
sl@0
|
652 |
|
|
sl@0
|
653 |
// SQRT
|
|
sl@0
|
654 |
DO_SGL_TEST1("SQRT", &TestSqrtS, 0.0f);
|
|
sl@0
|
655 |
DO_SGL_TEST1("SQRT", &TestSqrtS, 1.0f);
|
|
sl@0
|
656 |
DO_SGL_TEST1("SQRT", &TestSqrtS, 2.0f);
|
|
sl@0
|
657 |
DO_SGL_TEST1("SQRT", &TestSqrtS, 3.0f);
|
|
sl@0
|
658 |
DO_SGL_TEST1("SQRT", &TestSqrtS, 9096256.0f);
|
|
sl@0
|
659 |
DO_SGL_TEST1("SQRT", &TestSqrtS, 1e36f);
|
|
sl@0
|
660 |
DO_SGL_TEST1("SQRT", &TestSqrtS, 1e-36f);
|
|
sl@0
|
661 |
|
|
sl@0
|
662 |
// MAC
|
|
sl@0
|
663 |
DO_SGL_TEST3("MAC", &TestMacS, 0.0f, 0.0f, 0.0f);
|
|
sl@0
|
664 |
DO_SGL_TEST3("MAC", &TestMacS, 0.0f, 1.0f, 0.0f);
|
|
sl@0
|
665 |
DO_SGL_TEST3("MAC", &TestMacS, 0.0f, 1.0f, 1.0f);
|
|
sl@0
|
666 |
DO_SGL_TEST3("MAC", &TestMacS, -1.0f, 1.0f, 1.0f);
|
|
sl@0
|
667 |
DO_SGL_TEST3("MAC", &TestMacS, 0.8f, 0.1f, 8.0f);
|
|
sl@0
|
668 |
DO_SGL_TEST3("MAC", &TestMacS, 0.8f, -0.1f, 8.0f);
|
|
sl@0
|
669 |
DO_SGL_TEST3("MAC", &TestMacS, -0.8f, -0.1f, -8.0f);
|
|
sl@0
|
670 |
DO_SGL_TEST3("MAC", &TestMacS, 0.8f, 0.3333333333f, 3.1415926536f);
|
|
sl@0
|
671 |
|
|
sl@0
|
672 |
// MSC
|
|
sl@0
|
673 |
DO_SGL_TEST3("MSC", &TestMscS, 0.0f, 0.0f, 0.0f);
|
|
sl@0
|
674 |
DO_SGL_TEST3("MSC", &TestMscS, 0.0f, 1.0f, 0.0f);
|
|
sl@0
|
675 |
DO_SGL_TEST3("MSC", &TestMscS, 0.0f, 1.0f, 1.0f);
|
|
sl@0
|
676 |
DO_SGL_TEST3("MSC", &TestMscS, -1.0f, 1.0f, 1.0f);
|
|
sl@0
|
677 |
DO_SGL_TEST3("MSC", &TestMscS, 0.8f, 0.1f, 8.0f);
|
|
sl@0
|
678 |
DO_SGL_TEST3("MSC", &TestMscS, 0.8f, -0.1f, 8.0f);
|
|
sl@0
|
679 |
DO_SGL_TEST3("MSC", &TestMscS, -0.8f, -0.1f, -8.0f);
|
|
sl@0
|
680 |
DO_SGL_TEST3("MSC", &TestMscS, 0.8f, 0.3333333333f, 3.1415926536f);
|
|
sl@0
|
681 |
|
|
sl@0
|
682 |
// NMAC
|
|
sl@0
|
683 |
DO_SGL_TEST3("NMAC", &TestNMacS, 0.0f, 0.0f, 0.0f);
|
|
sl@0
|
684 |
DO_SGL_TEST3("NMAC", &TestNMacS, 0.0f, 1.0f, 0.0f);
|
|
sl@0
|
685 |
DO_SGL_TEST3("NMAC", &TestNMacS, 0.0f, 1.0f, 1.0f);
|
|
sl@0
|
686 |
DO_SGL_TEST3("NMAC", &TestNMacS, -1.0f, 1.0f, 1.0f);
|
|
sl@0
|
687 |
DO_SGL_TEST3("NMAC", &TestNMacS, 0.8f, 0.1f, 8.0f);
|
|
sl@0
|
688 |
DO_SGL_TEST3("NMAC", &TestNMacS, 0.8f, -0.1f, 8.0f);
|
|
sl@0
|
689 |
DO_SGL_TEST3("NMAC", &TestNMacS, -0.8f, -0.1f, -8.0f);
|
|
sl@0
|
690 |
DO_SGL_TEST3("NMAC", &TestNMacS, 0.8f, 0.3333333333f, 3.1415926536f);
|
|
sl@0
|
691 |
|
|
sl@0
|
692 |
// NMSC
|
|
sl@0
|
693 |
DO_SGL_TEST3("NMSC", &TestNMscS, 0.0f, 0.0f, 0.0f);
|
|
sl@0
|
694 |
DO_SGL_TEST3("NMSC", &TestNMscS, 0.0f, 1.0f, 0.0f);
|
|
sl@0
|
695 |
DO_SGL_TEST3("NMSC", &TestNMscS, 0.0f, 1.0f, 1.0f);
|
|
sl@0
|
696 |
DO_SGL_TEST3("NMSC", &TestNMscS, -1.0f, 1.0f, 1.0f);
|
|
sl@0
|
697 |
DO_SGL_TEST3("NMSC", &TestNMscS, 0.8f, 0.1f, 8.0f);
|
|
sl@0
|
698 |
DO_SGL_TEST3("NMSC", &TestNMscS, 0.8f, -0.1f, 8.0f);
|
|
sl@0
|
699 |
DO_SGL_TEST3("NMSC", &TestNMscS, -0.8f, -0.1f, -8.0f);
|
|
sl@0
|
700 |
DO_SGL_TEST3("NMSC", &TestNMscS, 0.8f, 0.3333333333f, 3.1415926536f);
|
|
sl@0
|
701 |
}
|
|
sl@0
|
702 |
|
|
sl@0
|
703 |
#define DO_DBL_TEST1(name, func, a1) DoDblTest(name, __LINE__, func, a1)
|
|
sl@0
|
704 |
#define DO_DBL_TEST2(name, func, a1, a2) DoDblTest(name, __LINE__, func, a1, a2)
|
|
sl@0
|
705 |
#define DO_DBL_TEST3(name, func, a1, a2, a3) DoDblTest(name, __LINE__, func, a1, a2, a3)
|
|
sl@0
|
706 |
void DoDblTest(const char* aName, TInt aLine, TDblTest aFunc, TReal64 a1, TReal64 a2=0.0, TReal64 a3=0.0)
|
|
sl@0
|
707 |
{
|
|
sl@0
|
708 |
TPtrC8 name8((const TText8*)aName);
|
|
sl@0
|
709 |
TBuf<128> name16;
|
|
sl@0
|
710 |
name16.Copy(name8);
|
|
sl@0
|
711 |
test.Printf(_L("%S(%g,%g,%g)\n"), &name16, a1, a2, a3);
|
|
sl@0
|
712 |
TReal64 args[3] = {a1, a2, a3};
|
|
sl@0
|
713 |
TReal64 results[2];
|
|
sl@0
|
714 |
SDouble sargs[3];
|
|
sl@0
|
715 |
sargs[0] = a1;
|
|
sl@0
|
716 |
sargs[1] = a2;
|
|
sl@0
|
717 |
sargs[2] = a3;
|
|
sl@0
|
718 |
(*aFunc)(args, results);
|
|
sl@0
|
719 |
if (IEEEMode)
|
|
sl@0
|
720 |
{
|
|
sl@0
|
721 |
if (*((TUint64*)&(results[0])) == *((TUint64*)&(results[1])))
|
|
sl@0
|
722 |
return;
|
|
sl@0
|
723 |
}
|
|
sl@0
|
724 |
else
|
|
sl@0
|
725 |
{
|
|
sl@0
|
726 |
if (results[0] == results[1])
|
|
sl@0
|
727 |
return;
|
|
sl@0
|
728 |
}
|
|
sl@0
|
729 |
SDouble sres[3];
|
|
sl@0
|
730 |
sres[0] = results[0];
|
|
sl@0
|
731 |
sres[1] = results[1];
|
|
sl@0
|
732 |
test.Printf(_L("a1=%08x %08x\na2=%08x %08x\na3=%08x %08x\n"), sargs[0].iData[1], sargs[0].iData[0],
|
|
sl@0
|
733 |
sargs[1].iData[1], sargs[1].iData[0], sargs[2].iData[1], sargs[2].iData[0]);
|
|
sl@0
|
734 |
test.Printf(_L("actual result = %08x %08x (%g)\nexpected result = %08x %08x (%g)\n"),
|
|
sl@0
|
735 |
sres[0].iData[1], sres[0].iData[0], results[0], sres[1].iData[1], sres[1].iData[0], results[1]);
|
|
sl@0
|
736 |
test.Printf(_L("Test at line %d failed\n"), aLine);
|
|
sl@0
|
737 |
test(0);
|
|
sl@0
|
738 |
}
|
|
sl@0
|
739 |
|
|
sl@0
|
740 |
void DoDblTests()
|
|
sl@0
|
741 |
{
|
|
sl@0
|
742 |
// ABS
|
|
sl@0
|
743 |
DO_DBL_TEST1("ABS", &TestAbsD, 1.0);
|
|
sl@0
|
744 |
DO_DBL_TEST1("ABS", &TestAbsD, -1.0);
|
|
sl@0
|
745 |
DO_DBL_TEST1("ABS", &TestAbsD, 0.0);
|
|
sl@0
|
746 |
DO_DBL_TEST1("ABS", &TestAbsD, -3.1415926536);
|
|
sl@0
|
747 |
|
|
sl@0
|
748 |
// NEG
|
|
sl@0
|
749 |
DO_DBL_TEST1("NEG", &TestNegD, 1.0);
|
|
sl@0
|
750 |
DO_DBL_TEST1("NEG", &TestNegD, -1.0);
|
|
sl@0
|
751 |
DO_DBL_TEST1("NEG", &TestNegD, 0.0);
|
|
sl@0
|
752 |
DO_DBL_TEST1("NEG", &TestNegD, -3.1415926536);
|
|
sl@0
|
753 |
|
|
sl@0
|
754 |
// ADD
|
|
sl@0
|
755 |
DO_DBL_TEST2("ADD", &TestAddD, 0.0, 0.0);
|
|
sl@0
|
756 |
DO_DBL_TEST2("ADD", &TestAddD, 0.0, 1.0);
|
|
sl@0
|
757 |
DO_DBL_TEST2("ADD", &TestAddD, -1.0, 1.0);
|
|
sl@0
|
758 |
DO_DBL_TEST2("ADD", &TestAddD, 1.0, 2.5);
|
|
sl@0
|
759 |
DO_DBL_TEST2("ADD", &TestAddD, 1.0, 6.022045e23);
|
|
sl@0
|
760 |
DO_DBL_TEST2("ADD", &TestAddD, -7.3890561, 1.414213562);
|
|
sl@0
|
761 |
DO_DBL_TEST2("ADD", &TestAddD, -7.3890561, -1.414213562);
|
|
sl@0
|
762 |
|
|
sl@0
|
763 |
// SUB
|
|
sl@0
|
764 |
DO_DBL_TEST2("SUB", &TestSubD, 0.0, 0.0);
|
|
sl@0
|
765 |
DO_DBL_TEST2("SUB", &TestSubD, 0.0, 1.0);
|
|
sl@0
|
766 |
DO_DBL_TEST2("SUB", &TestSubD, 1.0, 1.0);
|
|
sl@0
|
767 |
DO_DBL_TEST2("SUB", &TestSubD, 1.0, 2.5);
|
|
sl@0
|
768 |
DO_DBL_TEST2("SUB", &TestSubD, 91.0, 2.5);
|
|
sl@0
|
769 |
DO_DBL_TEST2("SUB", &TestSubD, 1.0, 6.022045e23);
|
|
sl@0
|
770 |
DO_DBL_TEST2("SUB", &TestSubD, -7.3890561, 1.414213562);
|
|
sl@0
|
771 |
DO_DBL_TEST2("SUB", &TestSubD, -7.3890561, -1.414213562);
|
|
sl@0
|
772 |
|
|
sl@0
|
773 |
// MUL
|
|
sl@0
|
774 |
DO_DBL_TEST2("MUL", &TestMulD, 0.0, 0.0);
|
|
sl@0
|
775 |
DO_DBL_TEST2("MUL", &TestMulD, 1.0, 0.0);
|
|
sl@0
|
776 |
DO_DBL_TEST2("MUL", &TestMulD, 0.0, 1.0);
|
|
sl@0
|
777 |
DO_DBL_TEST2("MUL", &TestMulD, 2.5, 6.5);
|
|
sl@0
|
778 |
DO_DBL_TEST2("MUL", &TestMulD, -39.6, 19.72);
|
|
sl@0
|
779 |
DO_DBL_TEST2("MUL", &TestMulD, -10.1, -20.1);
|
|
sl@0
|
780 |
DO_DBL_TEST2("MUL", &TestMulD, 1e20, 1e20);
|
|
sl@0
|
781 |
DO_DBL_TEST2("MUL", &TestMulD, 1e100, 1e300);
|
|
sl@0
|
782 |
DO_DBL_TEST2("MUL", &TestMulD, 1e-20, 1e-20);
|
|
sl@0
|
783 |
DO_DBL_TEST2("MUL", &TestMulD, 1e-200, 1e-300);
|
|
sl@0
|
784 |
|
|
sl@0
|
785 |
// DIV
|
|
sl@0
|
786 |
DO_DBL_TEST2("DIV", &TestDivD, 0.0, 1.0);
|
|
sl@0
|
787 |
DO_DBL_TEST2("DIV", &TestDivD, 1.0, 5.0);
|
|
sl@0
|
788 |
DO_DBL_TEST2("DIV", &TestDivD, 1.0, -5.0);
|
|
sl@0
|
789 |
DO_DBL_TEST2("DIV", &TestDivD, -1.0, 5.0);
|
|
sl@0
|
790 |
DO_DBL_TEST2("DIV", &TestDivD, -1.0, -5.0);
|
|
sl@0
|
791 |
DO_DBL_TEST2("DIV", &TestDivD, 7.3890561, 2.7182818);
|
|
sl@0
|
792 |
DO_DBL_TEST2("DIV", &TestDivD, 1e20, 1e-20);
|
|
sl@0
|
793 |
DO_DBL_TEST2("DIV", &TestDivD, 1e-20, 1e20);
|
|
sl@0
|
794 |
DO_DBL_TEST2("DIV", &TestDivD, 1e-50, 1e300);
|
|
sl@0
|
795 |
|
|
sl@0
|
796 |
// NMUL
|
|
sl@0
|
797 |
DO_DBL_TEST2("NMUL", &TestNMulD, 0.0, 0.0);
|
|
sl@0
|
798 |
DO_DBL_TEST2("NMUL", &TestNMulD, 1.0, 0.0);
|
|
sl@0
|
799 |
DO_DBL_TEST2("NMUL", &TestNMulD, 0.0, 1.0);
|
|
sl@0
|
800 |
DO_DBL_TEST2("NMUL", &TestNMulD, 2.5, 6.5);
|
|
sl@0
|
801 |
DO_DBL_TEST2("NMUL", &TestNMulD, -39.6, 19.72);
|
|
sl@0
|
802 |
DO_DBL_TEST2("NMUL", &TestNMulD, -10.1, -20.1);
|
|
sl@0
|
803 |
DO_DBL_TEST2("NMUL", &TestNMulD, 1e20, 1e20);
|
|
sl@0
|
804 |
DO_DBL_TEST2("NMUL", &TestNMulD, 1e100, 1e300);
|
|
sl@0
|
805 |
DO_DBL_TEST2("NMUL", &TestNMulD, 1e-20, 1e-20);
|
|
sl@0
|
806 |
DO_DBL_TEST2("NMUL", &TestNMulD, 1e-200, 1e-300);
|
|
sl@0
|
807 |
|
|
sl@0
|
808 |
// SQRT
|
|
sl@0
|
809 |
DO_DBL_TEST1("SQRT", &TestSqrtD, 0.0);
|
|
sl@0
|
810 |
DO_DBL_TEST1("SQRT", &TestSqrtD, 1.0);
|
|
sl@0
|
811 |
DO_DBL_TEST1("SQRT", &TestSqrtD, 2.0);
|
|
sl@0
|
812 |
DO_DBL_TEST1("SQRT", &TestSqrtD, 3.0);
|
|
sl@0
|
813 |
DO_DBL_TEST1("SQRT", &TestSqrtD, 9096256.0);
|
|
sl@0
|
814 |
DO_DBL_TEST1("SQRT", &TestSqrtD, 1e36);
|
|
sl@0
|
815 |
DO_DBL_TEST1("SQRT", &TestSqrtD, 1e-36);
|
|
sl@0
|
816 |
|
|
sl@0
|
817 |
// MAC
|
|
sl@0
|
818 |
DO_DBL_TEST3("MAC", &TestMacD, 0.0, 0.0, 0.0);
|
|
sl@0
|
819 |
DO_DBL_TEST3("MAC", &TestMacD, 0.0, 1.0, 0.0);
|
|
sl@0
|
820 |
DO_DBL_TEST3("MAC", &TestMacD, 0.0, 1.0, 1.0);
|
|
sl@0
|
821 |
DO_DBL_TEST3("MAC", &TestMacD, -1.0, 1.0, 1.0);
|
|
sl@0
|
822 |
DO_DBL_TEST3("MAC", &TestMacD, 0.8, 0.1, 8.0);
|
|
sl@0
|
823 |
DO_DBL_TEST3("MAC", &TestMacD, 0.8, -0.1, 8.0);
|
|
sl@0
|
824 |
DO_DBL_TEST3("MAC", &TestMacD, -0.8, -0.1, -8.0);
|
|
sl@0
|
825 |
DO_DBL_TEST3("MAC", &TestMacD, 0.8, 0.3333333333, 3.1415926536);
|
|
sl@0
|
826 |
|
|
sl@0
|
827 |
// MSC
|
|
sl@0
|
828 |
DO_DBL_TEST3("MSC", &TestMscD, 0.0, 0.0, 0.0);
|
|
sl@0
|
829 |
DO_DBL_TEST3("MSC", &TestMscD, 0.0, 1.0, 0.0);
|
|
sl@0
|
830 |
DO_DBL_TEST3("MSC", &TestMscD, 0.0, 1.0, 1.0);
|
|
sl@0
|
831 |
DO_DBL_TEST3("MSC", &TestMscD, -1.0, 1.0, 1.0);
|
|
sl@0
|
832 |
DO_DBL_TEST3("MSC", &TestMscD, 0.8, 0.1, 8.0);
|
|
sl@0
|
833 |
DO_DBL_TEST3("MSC", &TestMscD, 0.8, -0.1, 8.0);
|
|
sl@0
|
834 |
DO_DBL_TEST3("MSC", &TestMscD, -0.8, -0.1, -8.0);
|
|
sl@0
|
835 |
DO_DBL_TEST3("MSC", &TestMscD, 0.8, 0.3333333333, 3.1415926536);
|
|
sl@0
|
836 |
|
|
sl@0
|
837 |
// NMAC
|
|
sl@0
|
838 |
DO_DBL_TEST3("NMAC", &TestNMacD, 0.0, 0.0, 0.0);
|
|
sl@0
|
839 |
DO_DBL_TEST3("NMAC", &TestNMacD, 0.0, 1.0, 0.0);
|
|
sl@0
|
840 |
DO_DBL_TEST3("NMAC", &TestNMacD, 0.0, 1.0, 1.0);
|
|
sl@0
|
841 |
DO_DBL_TEST3("NMAC", &TestNMacD, -1.0, 1.0, 1.0);
|
|
sl@0
|
842 |
DO_DBL_TEST3("NMAC", &TestNMacD, 0.8, 0.1, 8.0);
|
|
sl@0
|
843 |
DO_DBL_TEST3("NMAC", &TestNMacD, 0.8, -0.1, 8.0);
|
|
sl@0
|
844 |
DO_DBL_TEST3("NMAC", &TestNMacD, -0.8, -0.1, -8.0);
|
|
sl@0
|
845 |
DO_DBL_TEST3("NMAC", &TestNMacD, 0.8, 0.3333333333, 3.1415926536);
|
|
sl@0
|
846 |
|
|
sl@0
|
847 |
// NMSC
|
|
sl@0
|
848 |
DO_DBL_TEST3("NMSC", &TestNMscD, 0.0, 0.0, 0.0);
|
|
sl@0
|
849 |
DO_DBL_TEST3("NMSC", &TestNMscD, 0.0, 1.0, 0.0);
|
|
sl@0
|
850 |
DO_DBL_TEST3("NMSC", &TestNMscD, 0.0, 1.0, 1.0);
|
|
sl@0
|
851 |
DO_DBL_TEST3("NMSC", &TestNMscD, -1.0, 1.0, 1.0);
|
|
sl@0
|
852 |
DO_DBL_TEST3("NMSC", &TestNMscD, 0.8, 0.1, 8.0);
|
|
sl@0
|
853 |
DO_DBL_TEST3("NMSC", &TestNMscD, 0.8, -0.1, 8.0);
|
|
sl@0
|
854 |
DO_DBL_TEST3("NMSC", &TestNMscD, -0.8, -0.1, -8.0);
|
|
sl@0
|
855 |
DO_DBL_TEST3("NMSC", &TestNMscD, 0.8, 0.3333333333, 3.1415926536);
|
|
sl@0
|
856 |
}
|
|
sl@0
|
857 |
|
|
sl@0
|
858 |
void DoBounceTests()
|
|
sl@0
|
859 |
{
|
|
sl@0
|
860 |
test.Next(_L("Test denormal handling - single"));
|
|
sl@0
|
861 |
DO_SGL_TEST2("ADD", &TestAddS, 1e-39f, 1e-39f);
|
|
sl@0
|
862 |
test.Next(_L("Test potential underflow - single"));
|
|
sl@0
|
863 |
DO_SGL_TEST2("MUL", &TestMulS, 3.162e-20f, 3.162e-20f);
|
|
sl@0
|
864 |
// fails on VFPv2 hardware. ARM's library should be fixed
|
|
sl@0
|
865 |
// test.Next(_L("Test NaN input - single"));
|
|
sl@0
|
866 |
// TReal32 aSingleNaN;
|
|
sl@0
|
867 |
// *((TUint32*)&aSingleNaN) = 0x7F9ABCDE;
|
|
sl@0
|
868 |
// Vfp::SetSReg(aSingleNaN, 1);
|
|
sl@0
|
869 |
// Vfp::SetSReg(aSingleNaN, 2);
|
|
sl@0
|
870 |
// Vfp::AddS();
|
|
sl@0
|
871 |
// TReal32 aSingleResult = Vfp::SReg(0);
|
|
sl@0
|
872 |
// test(*((TUint32*)&aSingleResult) == 0x7FDABCDE);
|
|
sl@0
|
873 |
|
|
sl@0
|
874 |
if (Double)
|
|
sl@0
|
875 |
{
|
|
sl@0
|
876 |
test.Next(_L("Test denormal handling - double"));
|
|
sl@0
|
877 |
DO_DBL_TEST2("ADD", &TestAddD, 3.1234e-322, 3.1234e-322);
|
|
sl@0
|
878 |
test.Next(_L("Test potential underflow - double"));
|
|
sl@0
|
879 |
DO_DBL_TEST2("MUL", &TestMulD, 1.767e-161, 1.767e-161);
|
|
sl@0
|
880 |
// fails on VFPv2 hardware. ARM's library should be fixed
|
|
sl@0
|
881 |
// test.Next(_L("Test NaN input - double"));
|
|
sl@0
|
882 |
// TReal64 aDoubleNaN;
|
|
sl@0
|
883 |
// *((TUint64*)&aDoubleNaN) = 0x7FF0123456789ABCll;
|
|
sl@0
|
884 |
// Vfp::SetDReg(aDoubleNaN, 1);
|
|
sl@0
|
885 |
// Vfp::SetDReg(aDoubleNaN, 2);
|
|
sl@0
|
886 |
// Vfp::AddD();
|
|
sl@0
|
887 |
// TReal64 aDoubleResult = Vfp::DReg(0);
|
|
sl@0
|
888 |
// test(*((TUint64*)&aDoubleResult) == 0x7FF8123456789ABC);
|
|
sl@0
|
889 |
}
|
|
sl@0
|
890 |
}
|
|
sl@0
|
891 |
|
|
sl@0
|
892 |
void DoRunFastTests()
|
|
sl@0
|
893 |
{
|
|
sl@0
|
894 |
test.Next(_L("Test flushing denormals to zero - single"));
|
|
sl@0
|
895 |
Vfp::SetSReg(1e-39f, 1);
|
|
sl@0
|
896 |
Vfp::SetSReg(1e-39f, 2);
|
|
sl@0
|
897 |
Vfp::AddS();
|
|
sl@0
|
898 |
test(Vfp::SReg(0)==0);
|
|
sl@0
|
899 |
|
|
sl@0
|
900 |
test.Next(_L("Test flushing underflow to zero - single"));
|
|
sl@0
|
901 |
Vfp::SetSReg(3.162e-20f, 1);
|
|
sl@0
|
902 |
Vfp::SetSReg(3.162e-20f, 2);
|
|
sl@0
|
903 |
Vfp::MulS();
|
|
sl@0
|
904 |
test(Vfp::SReg(0)==0);
|
|
sl@0
|
905 |
|
|
sl@0
|
906 |
test.Next(_L("Test default NaNs - single"));
|
|
sl@0
|
907 |
TReal32 aSingleNaN;
|
|
sl@0
|
908 |
*((TUint32*)&aSingleNaN) = 0x7F9ABCDE;
|
|
sl@0
|
909 |
Vfp::SetSReg(aSingleNaN, 1);
|
|
sl@0
|
910 |
Vfp::SetSReg(aSingleNaN, 2);
|
|
sl@0
|
911 |
Vfp::AddS();
|
|
sl@0
|
912 |
TReal32 aSingleResult = Vfp::SReg(0);
|
|
sl@0
|
913 |
test(*((TUint32*)&aSingleResult) == 0x7FC00000);
|
|
sl@0
|
914 |
|
|
sl@0
|
915 |
if (Double)
|
|
sl@0
|
916 |
{
|
|
sl@0
|
917 |
test.Next(_L("Test flushing denormals to zero - double"));
|
|
sl@0
|
918 |
Vfp::SetDReg(3.1234e-322, 1);
|
|
sl@0
|
919 |
Vfp::SetDReg(3.1234e-322, 2);
|
|
sl@0
|
920 |
Vfp::AddD();
|
|
sl@0
|
921 |
test(Vfp::DReg(0)==0);
|
|
sl@0
|
922 |
|
|
sl@0
|
923 |
test.Next(_L("Test flushing underflow to zero - double"));
|
|
sl@0
|
924 |
Vfp::SetDReg(1.767e-161, 1);
|
|
sl@0
|
925 |
Vfp::SetDReg(1.767e-161, 2);
|
|
sl@0
|
926 |
Vfp::MulD();
|
|
sl@0
|
927 |
test(Vfp::DReg(0)==0);
|
|
sl@0
|
928 |
|
|
sl@0
|
929 |
test.Next(_L("Test default NaNs - double"));
|
|
sl@0
|
930 |
TReal64 aDoubleNaN;
|
|
sl@0
|
931 |
*((TUint64*)&aDoubleNaN) = 0x7FF0123456789ABCll;
|
|
sl@0
|
932 |
Vfp::SetDReg(aDoubleNaN, 1);
|
|
sl@0
|
933 |
Vfp::SetDReg(aDoubleNaN, 2);
|
|
sl@0
|
934 |
Vfp::AddD();
|
|
sl@0
|
935 |
TReal64 aDoubleResult = Vfp::DReg(0);
|
|
sl@0
|
936 |
test(*((TUint64*)&aDoubleResult) == 0x7FF8000000000000ll);
|
|
sl@0
|
937 |
}
|
|
sl@0
|
938 |
}
|
|
sl@0
|
939 |
|
|
sl@0
|
940 |
void TestAddSResult(const TReal32 a, const TReal32 b, const TReal32 r)
|
|
sl@0
|
941 |
{
|
|
sl@0
|
942 |
Vfp::SetSReg(a, 1);
|
|
sl@0
|
943 |
Vfp::SetSReg(b, 2);
|
|
sl@0
|
944 |
Vfp::AddS();
|
|
sl@0
|
945 |
test(Vfp::SReg(0) == r);
|
|
sl@0
|
946 |
}
|
|
sl@0
|
947 |
|
|
sl@0
|
948 |
void DoRoundingTests()
|
|
sl@0
|
949 |
{
|
|
sl@0
|
950 |
TFloatingPointMode fpmode = IEEEMode ? EFpModeIEEENoExceptions : EFpModeRunFast;
|
|
sl@0
|
951 |
test.Next(_L("Check default rounding to nearest"));
|
|
sl@0
|
952 |
test(User::SetFloatingPointMode(fpmode) == KErrNone);
|
|
sl@0
|
953 |
test.Next(_L("Check nearest-downward"));
|
|
sl@0
|
954 |
TestAddSResult(16777215, 0.49f, 16777215);
|
|
sl@0
|
955 |
test.Next(_L("Check nearest-upward"));
|
|
sl@0
|
956 |
TestAddSResult(16777215, 0.51f, 16777216);
|
|
sl@0
|
957 |
test.Next(_L("Set rounding mode to toward-plus-infinity"));
|
|
sl@0
|
958 |
test(User::SetFloatingPointMode(fpmode, EFpRoundToPlusInfinity) == KErrNone);
|
|
sl@0
|
959 |
test.Next(_L("Check positive rounding goes upward"));
|
|
sl@0
|
960 |
TestAddSResult(16777215, 0.49f, 16777216);
|
|
sl@0
|
961 |
test.Next(_L("Check negative rounding goes upward"));
|
|
sl@0
|
962 |
TestAddSResult(-16777215, -0.51f, -16777215);
|
|
sl@0
|
963 |
test.Next(_L("Set rounding mode to toward-minus-infinity"));
|
|
sl@0
|
964 |
test(User::SetFloatingPointMode(fpmode, EFpRoundToMinusInfinity) == KErrNone);
|
|
sl@0
|
965 |
test.Next(_L("Check positive rounding goes downward"));
|
|
sl@0
|
966 |
TestAddSResult(16777215, 0.51f, 16777215);
|
|
sl@0
|
967 |
test.Next(_L("Check negative rounding goes downward"));
|
|
sl@0
|
968 |
TestAddSResult(-16777215, -0.49f, -16777216);
|
|
sl@0
|
969 |
test.Next(_L("Set rounding mode to toward-zero"));
|
|
sl@0
|
970 |
test(User::SetFloatingPointMode(fpmode, EFpRoundToZero) == KErrNone);
|
|
sl@0
|
971 |
test.Next(_L("Check positive rounding goes downward"));
|
|
sl@0
|
972 |
TestAddSResult(16777215, 0.51f, 16777215);
|
|
sl@0
|
973 |
test.Next(_L("Check negative rounding goes upward"));
|
|
sl@0
|
974 |
TestAddSResult(-16777215, -0.51f, -16777215);
|
|
sl@0
|
975 |
}
|
|
sl@0
|
976 |
|
|
sl@0
|
977 |
TInt RunFastThread(TAny* /*unused*/)
|
|
sl@0
|
978 |
{
|
|
sl@0
|
979 |
Vfp::SetSReg(1e-39f, 1);
|
|
sl@0
|
980 |
Vfp::SetSReg(1e-39f, 2);
|
|
sl@0
|
981 |
Vfp::AddS();
|
|
sl@0
|
982 |
return (Vfp::SReg(0)==0) ? KErrNone : KErrGeneral;
|
|
sl@0
|
983 |
}
|
|
sl@0
|
984 |
|
|
sl@0
|
985 |
TInt IEEECompliantThread(TAny* /*unused*/)
|
|
sl@0
|
986 |
{
|
|
sl@0
|
987 |
Vfp::SetSReg(1e-39f, 1);
|
|
sl@0
|
988 |
Vfp::SetSReg(1e-39f, 2);
|
|
sl@0
|
989 |
Vfp::AddS();
|
|
sl@0
|
990 |
return (Vfp::SReg(0)==2e-39f) ? KErrNone : KErrGeneral;
|
|
sl@0
|
991 |
}
|
|
sl@0
|
992 |
|
|
sl@0
|
993 |
void TestVFPModeInheritance()
|
|
sl@0
|
994 |
{
|
|
sl@0
|
995 |
test.Printf(_L("Set floating point mode to RunFast\n"));
|
|
sl@0
|
996 |
test(User::SetFloatingPointMode(EFpModeRunFast)==KErrNone);
|
|
sl@0
|
997 |
RThread t;
|
|
sl@0
|
998 |
TInt r = t.Create(KNullDesC, &RunFastThread, 0x1000, NULL, NULL);
|
|
sl@0
|
999 |
test(r==KErrNone);
|
|
sl@0
|
1000 |
TRequestStatus s;
|
|
sl@0
|
1001 |
t.Logon(s);
|
|
sl@0
|
1002 |
test.Printf(_L("Run RunFast test in another thread...\n"));
|
|
sl@0
|
1003 |
t.Resume();
|
|
sl@0
|
1004 |
test.Printf(_L("Wait for other thread to terminate\n"));
|
|
sl@0
|
1005 |
User::WaitForRequest(s);
|
|
sl@0
|
1006 |
test(t.ExitType() == EExitKill);
|
|
sl@0
|
1007 |
test(s == KErrNone);
|
|
sl@0
|
1008 |
CLOSE_AND_WAIT(t);
|
|
sl@0
|
1009 |
test.Printf(_L("Set floating point mode to IEEE\n"));
|
|
sl@0
|
1010 |
test(User::SetFloatingPointMode(EFpModeIEEENoExceptions)==KErrNone);
|
|
sl@0
|
1011 |
r = t.Create(KNullDesC, &IEEECompliantThread, 0x1000, NULL, NULL);
|
|
sl@0
|
1012 |
test(r==KErrNone);
|
|
sl@0
|
1013 |
t.Logon(s);
|
|
sl@0
|
1014 |
test.Printf(_L("Run IEEE test in another thread...\n"));
|
|
sl@0
|
1015 |
t.Resume();
|
|
sl@0
|
1016 |
test.Printf(_L("Wait for other thread to terminate\n"));
|
|
sl@0
|
1017 |
User::WaitForRequest(s);
|
|
sl@0
|
1018 |
test(t.ExitType() == EExitKill);
|
|
sl@0
|
1019 |
test(s == KErrNone);
|
|
sl@0
|
1020 |
CLOSE_AND_WAIT(t);
|
|
sl@0
|
1021 |
}
|
|
sl@0
|
1022 |
|
|
sl@0
|
1023 |
|
|
sl@0
|
1024 |
void TestVFPv3()
|
|
sl@0
|
1025 |
{
|
|
sl@0
|
1026 |
test.Next(_L("Transferring to and from fixed point"));
|
|
sl@0
|
1027 |
|
|
sl@0
|
1028 |
Vfp::SetSReg(2.5f, 0);
|
|
sl@0
|
1029 |
test(Vfp::SReg(0)==2.5f);
|
|
sl@0
|
1030 |
Vfp::ToFixedS(3); // Convert to fixed (3) precision
|
|
sl@0
|
1031 |
test(Vfp::SRegInt(0)==0x14); // 10.100 in binary fixed(3) format
|
|
sl@0
|
1032 |
Vfp::FromFixedS(3); //Convert from fixed (3) precision
|
|
sl@0
|
1033 |
test(Vfp::SReg(0)==2.5f);
|
|
sl@0
|
1034 |
|
|
sl@0
|
1035 |
|
|
sl@0
|
1036 |
test.Next(_L("Setting immediate value to floating point registers"));
|
|
sl@0
|
1037 |
|
|
sl@0
|
1038 |
Vfp::SetSReg(5.0f, 0);
|
|
sl@0
|
1039 |
test(Vfp::SReg(0) == 5.0f);
|
|
sl@0
|
1040 |
Vfp::TconstS2();
|
|
sl@0
|
1041 |
test(Vfp::SReg(0) == 2.0f);
|
|
sl@0
|
1042 |
Vfp::SetSReg(5.0f, 0);
|
|
sl@0
|
1043 |
Vfp::TconstS2_8();
|
|
sl@0
|
1044 |
test(Vfp::SReg(0) == 2.875f);
|
|
sl@0
|
1045 |
|
|
sl@0
|
1046 |
Vfp::SetDReg(5.0f, 0);
|
|
sl@0
|
1047 |
test(Vfp::DReg(0) == 5.0f);
|
|
sl@0
|
1048 |
Vfp::TconstD2();
|
|
sl@0
|
1049 |
test(Vfp::DReg(0) == 2.0f);
|
|
sl@0
|
1050 |
Vfp::TconstD2_8();
|
|
sl@0
|
1051 |
test(Vfp::DReg(0) == 2.875f);
|
|
sl@0
|
1052 |
}
|
|
sl@0
|
1053 |
|
|
sl@0
|
1054 |
void TestNEON()
|
|
sl@0
|
1055 |
{
|
|
sl@0
|
1056 |
RThread t;
|
|
sl@0
|
1057 |
TRequestStatus s;
|
|
sl@0
|
1058 |
test.Next(_L("Test creating a thread to execute an F2-prefix instruction"));
|
|
sl@0
|
1059 |
test_KErrNone(t.Create(KNullDesC, &NeonWithF2, 0x1000, NULL, NULL));
|
|
sl@0
|
1060 |
t.Logon(s);
|
|
sl@0
|
1061 |
t.Resume();
|
|
sl@0
|
1062 |
User::WaitForRequest(s);
|
|
sl@0
|
1063 |
test(t.ExitType() == EExitKill);
|
|
sl@0
|
1064 |
test(s == KErrNone);
|
|
sl@0
|
1065 |
t.Close();
|
|
sl@0
|
1066 |
test.Next(_L("Test creating a thread to execute an F3-prefix instruction"));
|
|
sl@0
|
1067 |
test_KErrNone(t.Create(KNullDesC, &NeonWithF3, 0x1000, NULL, NULL));
|
|
sl@0
|
1068 |
t.Logon(s);
|
|
sl@0
|
1069 |
t.Resume();
|
|
sl@0
|
1070 |
User::WaitForRequest(s);
|
|
sl@0
|
1071 |
test(t.ExitType() == EExitKill);
|
|
sl@0
|
1072 |
test(s == KErrNone);
|
|
sl@0
|
1073 |
t.Close();
|
|
sl@0
|
1074 |
test.Next(_L("Test creating a thread to execute an F4x-prefix instruction"));
|
|
sl@0
|
1075 |
test_KErrNone(t.Create(KNullDesC, &NeonWithF4x, 0x1000, NULL, NULL));
|
|
sl@0
|
1076 |
t.Logon(s);
|
|
sl@0
|
1077 |
t.Resume();
|
|
sl@0
|
1078 |
User::WaitForRequest(s);
|
|
sl@0
|
1079 |
test(t.ExitType() == EExitKill);
|
|
sl@0
|
1080 |
test(s == KErrNone);
|
|
sl@0
|
1081 |
t.Close();
|
|
sl@0
|
1082 |
}
|
|
sl@0
|
1083 |
|
|
sl@0
|
1084 |
void TestThumb()
|
|
sl@0
|
1085 |
{
|
|
sl@0
|
1086 |
RThread t;
|
|
sl@0
|
1087 |
TRequestStatus s;
|
|
sl@0
|
1088 |
TInt testStep = 0;
|
|
sl@0
|
1089 |
do {
|
|
sl@0
|
1090 |
test_KErrNone(t.Create(KNullDesC, &ThumbMode, 0x1000, NULL, (TAny*)testStep++));
|
|
sl@0
|
1091 |
t.Logon(s);
|
|
sl@0
|
1092 |
t.Resume();
|
|
sl@0
|
1093 |
User::WaitForRequest(s);
|
|
sl@0
|
1094 |
test(s == KErrNone || s == 1);
|
|
sl@0
|
1095 |
test(t.ExitType() == EExitKill);
|
|
sl@0
|
1096 |
t.Close();
|
|
sl@0
|
1097 |
}
|
|
sl@0
|
1098 |
while (s == KErrNone);
|
|
sl@0
|
1099 |
|
|
sl@0
|
1100 |
test(s == 1);
|
|
sl@0
|
1101 |
test(testStep == 7);
|
|
sl@0
|
1102 |
}
|
|
sl@0
|
1103 |
|
|
sl@0
|
1104 |
TInt TestThreadMigration(TAny* aPtr)
|
|
sl@0
|
1105 |
{
|
|
sl@0
|
1106 |
const TInt inc = (TInt)aPtr;
|
|
sl@0
|
1107 |
for (TInt32 switches = 0; switches < KMaxTInt; switches += inc)
|
|
sl@0
|
1108 |
{
|
|
sl@0
|
1109 |
Vfp::SetSReg(switches, switches % 16);
|
|
sl@0
|
1110 |
UserSvr::HalFunction(EHalGroupKernel, EKernelHalLockThreadToCpu, (TAny*)(switches % CPUs), 0);
|
|
sl@0
|
1111 |
test(Vfp::SRegInt(switches % 16) == switches);
|
|
sl@0
|
1112 |
}
|
|
sl@0
|
1113 |
return KErrNone;
|
|
sl@0
|
1114 |
}
|
|
sl@0
|
1115 |
|
|
sl@0
|
1116 |
TInt E32Main()
|
|
sl@0
|
1117 |
{
|
|
sl@0
|
1118 |
test.Title();
|
|
sl@0
|
1119 |
|
|
sl@0
|
1120 |
test.Start(_L("Ask HAL if we have hardware floating point"));
|
|
sl@0
|
1121 |
|
|
sl@0
|
1122 |
CPUs = UserSvr::HalFunction(EHalGroupKernel, EKernelHalNumLogicalCpus, 0, 0);
|
|
sl@0
|
1123 |
TInt supportedTypes;
|
|
sl@0
|
1124 |
TInt HalVfp = HAL::Get(HALData::EHardwareFloatingPoint, supportedTypes);
|
|
sl@0
|
1125 |
if (HalVfp == KErrNone)
|
|
sl@0
|
1126 |
{
|
|
sl@0
|
1127 |
if (supportedTypes == EFpTypeVFPv2)
|
|
sl@0
|
1128 |
{
|
|
sl@0
|
1129 |
test.Printf(_L("HAL reports VFPv2\n"));
|
|
sl@0
|
1130 |
}
|
|
sl@0
|
1131 |
else if (supportedTypes == EFpTypeVFPv3)
|
|
sl@0
|
1132 |
{
|
|
sl@0
|
1133 |
test.Printf(_L("HAL reports VFPv3\n"));
|
|
sl@0
|
1134 |
}
|
|
sl@0
|
1135 |
else if (supportedTypes == EFpTypeVFPv3D16)
|
|
sl@0
|
1136 |
{
|
|
sl@0
|
1137 |
test.Printf(_L("HAL reports VFPv3-D16\n"));
|
|
sl@0
|
1138 |
}
|
|
sl@0
|
1139 |
else
|
|
sl@0
|
1140 |
{
|
|
sl@0
|
1141 |
test.Printf(_L("HAL reports an unknown floating point type\n"));
|
|
sl@0
|
1142 |
test(0);
|
|
sl@0
|
1143 |
}
|
|
sl@0
|
1144 |
}
|
|
sl@0
|
1145 |
else
|
|
sl@0
|
1146 |
{
|
|
sl@0
|
1147 |
test.Printf(_L("HAL reports no VFP support\n"));
|
|
sl@0
|
1148 |
}
|
|
sl@0
|
1149 |
|
|
sl@0
|
1150 |
test.Next(_L("Check VFP present"));
|
|
sl@0
|
1151 |
TBool present = DetectVFP();
|
|
sl@0
|
1152 |
if (!present)
|
|
sl@0
|
1153 |
{
|
|
sl@0
|
1154 |
test.Printf(_L("No VFP detected\n"));
|
|
sl@0
|
1155 |
test(HalVfp == KErrNotSupported ||
|
|
sl@0
|
1156 |
((supportedTypes != EFpTypeVFPv2) &&
|
|
sl@0
|
1157 |
(supportedTypes != EFpTypeVFPv3) &&
|
|
sl@0
|
1158 |
(supportedTypes != EFpTypeVFPv3D16))
|
|
sl@0
|
1159 |
);
|
|
sl@0
|
1160 |
test.End();
|
|
sl@0
|
1161 |
return 0;
|
|
sl@0
|
1162 |
}
|
|
sl@0
|
1163 |
|
|
sl@0
|
1164 |
test.Printf(_L("VFP detected. FPSID = %08x\n"), FPSID);
|
|
sl@0
|
1165 |
test(HalVfp == KErrNone);
|
|
sl@0
|
1166 |
|
|
sl@0
|
1167 |
// Verify that the HAL architecture ID matches the FPSID values
|
|
sl@0
|
1168 |
// ARMv7 redefines some of these bits so the masks are different :(
|
|
sl@0
|
1169 |
if (supportedTypes == EFpTypeVFPv2)
|
|
sl@0
|
1170 |
{
|
|
sl@0
|
1171 |
// assume armv5/6's bit definitions, where 19:16 are the arch version
|
|
sl@0
|
1172 |
// and 20 is the single-precision-only bit
|
|
sl@0
|
1173 |
ArchVersion = (FPSID >> 16) & 0xf;
|
|
sl@0
|
1174 |
test(ArchVersion == ARCH_VERSION_VFPV2);
|
|
sl@0
|
1175 |
Double = !(FPSID & VFP_FPSID_SNG);
|
|
sl@0
|
1176 |
}
|
|
sl@0
|
1177 |
else if (supportedTypes == EFpTypeVFPv3 || supportedTypes == EFpTypeVFPv3D16)
|
|
sl@0
|
1178 |
{
|
|
sl@0
|
1179 |
// assume armv7's bit definitions, where 22:16 are the arch version
|
|
sl@0
|
1180 |
ArchVersion = (FPSID >> 16) & 0x7f;
|
|
sl@0
|
1181 |
test(ArchVersion == ARCH_VERSION_VFPV3_SUBARCH_V2
|
|
sl@0
|
1182 |
|| ArchVersion == ARCH_VERSION_VFPV3_SUBARCH_NULL
|
|
sl@0
|
1183 |
|| ArchVersion == ARCH_VERSION_VFPV3_SUBARCH_V3);
|
|
sl@0
|
1184 |
// there are bits for this in MVFR0 but ARM implementations should always have it?
|
|
sl@0
|
1185 |
Double = ETrue;
|
|
sl@0
|
1186 |
}
|
|
sl@0
|
1187 |
|
|
sl@0
|
1188 |
if (Double)
|
|
sl@0
|
1189 |
test.Printf(_L("Both single and double precision supported\n"), FPSID);
|
|
sl@0
|
1190 |
else
|
|
sl@0
|
1191 |
test.Printf(_L("Only single precision supported\n"), FPSID);
|
|
sl@0
|
1192 |
|
|
sl@0
|
1193 |
test.Next(_L("Test VFP Initial State"));
|
|
sl@0
|
1194 |
TestVFPInitialState();
|
|
sl@0
|
1195 |
|
|
sl@0
|
1196 |
test.Next(_L("Test setting VFP to IEEE no exceptions mode"));
|
|
sl@0
|
1197 |
IEEEMode = User::SetFloatingPointMode(EFpModeIEEENoExceptions) == KErrNone;
|
|
sl@0
|
1198 |
if (!IEEEMode)
|
|
sl@0
|
1199 |
test.Printf(_L("IEEE no exceptions mode not supported, continuing in RunFast\n"));
|
|
sl@0
|
1200 |
|
|
sl@0
|
1201 |
test.Next(_L("Test VFP calculations - single"));
|
|
sl@0
|
1202 |
DoSglTests();
|
|
sl@0
|
1203 |
if (Double)
|
|
sl@0
|
1204 |
{
|
|
sl@0
|
1205 |
test.Next(_L("Test VFP calculations - double"));
|
|
sl@0
|
1206 |
DoDblTests();
|
|
sl@0
|
1207 |
}
|
|
sl@0
|
1208 |
|
|
sl@0
|
1209 |
test.Next(_L("Test VFP Context Save"));
|
|
sl@0
|
1210 |
TestVFPContextSave();
|
|
sl@0
|
1211 |
|
|
sl@0
|
1212 |
if (IEEEMode)
|
|
sl@0
|
1213 |
{
|
|
sl@0
|
1214 |
test.Next(_L("Test bounce handling"));
|
|
sl@0
|
1215 |
DoBounceTests();
|
|
sl@0
|
1216 |
test.Next(_L("Test bouncing while context switching"));
|
|
sl@0
|
1217 |
DoBounceContextSwitchTests();
|
|
sl@0
|
1218 |
test.Next(_L("Test setting VFP to RunFast mode"));
|
|
sl@0
|
1219 |
test(User::SetFloatingPointMode(EFpModeRunFast) == KErrNone);
|
|
sl@0
|
1220 |
DoRunFastTests();
|
|
sl@0
|
1221 |
}
|
|
sl@0
|
1222 |
|
|
sl@0
|
1223 |
test.Next(_L("Test VFP rounding modes"));
|
|
sl@0
|
1224 |
DoRoundingTests();
|
|
sl@0
|
1225 |
|
|
sl@0
|
1226 |
if (IEEEMode)
|
|
sl@0
|
1227 |
{
|
|
sl@0
|
1228 |
test.Next(_L("Test VFP mode inheritance between threads"));
|
|
sl@0
|
1229 |
TestVFPModeInheritance();
|
|
sl@0
|
1230 |
}
|
|
sl@0
|
1231 |
|
|
sl@0
|
1232 |
if (supportedTypes == EFpTypeVFPv3 || supportedTypes == EFpTypeVFPv3D16)
|
|
sl@0
|
1233 |
{
|
|
sl@0
|
1234 |
test.Next(_L("Test VFPv3"));
|
|
sl@0
|
1235 |
TestVFPv3();
|
|
sl@0
|
1236 |
|
|
sl@0
|
1237 |
if (supportedTypes == EFpTypeVFPv3)
|
|
sl@0
|
1238 |
{
|
|
sl@0
|
1239 |
test.Next(_L("Test NEON"));
|
|
sl@0
|
1240 |
TestNEON();
|
|
sl@0
|
1241 |
|
|
sl@0
|
1242 |
#if defined(__SUPPORT_THUMB_INTERWORKING)
|
|
sl@0
|
1243 |
test.Next(_L("Test Thumb Decode"));
|
|
sl@0
|
1244 |
TestThumb();
|
|
sl@0
|
1245 |
#endif
|
|
sl@0
|
1246 |
}
|
|
sl@0
|
1247 |
}
|
|
sl@0
|
1248 |
|
|
sl@0
|
1249 |
if (CPUs > 1)
|
|
sl@0
|
1250 |
{
|
|
sl@0
|
1251 |
test.Next(_L("Test SMP Thread Migration"));
|
|
sl@0
|
1252 |
TInt inc = 1;
|
|
sl@0
|
1253 |
RThread t[8];
|
|
sl@0
|
1254 |
TRequestStatus s[8];
|
|
sl@0
|
1255 |
TInt count;
|
|
sl@0
|
1256 |
for (count = 0; count < CPUs + 1; count++)
|
|
sl@0
|
1257 |
{
|
|
sl@0
|
1258 |
TInt r = t[count].Create(KNullDesC, &TestThreadMigration, 0x1000, NULL, (TAny*)(inc++));
|
|
sl@0
|
1259 |
test(r==KErrNone);
|
|
sl@0
|
1260 |
t[count].Logon(s[count]);
|
|
sl@0
|
1261 |
}
|
|
sl@0
|
1262 |
for (count = 0; count < CPUs + 1; count++)
|
|
sl@0
|
1263 |
{
|
|
sl@0
|
1264 |
t[count].Resume();
|
|
sl@0
|
1265 |
}
|
|
sl@0
|
1266 |
User::After(10*1000*1000);
|
|
sl@0
|
1267 |
for (count = 0; count < CPUs + 1; count++)
|
|
sl@0
|
1268 |
{
|
|
sl@0
|
1269 |
t[count].Kill(0);
|
|
sl@0
|
1270 |
}
|
|
sl@0
|
1271 |
for (count = 0; count < CPUs + 1; count++)
|
|
sl@0
|
1272 |
{
|
|
sl@0
|
1273 |
User::WaitForAnyRequest();
|
|
sl@0
|
1274 |
}
|
|
sl@0
|
1275 |
for (count = 0; count < CPUs + 1; count++)
|
|
sl@0
|
1276 |
{
|
|
sl@0
|
1277 |
TInt xt = t[count].ExitType();
|
|
sl@0
|
1278 |
TInt xr = t[count].ExitReason();
|
|
sl@0
|
1279 |
test(xt == EExitKill && xr == KErrNone);
|
|
sl@0
|
1280 |
}
|
|
sl@0
|
1281 |
for (count = 0; count < CPUs + 1; count++)
|
|
sl@0
|
1282 |
{
|
|
sl@0
|
1283 |
CLOSE_AND_WAIT(t[count]);
|
|
sl@0
|
1284 |
}
|
|
sl@0
|
1285 |
}
|
|
sl@0
|
1286 |
|
|
sl@0
|
1287 |
test.End();
|
|
sl@0
|
1288 |
return 0;
|
|
sl@0
|
1289 |
}
|