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// Copyright (c) 2008-2009 Nokia Corporation and/or its subsidiary(-ies).
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// All rights reserved.
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// This component and the accompanying materials are made available
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// under the terms of the License "Eclipse Public License v1.0"
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// which accompanies this distribution, and is available
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// at the URL "http://www.eclipse.org/legal/epl-v10.html".
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//
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// Initial Contributors:
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// Nokia Corporation - initial contribution.
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//
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// Contributors:
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//
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// Description:
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// e32\include\nkernsmp\arm\ncern.h
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//
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// WARNING: This file contains some APIs which are internal and are subject
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// to change without notice. Such APIs should therefore not be used
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// outside the Kernel and Hardware Services package.
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//
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/**
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@file
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@publishedPartner
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@prototype
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*/
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#ifndef __NCERN_H__
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#define __NCERN_H__
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#ifdef __FIQ_IS_UNCONTROLLED__
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#define __ASM_CLI() CPSIDI /* Disable all interrupts */
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#define __ASM_STI() CPSIEI /* Enable all interrupts */
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#define __ASM_CLI1() CPSIDI /* Disable IRQ only */
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#define __ASM_STI1() CPSIEI /* Enable IRQ only */
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#define __ASM_CLI2() /* Disable FIQ only */
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#define __ASM_STI2() /* Enable FIQ only */
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#define __ASM_CLI_MODE(mode) CPSIDIM(mode) /* Disable all interrupts and change mode */
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#define __ASM_STI_MODE(mode) CPSIEIM(mode) /* Enable all interrupts and change mode */
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#define __ASM_CLI1_MODE(mode) CPSIDIM(mode) /* Disable IRQ only and change mode */
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#define __ASM_STI1_MODE(mode) CPSIEIM(mode) /* Enable IRQ only and change mode */
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#define __ASM_CLI2_MODE(mode) CPSCHM(mode) /* Disable FIQ only and change mode */
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#define __ASM_STI2_MODE(mode) CPSCHM(mode) /* Enable FIQ only and change mode */
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#else
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#define __ASM_CLI() CPSIDIF /* Disable all interrupts */
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#define __ASM_STI() CPSIEIF /* Enable all interrupts */
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#define __ASM_CLI1() CPSIDI /* Disable IRQ only */
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#define __ASM_STI1() CPSIEI /* Enable IRQ only */
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#define __ASM_CLI2() CPSIDF /* Disable FIQ only */
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#define __ASM_STI2() CPSIEF /* Enable FIQ only */
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#define __ASM_CLI_MODE(mode) CPSIDIFM(mode) /* Disable all interrupts and change mode */
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#define __ASM_STI_MODE(mode) CPSIEIFM(mode) /* Enable all interrupts and change mode */
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#define __ASM_CLI1_MODE(mode) CPSIDIM(mode) /* Disable IRQ only and change mode */
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#define __ASM_STI1_MODE(mode) CPSIEIM(mode) /* Enable IRQ only and change mode */
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#define __ASM_CLI2_MODE(mode) CPSIDFM(mode) /* Disable FIQ only and change mode */
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#define __ASM_STI2_MODE(mode) CPSIEFM(mode) /* Enable FIQ only and change mode */
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#endif
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/** Information needed to boot an AP (ARM specific)
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@internalTechnology
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*/
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struct SArmAPBootInfo : public SAPBootInfo
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{
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TLinAddr iAPBootLin; // linear address of AP boot page (uncached)
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T_UintPtr iAPBootPhys; // physical address of AP boot page (uncached)
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TLinAddr iAPBootCodeLin; // linear address of AP boot code (part of bootstrap)
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T_UintPtr iAPBootCodePhys; // physical address of AP boot code (part of bootstrap)
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T_UintPtr iAPBootPageDirPhys; // physical address of AP boot page directory
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TLinAddr iInitR13Fiq; // initial value for R13_fiq
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TLinAddr iInitR13Irq; // initial value for R13_irq
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TLinAddr iInitR13Abt; // initial value for R13_abt
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TLinAddr iInitR13Und; // initial value for R13_und
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};
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/** Timer frequency specification
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Stores a frequency as a fraction of a (separately stored) maximum.
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The frequency must be at least 1/256 of the maximum.
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@internalTechnology
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@prototype
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*/
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struct STimerMult
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{
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TUint32 iFreq; // frequency as a fraction of maximum possible, multiplied by 2^32
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TUint32 iInverse; // 2^24/(iFreq/2^32) = 2^56/iFreq
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};
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/** Variant interface block
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@internalTechnology
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@prototype
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*/
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struct SVariantInterfaceBlock : public SInterfaceBlockBase
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{
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TUint64 iMaxCpuClock; // maximum possible CPU clock frequency on this system
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TUint16 iTimerGap1;
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TUint16 iTimerGap2;
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TUint32 iMaxTimerClock; // maximum possible local timer clock frequency
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TLinAddr iScuAddr; // address of SCU
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TLinAddr iGicDistAddr; // address of GIC Distributor
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TLinAddr iGicCpuIfcAddr; // address of GIC CPU interface (must be same for all CPUs)
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TLinAddr iLocalTimerAddr; // address of per-CPU timer (must be same for all CPUs)
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volatile STimerMult* iTimerMult[KMaxCpus]; // timer[i] frequency / iMaxTimerClock * 2^32
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volatile TUint32* iCpuMult[KMaxCpus]; // CPU[i] frequency / iMaxCpuClock * 2^32
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};
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// End of file
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#endif
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