3 Version: MPL 1.1/GPL 2.0/LGPL 2.1
5 The contents of this file are subject to the Mozilla Public License Version
6 1.1 (the "License"); you may not use this file except in compliance with
7 the License. You may obtain a copy of the License at
9 http://www.mozilla.org/MPL/
11 Software distributed under the License is distributed on an "AS IS" basis,
12 WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License
13 for the specific language governing rights and limitations under the License.
15 The Original Code is the Open Hardware Monitor code.
17 The Initial Developer of the Original Code is
18 Michael Möller <m.moeller@gmx.ch>.
19 Portions created by the Initial Developer are Copyright (C) 2009-2010
20 the Initial Developer. All Rights Reserved.
24 Alternatively, the contents of this file may be used under the terms of
25 either the GNU General Public License Version 2 or later (the "GPL"), or
26 the GNU Lesser General Public License Version 2.1 or later (the "LGPL"),
27 in which case the provisions of the GPL or the LGPL are applicable instead
28 of those above. If you wish to allow use of your version of this file only
29 under the terms of either the GPL or the LGPL, and not to allow others to
30 use your version of this file under the terms of the MPL, indicate your
31 decision by deleting the provisions above and replace them with the notice
32 and other provisions required by the GPL or the LGPL. If you do not delete
33 the provisions above, a recipient may use your version of this file under
34 the terms of any one of the MPL, the GPL or the LGPL.
38 namespace OpenHardwareMonitor.Hardware.CPU {
39 internal sealed class AMD0FCPU : GenericCPU {
41 private uint pciAddress;
42 private Sensor[] coreTemperatures;
44 private const ushort PCI_AMD_VENDOR_ID = 0x1022;
45 private const ushort PCI_AMD_0FH_MISCELLANEOUS_DEVICE_ID = 0x1103;
46 private const uint THERMTRIP_STATUS_REGISTER = 0xE4;
47 private const byte THERM_SENSE_CORE_SEL_CPU0 = 0x4;
48 private const byte THERM_SENSE_CORE_SEL_CPU1 = 0x0;
50 public AMD0FCPU(int processorIndex, CPUID[][] cpuid, ISettings settings)
51 : base(processorIndex, cpuid, settings)
53 float offset = -49.0f;
55 // AM2+ 65nm +21 offset
56 uint model = cpuid[0][0].Model;
57 if (model >= 0x69 && model != 0xc1 && model != 0x6c && model != 0x7c)
60 // check if processor supports a digital thermal sensor
61 if (cpuid[0][0].ExtData.GetLength(0) > 7 &&
62 (cpuid[0][0].ExtData[7, 3] & 1) != 0)
64 coreTemperatures = new Sensor[coreCount];
65 for (int i = 0; i < coreCount; i++) {
67 new Sensor("Core #" + (i + 1), i, SensorType.Temperature,
68 this, new ParameterDescription[] {
69 new ParameterDescription("Offset [°C]",
70 "Temperature offset of the thermal sensor.\n" +
71 "Temperature = Value + Offset.", offset)
75 coreTemperatures = new Sensor[0];
78 pciAddress = WinRing0.FindPciDeviceById(PCI_AMD_VENDOR_ID,
79 PCI_AMD_0FH_MISCELLANEOUS_DEVICE_ID, (byte)processorIndex);
84 protected override uint[] GetMSRs() {
85 return new uint[] { };
88 public override void Update() {
91 if (pciAddress != 0xFFFFFFFF) {
92 for (uint i = 0; i < coreTemperatures.Length; i++) {
93 if (WinRing0.WritePciConfigDwordEx(
94 pciAddress, THERMTRIP_STATUS_REGISTER,
95 i > 0 ? THERM_SENSE_CORE_SEL_CPU1 : THERM_SENSE_CORE_SEL_CPU0)) {
97 if (WinRing0.ReadPciConfigDwordEx(
98 pciAddress, THERMTRIP_STATUS_REGISTER, out value)) {
99 coreTemperatures[i].Value = ((value >> 16) & 0xFF) +
100 coreTemperatures[i].Parameters[0].Value;
101 ActivateSensor(coreTemperatures[i]);
103 DeactivateSensor(coreTemperatures[i]);