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/*
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Version: MPL 1.1/GPL 2.0/LGPL 2.1
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The contents of this file are subject to the Mozilla Public License Version
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1.1 (the "License"); you may not use this file except in compliance with
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the License. You may obtain a copy of the License at
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http://www.mozilla.org/MPL/
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Software distributed under the License is distributed on an "AS IS" basis,
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WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License
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for the specific language governing rights and limitations under the License.
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The Original Code is the Open Hardware Monitor code.
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The Initial Developer of the Original Code is
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Michael Möller <m.moeller@gmx.ch>.
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Portions created by the Initial Developer are Copyright (C) 2009-2010
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the Initial Developer. All Rights Reserved.
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Contributor(s):
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Alternatively, the contents of this file may be used under the terms of
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either the GNU General Public License Version 2 or later (the "GPL"), or
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the GNU Lesser General Public License Version 2.1 or later (the "LGPL"),
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in which case the provisions of the GPL or the LGPL are applicable instead
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of those above. If you wish to allow use of your version of this file only
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under the terms of either the GPL or the LGPL, and not to allow others to
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use your version of this file under the terms of the MPL, indicate your
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decision by deleting the provisions above and replace them with the notice
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and other provisions required by the GPL or the LGPL. If you do not delete
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the provisions above, a recipient may use your version of this file under
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the terms of any one of the MPL, the GPL or the LGPL.
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*/
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using System;
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using System.Collections.Generic;
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using System.Globalization;
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using System.Text;
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using System.Threading;
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namespace OpenHardwareMonitor.Hardware.LPC {
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internal class LPCIO {
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private readonly List<ISuperIO> superIOs = new List<ISuperIO>();
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private readonly StringBuilder report = new StringBuilder();
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// I/O Ports
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private readonly ushort[] REGISTER_PORTS = new ushort[] { 0x2E, 0x4E };
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private readonly ushort[] VALUE_PORTS = new ushort[] { 0x2F, 0x4F };
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private ushort registerPort;
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private ushort valuePort;
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// Registers
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private const byte CONFIGURATION_CONTROL_REGISTER = 0x02;
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private const byte DEVCIE_SELECT_REGISTER = 0x07;
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private const byte CHIP_ID_REGISTER = 0x20;
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private const byte CHIP_REVISION_REGISTER = 0x21;
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private const byte BASE_ADDRESS_REGISTER = 0x60;
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private byte ReadByte(byte register) {
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Ring0.WriteIoPort(registerPort, register);
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return Ring0.ReadIoPort(valuePort);
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}
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private ushort ReadWord(byte register) {
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return (ushort)((ReadByte(register) << 8) |
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ReadByte((byte)(register + 1)));
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}
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private void Select(byte logicalDeviceNumber) {
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Ring0.WriteIoPort(registerPort, DEVCIE_SELECT_REGISTER);
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Ring0.WriteIoPort(valuePort, logicalDeviceNumber);
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}
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private void ReportUnknownChip(string type, int chip) {
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report.Append("Chip ID: Unknown ");
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report.Append(type);
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report.Append(" with ID 0x");
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report.Append(chip.ToString("X", CultureInfo.InvariantCulture));
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report.Append(" at 0x");
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report.Append(registerPort.ToString("X", CultureInfo.InvariantCulture));
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report.Append("/0x");
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report.AppendLine(valuePort.ToString("X", CultureInfo.InvariantCulture));
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report.AppendLine();
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}
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#region Winbond, Nuvoton, Fintek
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private const byte FINTEK_VENDOR_ID_REGISTER = 0x23;
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private const ushort FINTEK_VENDOR_ID = 0x1934;
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private const byte WINBOND_NUVOTON_HARDWARE_MONITOR_LDN = 0x0B;
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private const byte F71858_HARDWARE_MONITOR_LDN = 0x02;
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private const byte FINTEK_HARDWARE_MONITOR_LDN = 0x04;
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private void WinbondNuvotonFintekEnter() {
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Ring0.WriteIoPort(registerPort, 0x87);
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Ring0.WriteIoPort(registerPort, 0x87);
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}
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private void WinbondNuvotonFintekExit() {
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Ring0.WriteIoPort(registerPort, 0xAA);
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}
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private bool DetectWinbondFintek() {
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WinbondNuvotonFintekEnter();
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byte logicalDeviceNumber = 0;
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byte id = ReadByte(CHIP_ID_REGISTER);
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byte revision = ReadByte(CHIP_REVISION_REGISTER);
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Chip chip = Chip.Unknown;
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switch (id) {
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case 0x05:
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switch (revision) {
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case 0x07:
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chip = Chip.F71858;
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logicalDeviceNumber = F71858_HARDWARE_MONITOR_LDN;
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break;
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case 0x41:
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chip = Chip.F71882;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x06:
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switch (revision) {
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case 0x01:
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chip = Chip.F71862;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x07:
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switch (revision) {
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case 0x23:
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chip = Chip.F71889F;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x08:
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switch (revision) {
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case 0x14:
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chip = Chip.F71869;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x09:
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switch (revision) {
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case 0x09:
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chip = Chip.F71889ED;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x52:
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switch (revision) {
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case 0x17:
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case 0x3A:
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case 0x41:
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chip = Chip.W83627HF;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x82:
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switch (revision & 0xF0) {
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case 0x80:
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chip = Chip.W83627THF;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x85:
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switch (revision) {
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case 0x41:
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chip = Chip.W83687THF;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x88:
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switch (revision & 0xF0) {
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case 0x50:
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case 0x60:
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chip = Chip.W83627EHF;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0xA0:
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switch (revision & 0xF0) {
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case 0x20:
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chip = Chip.W83627DHG;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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moel@167
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case 0xA5:
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moel@167
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switch (revision & 0xF0) {
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moel@167
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case 0x10:
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chip = Chip.W83667HG;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0xB0:
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moel@167
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switch (revision & 0xF0) {
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moel@167
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case 0x70:
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chip = Chip.W83627DHGP;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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moel@167
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case 0xB3:
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moel@167
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switch (revision & 0xF0) {
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moel@167
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case 0x50:
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chip = Chip.W83667HGB;
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moel@245
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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moel@245
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break;
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moel@245
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} break;
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moel@245
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case 0xB4:
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moel@245
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switch (revision & 0xF0) {
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moel@245
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case 0x70:
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moel@245
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chip = Chip.NCT6771F;
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moel@245
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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moel@167
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break;
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moel@167
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} break;
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moel@167
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}
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moel@167
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if (chip == Chip.Unknown) {
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moel@167
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if (id != 0 && id != 0xff) {
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moel@245
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WinbondNuvotonFintekExit();
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moel@167
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moel@245
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ReportUnknownChip("Winbond / Nuvoton / Fintek",
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moel@245
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((id << 8) | revision));
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moel@167
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}
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moel@167
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} else {
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moel@167
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moel@167
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Select(logicalDeviceNumber);
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moel@167
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ushort address = ReadWord(BASE_ADDRESS_REGISTER);
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moel@167
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Thread.Sleep(1);
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moel@167
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ushort verify = ReadWord(BASE_ADDRESS_REGISTER);
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moel@167
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moel@167
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ushort vendorID = ReadWord(FINTEK_VENDOR_ID_REGISTER);
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moel@167
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moel@245
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WinbondNuvotonFintekExit();
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moel@167
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moel@167
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if (address != verify) {
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moel@167
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243 |
report.Append("Chip ID: 0x");
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moel@167
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report.AppendLine(chip.ToString("X"));
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moel@167
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report.Append("Chip revision: 0x");
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moel@228
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report.AppendLine(revision.ToString("X",
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moel@167
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CultureInfo.InvariantCulture));
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moel@167
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248 |
report.AppendLine("Error: Address verification failed");
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moel@167
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249 |
report.AppendLine();
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moel@167
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250 |
return false;
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moel@167
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}
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moel@167
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252 |
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moel@167
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253 |
// some Fintek chips have address register offset 0x05 added already
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moel@167
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254 |
if ((address & 0x07) == 0x05)
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moel@167
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255 |
address &= 0xFFF8;
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moel@167
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256 |
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moel@167
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257 |
if (address < 0x100 || (address & 0xF007) != 0) {
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moel@167
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258 |
report.Append("Chip ID: 0x");
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moel@167
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259 |
report.AppendLine(chip.ToString("X"));
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moel@167
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260 |
report.Append("Chip revision: 0x");
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moel@228
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261 |
report.AppendLine(revision.ToString("X",
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moel@167
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262 |
CultureInfo.InvariantCulture));
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moel@167
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263 |
report.Append("Error: Invalid address 0x");
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moel@228
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264 |
report.AppendLine(address.ToString("X",
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moel@167
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265 |
CultureInfo.InvariantCulture));
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moel@167
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266 |
report.AppendLine();
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moel@167
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267 |
return false;
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moel@167
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268 |
}
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moel@167
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269 |
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moel@167
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270 |
switch (chip) {
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moel@167
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271 |
case Chip.W83627DHG:
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moel@167
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272 |
case Chip.W83627DHGP:
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moel@167
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273 |
case Chip.W83627EHF:
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moel@167
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274 |
case Chip.W83627HF:
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moel@167
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275 |
case Chip.W83627THF:
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moel@167
|
276 |
case Chip.W83667HG:
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moel@167
|
277 |
case Chip.W83667HGB:
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moel@167
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278 |
case Chip.W83687THF:
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moel@167
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279 |
superIOs.Add(new W836XX(chip, revision, address));
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moel@167
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280 |
break;
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moel@245
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281 |
case Chip.NCT6771F:
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moel@245
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282 |
superIOs.Add(new NCT677X(chip, revision, address));
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moel@245
|
283 |
break;
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moel@167
|
284 |
case Chip.F71858:
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moel@167
|
285 |
case Chip.F71862:
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moel@167
|
286 |
case Chip.F71869:
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moel@167
|
287 |
case Chip.F71882:
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moel@167
|
288 |
case Chip.F71889ED:
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moel@167
|
289 |
case Chip.F71889F:
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moel@167
|
290 |
if (vendorID != FINTEK_VENDOR_ID) {
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moel@167
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291 |
report.Append("Chip ID: 0x");
|
moel@167
|
292 |
report.AppendLine(chip.ToString("X"));
|
moel@167
|
293 |
report.Append("Chip revision: 0x");
|
moel@228
|
294 |
report.AppendLine(revision.ToString("X",
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moel@167
|
295 |
CultureInfo.InvariantCulture));
|
moel@167
|
296 |
report.Append("Error: Invalid vendor ID 0x");
|
moel@228
|
297 |
report.AppendLine(vendorID.ToString("X",
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moel@167
|
298 |
CultureInfo.InvariantCulture));
|
moel@167
|
299 |
report.AppendLine();
|
moel@167
|
300 |
return false;
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moel@167
|
301 |
}
|
moel@167
|
302 |
superIOs.Add(new F718XX(chip, address));
|
moel@167
|
303 |
break;
|
moel@167
|
304 |
default: break;
|
moel@167
|
305 |
}
|
moel@167
|
306 |
|
moel@167
|
307 |
return true;
|
moel@167
|
308 |
}
|
moel@167
|
309 |
|
moel@167
|
310 |
return false;
|
moel@167
|
311 |
}
|
moel@167
|
312 |
|
moel@169
|
313 |
#endregion
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moel@169
|
314 |
|
moel@169
|
315 |
#region ITE
|
moel@169
|
316 |
|
moel@169
|
317 |
private const byte IT87_ENVIRONMENT_CONTROLLER_LDN = 0x04;
|
moel@228
|
318 |
private const byte IT87_GPIO_LDN = 0x07;
|
moel@169
|
319 |
private const byte IT87_CHIP_VERSION_REGISTER = 0x22;
|
moel@169
|
320 |
|
moel@169
|
321 |
private void IT87Enter() {
|
moel@236
|
322 |
Ring0.WriteIoPort(registerPort, 0x87);
|
moel@236
|
323 |
Ring0.WriteIoPort(registerPort, 0x01);
|
moel@236
|
324 |
Ring0.WriteIoPort(registerPort, 0x55);
|
moel@236
|
325 |
Ring0.WriteIoPort(registerPort, 0x55);
|
moel@169
|
326 |
}
|
moel@169
|
327 |
|
moel@169
|
328 |
private void IT87Exit() {
|
moel@236
|
329 |
Ring0.WriteIoPort(registerPort, CONFIGURATION_CONTROL_REGISTER);
|
moel@236
|
330 |
Ring0.WriteIoPort(valuePort, 0x02);
|
moel@169
|
331 |
}
|
moel@169
|
332 |
|
moel@167
|
333 |
private bool DetectIT87() {
|
moel@169
|
334 |
|
moel@169
|
335 |
// IT87XX can enter only on port 0x2E
|
moel@169
|
336 |
if (registerPort != 0x2E)
|
moel@169
|
337 |
return false;
|
moel@169
|
338 |
|
moel@167
|
339 |
IT87Enter();
|
moel@167
|
340 |
|
moel@167
|
341 |
ushort chipID = ReadWord(CHIP_ID_REGISTER);
|
moel@167
|
342 |
Chip chip;
|
moel@167
|
343 |
switch (chipID) {
|
moel@167
|
344 |
case 0x8712: chip = Chip.IT8712F; break;
|
moel@167
|
345 |
case 0x8716: chip = Chip.IT8716F; break;
|
moel@167
|
346 |
case 0x8718: chip = Chip.IT8718F; break;
|
moel@167
|
347 |
case 0x8720: chip = Chip.IT8720F; break;
|
moel@170
|
348 |
case 0x8721: chip = Chip.IT8721F; break;
|
moel@167
|
349 |
case 0x8726: chip = Chip.IT8726F; break;
|
moel@167
|
350 |
default: chip = Chip.Unknown; break;
|
moel@167
|
351 |
}
|
moel@167
|
352 |
if (chip == Chip.Unknown) {
|
moel@167
|
353 |
if (chipID != 0 && chipID != 0xffff) {
|
moel@167
|
354 |
IT87Exit();
|
moel@167
|
355 |
|
moel@167
|
356 |
ReportUnknownChip("ITE", chipID);
|
moel@167
|
357 |
}
|
moel@167
|
358 |
} else {
|
moel@167
|
359 |
Select(IT87_ENVIRONMENT_CONTROLLER_LDN);
|
moel@167
|
360 |
ushort address = ReadWord(BASE_ADDRESS_REGISTER);
|
moel@167
|
361 |
Thread.Sleep(1);
|
moel@167
|
362 |
ushort verify = ReadWord(BASE_ADDRESS_REGISTER);
|
moel@167
|
363 |
|
moel@167
|
364 |
byte version = (byte)(ReadByte(IT87_CHIP_VERSION_REGISTER) & 0x0F);
|
moel@167
|
365 |
|
moel@228
|
366 |
Select(IT87_GPIO_LDN);
|
moel@228
|
367 |
ushort gpioAddress = ReadWord(BASE_ADDRESS_REGISTER + 2);
|
moel@228
|
368 |
Thread.Sleep(1);
|
moel@228
|
369 |
ushort gpioVerify = ReadWord(BASE_ADDRESS_REGISTER + 2);
|
moel@228
|
370 |
|
moel@167
|
371 |
IT87Exit();
|
moel@167
|
372 |
|
moel@167
|
373 |
if (address != verify || address < 0x100 || (address & 0xF007) != 0) {
|
moel@167
|
374 |
report.Append("Chip ID: 0x");
|
moel@167
|
375 |
report.AppendLine(chip.ToString("X"));
|
moel@167
|
376 |
report.Append("Error: Invalid address 0x");
|
moel@167
|
377 |
report.AppendLine(address.ToString("X",
|
moel@167
|
378 |
CultureInfo.InvariantCulture));
|
moel@167
|
379 |
report.AppendLine();
|
moel@167
|
380 |
return false;
|
moel@167
|
381 |
}
|
moel@167
|
382 |
|
moel@228
|
383 |
if (gpioAddress != gpioVerify || gpioAddress < 0x100 ||
|
moel@228
|
384 |
(gpioAddress & 0xF007) != 0) {
|
moel@228
|
385 |
report.Append("Chip ID: 0x");
|
moel@228
|
386 |
report.AppendLine(chip.ToString("X"));
|
moel@228
|
387 |
report.Append("Error: Invalid GPIO address 0x");
|
moel@228
|
388 |
report.AppendLine(gpioAddress.ToString("X",
|
moel@228
|
389 |
CultureInfo.InvariantCulture));
|
moel@228
|
390 |
report.AppendLine();
|
moel@228
|
391 |
return false;
|
moel@228
|
392 |
}
|
moel@228
|
393 |
|
moel@228
|
394 |
superIOs.Add(new IT87XX(chip, address, gpioAddress, version));
|
moel@167
|
395 |
return true;
|
moel@167
|
396 |
}
|
moel@167
|
397 |
|
moel@167
|
398 |
return false;
|
moel@167
|
399 |
}
|
moel@167
|
400 |
|
moel@169
|
401 |
#endregion
|
moel@169
|
402 |
|
moel@169
|
403 |
#region SMSC
|
moel@169
|
404 |
|
moel@169
|
405 |
private void SMSCEnter() {
|
moel@236
|
406 |
Ring0.WriteIoPort(registerPort, 0x55);
|
moel@169
|
407 |
}
|
moel@169
|
408 |
|
moel@169
|
409 |
private void SMSCExit() {
|
moel@236
|
410 |
Ring0.WriteIoPort(registerPort, 0xAA);
|
moel@169
|
411 |
}
|
moel@169
|
412 |
|
moel@167
|
413 |
private bool DetectSMSC() {
|
moel@167
|
414 |
SMSCEnter();
|
moel@167
|
415 |
|
moel@167
|
416 |
ushort chipID = ReadWord(CHIP_ID_REGISTER);
|
moel@167
|
417 |
Chip chip;
|
moel@167
|
418 |
switch (chipID) {
|
moel@167
|
419 |
default: chip = Chip.Unknown; break;
|
moel@167
|
420 |
}
|
moel@167
|
421 |
if (chip == Chip.Unknown) {
|
moel@167
|
422 |
if (chipID != 0 && chipID != 0xffff) {
|
moel@167
|
423 |
SMSCExit();
|
moel@167
|
424 |
|
moel@167
|
425 |
ReportUnknownChip("SMSC", chipID);
|
moel@167
|
426 |
}
|
moel@167
|
427 |
} else {
|
moel@167
|
428 |
SMSCExit();
|
moel@167
|
429 |
return true;
|
moel@167
|
430 |
}
|
moel@167
|
431 |
|
moel@167
|
432 |
return false;
|
moel@167
|
433 |
}
|
moel@167
|
434 |
|
moel@169
|
435 |
#endregion
|
moel@169
|
436 |
|
moel@163
|
437 |
private void Detect() {
|
moel@110
|
438 |
|
moel@110
|
439 |
for (int i = 0; i < REGISTER_PORTS.Length; i++) {
|
moel@110
|
440 |
registerPort = REGISTER_PORTS[i];
|
moel@110
|
441 |
valuePort = VALUE_PORTS[i];
|
moel@110
|
442 |
|
moel@167
|
443 |
if (DetectWinbondFintek()) continue;
|
moel@110
|
444 |
|
moel@167
|
445 |
if (DetectIT87()) continue;
|
moel@110
|
446 |
|
moel@167
|
447 |
if (DetectSMSC()) continue;
|
moel@228
|
448 |
}
|
moel@163
|
449 |
}
|
moel@163
|
450 |
|
moel@163
|
451 |
public LPCIO() {
|
moel@236
|
452 |
if (!Ring0.IsOpen)
|
moel@163
|
453 |
return;
|
moel@163
|
454 |
|
moel@236
|
455 |
if (!Ring0.WaitIsaBusMutex(100))
|
moel@163
|
456 |
return;
|
moel@163
|
457 |
|
moel@163
|
458 |
Detect();
|
moel@163
|
459 |
|
moel@236
|
460 |
Ring0.ReleaseIsaBusMutex();
|
moel@110
|
461 |
}
|
moel@110
|
462 |
|
moel@130
|
463 |
public ISuperIO[] SuperIO {
|
moel@110
|
464 |
get {
|
moel@130
|
465 |
return superIOs.ToArray();
|
moel@110
|
466 |
}
|
moel@110
|
467 |
}
|
moel@110
|
468 |
|
moel@110
|
469 |
public string GetReport() {
|
moel@110
|
470 |
if (report.Length > 0) {
|
moel@195
|
471 |
return "LPCIO" + Environment.NewLine + Environment.NewLine + report;
|
moel@110
|
472 |
} else
|
moel@110
|
473 |
return null;
|
moel@110
|
474 |
}
|
moel@110
|
475 |
}
|
moel@110
|
476 |
}
|