moel@1
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/*
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Version: MPL 1.1/GPL 2.0/LGPL 2.1
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The contents of this file are subject to the Mozilla Public License Version
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1.1 (the "License"); you may not use this file except in compliance with
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the License. You may obtain a copy of the License at
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http://www.mozilla.org/MPL/
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Software distributed under the License is distributed on an "AS IS" basis,
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WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License
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for the specific language governing rights and limitations under the License.
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The Original Code is the Open Hardware Monitor code.
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The Initial Developer of the Original Code is
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Michael Möller <m.moeller@gmx.ch>.
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Portions created by the Initial Developer are Copyright (C) 2009-2010
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the Initial Developer. All Rights Reserved.
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Contributor(s):
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Alternatively, the contents of this file may be used under the terms of
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either the GNU General Public License Version 2 or later (the "GPL"), or
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the GNU Lesser General Public License Version 2.1 or later (the "LGPL"),
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in which case the provisions of the GPL or the LGPL are applicable instead
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of those above. If you wish to allow use of your version of this file only
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under the terms of either the GPL or the LGPL, and not to allow others to
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use your version of this file under the terms of the MPL, indicate your
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decision by deleting the provisions above and replace them with the notice
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and other provisions required by the GPL or the LGPL. If you do not delete
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the provisions above, a recipient may use your version of this file under
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the terms of any one of the MPL, the GPL or the LGPL.
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*/
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using System;
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using System.Collections.Generic;
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using System.Text;
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using System.Threading;
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namespace OpenHardwareMonitor.Hardware.LPC {
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public class LPCGroup : IGroup {
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private List<IHardware> hardware = new List<IHardware>();
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private Chip chip = Chip.Unknown;
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// I/O Ports
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private ushort[] REGISTER_PORTS = new ushort[] { 0x2e, 0x4e };
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private ushort[] VALUE_PORTS = new ushort[] { 0x2f, 0x4f };
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private ushort registerPort;
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private ushort valuePort;
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// Registers
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private const byte CONFIGURATION_CONTROL_REGISTER = 0x02;
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private const byte DEVCIE_SELECT_REGISTER = 0x07;
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private const byte CHIP_ID_REGISTER = 0x20;
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private const byte CHIP_REVISION_REGISTER = 0x21;
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private const byte BASE_ADDRESS_REGISTER = 0x60;
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private byte ReadByte(byte register) {
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WinRing0.WriteIoPortByte(registerPort, register);
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return WinRing0.ReadIoPortByte(valuePort);
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}
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private ushort ReadWord(byte register) {
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return (ushort)((ReadByte(register) << 8) |
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ReadByte((byte)(register + 1)));
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}
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private void Select(byte logicalDeviceNumber) {
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WinRing0.WriteIoPortByte(registerPort, DEVCIE_SELECT_REGISTER);
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WinRing0.WriteIoPortByte(valuePort, logicalDeviceNumber);
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}
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private const byte IT87_ENVIRONMENT_CONTROLLER_LDN = 0x04;
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private void IT87Enter() {
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WinRing0.WriteIoPortByte(registerPort, 0x87);
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WinRing0.WriteIoPortByte(registerPort, 0x01);
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WinRing0.WriteIoPortByte(registerPort, 0x55);
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WinRing0.WriteIoPortByte(registerPort, 0x55);
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}
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internal void IT87Exit() {
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WinRing0.WriteIoPortByte(registerPort, CONFIGURATION_CONTROL_REGISTER);
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WinRing0.WriteIoPortByte(valuePort, 0x02);
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}
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// Winbond, Fintek
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private const byte FINTEK_VENDOR_ID_REGISTER = 0x23;
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private const ushort FINTEK_VENDOR_ID = 0x1934;
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private const byte W83627_HARDWARE_MONITOR_LDN = 0x0B;
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private const byte F71858_HARDWARE_MONITOR_LDN = 0x02;
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private const byte FINTEK_HARDWARE_MONITOR_LDN = 0x04;
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private void WinbondFintekEnter() {
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WinRing0.WriteIoPortByte(registerPort, 0x87);
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WinRing0.WriteIoPortByte(registerPort, 0x87);
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}
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private void WinbondFintekExit() {
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WinRing0.WriteIoPortByte(registerPort, 0xAA);
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}
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public LPCGroup() {
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if (!WinRing0.IsAvailable)
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return;
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for (int i = 0; i < REGISTER_PORTS.Length; i++) {
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registerPort = REGISTER_PORTS[i];
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valuePort = VALUE_PORTS[i];
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WinbondFintekEnter();
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byte logicalDeviceNumber;
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byte id = ReadByte(CHIP_ID_REGISTER);
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byte revision = ReadByte(CHIP_REVISION_REGISTER);
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switch (id) {
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case 0x05:
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switch (revision) {
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case 0x41:
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chip = Chip.F71882;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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default:
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chip = Chip.Unknown;
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logicalDeviceNumber = 0;
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break;
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} break;
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case 0x06:
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switch (revision) {
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case 0x01:
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chip = Chip.F71862;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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default:
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chip = Chip.Unknown;
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logicalDeviceNumber = 0;
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break;
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} break;
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case 0x07:
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switch (revision) {
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case 0x23:
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chip = Chip.F71889;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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default:
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chip = Chip.Unknown;
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logicalDeviceNumber = 0;
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break;
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} break;
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case 0x08:
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switch (revision) {
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case 0x14:
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chip = Chip.F71869;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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default:
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chip = Chip.Unknown;
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logicalDeviceNumber = 0;
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break;
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} break;
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case 0x52:
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switch (revision) {
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case 0x17:
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case 0x3A:
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chip = Chip.W83627HF;
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logicalDeviceNumber = W83627_HARDWARE_MONITOR_LDN;
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break;
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default:
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chip = Chip.Unknown;
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logicalDeviceNumber = 0;
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break;
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} break;
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case 0xA0:
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switch (revision & 0xF0) {
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case 0x20:
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chip = Chip.W83627DHG;
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logicalDeviceNumber = W83627_HARDWARE_MONITOR_LDN;
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break;
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default:
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chip = Chip.Unknown;
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logicalDeviceNumber = 0;
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break;
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} break;
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case 0xB0:
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moel@19
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switch (revision & 0xF0) {
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moel@19
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case 0x70:
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chip = Chip.W83627DHGP;
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logicalDeviceNumber = W83627_HARDWARE_MONITOR_LDN;
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break;
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moel@19
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default:
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chip = Chip.Unknown;
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logicalDeviceNumber = 0;
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break;
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} break;
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default:
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chip = Chip.Unknown;
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logicalDeviceNumber = 0;
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break;
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}
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if (chip != Chip.Unknown) {
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Select(logicalDeviceNumber);
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ushort address = ReadWord(BASE_ADDRESS_REGISTER);
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Thread.Sleep(1);
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ushort verify = ReadWord(BASE_ADDRESS_REGISTER);
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ushort vendorID = 0;
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if (chip == Chip.F71862 || chip == Chip.F71882 || chip == Chip.F71889)
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vendorID = ReadWord(FINTEK_VENDOR_ID_REGISTER);
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moel@7
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WinbondFintekExit();
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moel@7
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if (address != verify || address == 0 || (address & 0xF007) != 0)
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return;
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moel@7
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moel@7
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switch (chip) {
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case Chip.W83627DHG:
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moel@19
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case Chip.W83627DHGP:
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case Chip.W83627HF:
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W83627 w83627 = new W83627(chip, revision, address);
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if (w83627.IsAvailable)
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hardware.Add(w83627);
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break;
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moel@16
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case Chip.F71862:
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moel@16
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case Chip.F71882:
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case Chip.F71889:
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if (vendorID == FINTEK_VENDOR_ID)
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hardware.Add(new F718XX(chip, address));
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break;
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moel@16
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case Chip.F71869:
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hardware.Add(new F718XX(chip, address));
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break;
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moel@7
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default: break;
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moel@7
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}
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moel@7
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moel@7
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return;
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moel@7
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}
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moel@1
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moel@7
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IT87Enter();
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moel@1
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moel@7
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switch (ReadWord(CHIP_ID_REGISTER)) {
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moel@21
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case 0x8716: chip = Chip.IT8716F; break;
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moel@21
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case 0x8718: chip = Chip.IT8718F; break;
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moel@21
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case 0x8720: chip = Chip.IT8720F; break;
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moel@21
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case 0x8726: chip = Chip.IT8726F; break;
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moel@7
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default: chip = Chip.Unknown; break;
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moel@7
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}
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moel@7
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moel@7
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if (chip != Chip.Unknown) {
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moel@7
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Select(IT87_ENVIRONMENT_CONTROLLER_LDN);
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moel@7
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ushort address = ReadWord(BASE_ADDRESS_REGISTER);
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moel@7
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Thread.Sleep(1);
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moel@7
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ushort verify = ReadWord(BASE_ADDRESS_REGISTER);
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moel@7
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moel@7
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IT87Exit();
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moel@7
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moel@7
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if (address != verify || address == 0 || (address & 0xF007) != 0)
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moel@7
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return;
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moel@7
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moel@16
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IT87XX it87 = new IT87XX(chip, address);
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moel@7
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if (it87.IsAvailable)
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moel@7
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hardware.Add(it87);
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moel@7
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moel@1
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return;
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moel@7
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}
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moel@7
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}
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moel@1
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}
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moel@1
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moel@1
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public IHardware[] Hardware {
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moel@1
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get {
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moel@1
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return hardware.ToArray();
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moel@1
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}
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moel@1
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}
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moel@1
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moel@1
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public string GetReport() {
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moel@1
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283 |
return null;
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moel@1
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}
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moel@1
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moel@1
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public void Close() { }
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moel@1
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}
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moel@1
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}
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