Hardware/CPU/AMD10CPU.cs
author moel.mich
Wed, 22 Sep 2010 19:12:12 +0000
changeset 196 5e9a8595296c
parent 195 0ee888c485d5
child 197 fb66f749b7ff
permissions -rw-r--r--
Rewritten the PCI access for AMD CPUs.
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/*
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  Version: MPL 1.1/GPL 2.0/LGPL 2.1
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  The contents of this file are subject to the Mozilla Public License Version
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  1.1 (the "License"); you may not use this file except in compliance with
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  the License. You may obtain a copy of the License at
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  http://www.mozilla.org/MPL/
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  Software distributed under the License is distributed on an "AS IS" basis,
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  WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License
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  for the specific language governing rights and limitations under the License.
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  The Original Code is the Open Hardware Monitor code.
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  The Initial Developer of the Original Code is 
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  Michael Möller <m.moeller@gmx.ch>.
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  Portions created by the Initial Developer are Copyright (C) 2009-2010
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  the Initial Developer. All Rights Reserved.
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  Contributor(s):
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  Alternatively, the contents of this file may be used under the terms of
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  either the GNU General Public License Version 2 or later (the "GPL"), or
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  the GNU Lesser General Public License Version 2.1 or later (the "LGPL"),
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  in which case the provisions of the GPL or the LGPL are applicable instead
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  of those above. If you wish to allow use of your version of this file only
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  under the terms of either the GPL or the LGPL, and not to allow others to
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  use your version of this file under the terms of the MPL, indicate your
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  decision by deleting the provisions above and replace them with the notice
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  and other provisions required by the GPL or the LGPL. If you do not delete
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  the provisions above, a recipient may use your version of this file under
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  the terms of any one of the MPL, the GPL or the LGPL.
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*/
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using System;
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using System.Globalization;
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using System.Text;
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namespace OpenHardwareMonitor.Hardware.CPU {
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  internal sealed class AMD10CPU : AMDCPU {
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    private readonly Sensor coreTemperature;
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    private const byte MISCELLANEOUS_CONTROL_FUNCTION = 3;
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    private const ushort MISCELLANEOUS_CONTROL_DEVICE_ID = 0x1203;
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    private const byte REPORTED_TEMPERATURE_CONTROL_REGISTER = 0xA4;
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    private readonly uint miscellaneousControlAddress;
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    public AMD10CPU(int processorIndex, CPUID[][] cpuid, ISettings settings)
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      : base(processorIndex, cpuid, settings) 
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    {            
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      // AMD family 10h processors support only one temperature sensor
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      coreTemperature = new Sensor(
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        "Core" + (coreCount > 1 ? " #1 - #" + coreCount : ""), 0,
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        SensorType.Temperature, this, new [] {
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            new ParameterDescription("Offset [°C]", "Temperature offset.", 0)
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          }, settings);
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      // get the pci address for the Miscellaneous Control registers 
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      miscellaneousControlAddress = GetPciAddress(
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        MISCELLANEOUS_CONTROL_FUNCTION, MISCELLANEOUS_CONTROL_DEVICE_ID);
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      Update();                   
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    }
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    protected override uint[] GetMSRs() {
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      return new uint[] { };
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    }
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    public override string GetReport() {
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      StringBuilder r = new StringBuilder();
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      r.Append(base.GetReport());
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      r.Append("Miscellaneous Control Address: ");
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      r.AppendLine((miscellaneousControlAddress).ToString("X",
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        CultureInfo.InvariantCulture));
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      r.AppendLine();
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      return r.ToString();
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    }
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    public override void Update() {
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      base.Update();
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      if (miscellaneousControlAddress != WinRing0.InvalidPciAddress) {
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        uint value;
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        if (WinRing0.ReadPciConfigDwordEx(miscellaneousControlAddress,
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          REPORTED_TEMPERATURE_CONTROL_REGISTER, out value)) {
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          coreTemperature.Value = ((value >> 21) & 0x7FF) / 8.0f +
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            coreTemperature.Parameters[0].Value;
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          ActivateSensor(coreTemperature);
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        } else {
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          DeactivateSensor(coreTemperature);
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        }
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      }
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    }
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  }
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}