sl@0: /*
sl@0: * Copyright (c) 2005-2009 Nokia Corporation and/or its subsidiary(-ies).
sl@0: * All rights reserved.
sl@0: * This component and the accompanying materials are made available
sl@0: * under the terms of the License "Eclipse Public License v1.0"
sl@0: * which accompanies this distribution, and is available
sl@0: * at the URL "http://www.eclipse.org/legal/epl-v10.html".
sl@0: *
sl@0: * Initial Contributors:
sl@0: * Nokia Corporation - initial contribution.
sl@0: *
sl@0: * Contributors:
sl@0: *
sl@0: * Description: 
sl@0: *
sl@0: */
sl@0: 
sl@0: 
sl@0: /**
sl@0:  @file
sl@0: */
sl@0: 
sl@0: 
sl@0: #include <kernel\u32std.h>	// need this for __NAKED__, __JUMP and __POPRET
sl@0: 
sl@0: extern "C" {
sl@0: #ifdef __GCC32__
sl@0: __NAKED__ long long __divdi3(long long /*dividend*/, long long /*divisor*/)
sl@0: //
sl@0: // Dividend in r1:r0, divisor in r3:r2, Return quotient in r1:r0
sl@0: //
sl@0: 	{
sl@0: 	asm("stmfd sp!, {r4-r8,lr} ");
sl@0: 	asm("eor r8, r1, r3 ");				// sign of result into r8
sl@0: 	asm("movs r1, r1 ");
sl@0: 	asm("bpl 1f ");
sl@0: 	asm("rsbs r0, r0, #0 ");			// ABS(dividend)
sl@0: 	asm("rsc r1, r1, #0 ");
sl@0: 	asm("1: ");
sl@0: 	asm("movs r3, r3 ");
sl@0: 	asm("bpl 2f ");
sl@0: 	asm("rsbs r2, r2, #0 ");			// ABS(divisor)
sl@0: 	asm("rsc r3, r3, #0 ");
sl@0: 	asm("2: ");
sl@0: 	asm("bl UDiv01 ");					// do the division, result in r4,r5
sl@0: 	asm("eors r0, r4, r8, asr #32 ");	// quotient into r1:r0, inverted if quotient -ve
sl@0: 	asm("eors r1, r5, r8, asr #32 ");
sl@0: 	asm("adcs r0, r0, #0 ");		// if quotient -ve, add 1
sl@0: 	asm("adcs r1, r1, #0 ");
sl@0: 	__POPRET("r4-r8,");
sl@0: 	}
sl@0: 
sl@0: __NAKED__ long long __moddi3(long long /*dividend*/, long long /*divisor*/)	/* signed */
sl@0: 	{
sl@0: 	asm("stmfd sp!, {r4-r8,lr} ");
sl@0: 	asm("movs r8, r1 ");				// sign of remainder (=sign of dividend) into r8
sl@0: 	asm("bpl 1f ");
sl@0: 	asm("rsbs r0, r0, #0 ");			// ABS(dividend)
sl@0: 	asm("rsc r1, r1, #0 ");
sl@0: 	asm("1: ");
sl@0: 	asm("movs r3, r3 ");
sl@0: 	asm("bpl 2f ");
sl@0: 	asm("rsbs r2, r2, #0 ");			// ABS(divisor)
sl@0: 	asm("rsc r3, r3, #0 ");
sl@0: 	asm("2: ");
sl@0: 	asm("bl UDiv01 ");					// do the division, remainder in r3,r6
sl@0: 	asm("eors r0, r3, r8, asr #32 ");	// remainder into r1:r0, inverted if dividend -ve
sl@0: 	asm("eors r1, r6, r8, asr #32 ");
sl@0: 	asm("adcs r0, r0, #0 ");			// if dividend -ve, add 1
sl@0: 	asm("adcs r1, r1, #0 ");
sl@0: 	__POPRET("r4-r8,");
sl@0: 	}
sl@0: 
sl@0: __NAKED__ long long __umoddi3(unsigned long long /*dividend*/, unsigned long long /*divisor*/)	/* unsigned */
sl@0: 	{
sl@0: 	asm("stmfd sp!, {r4-r7,lr} ");
sl@0: 	asm("bl UDiv01 ");					// do the division, remainder in r6:r3
sl@0: 	asm("mov r0, r3 ");
sl@0: 	asm("mov r1, r6 ");
sl@0: 	__POPRET("r4-r7,");
sl@0: 	}
sl@0: 
sl@0: __NAKED__ long long __ashrdi3(long long /*value*/, unsigned int /*count*/)
sl@0: 	{
sl@0: 	asm("cmp r2, #63 ");
sl@0: 	asm("movhi r2, #63 ");			// count>63 same as count=63
sl@0: 	asm("cmp r2, #32 ");
sl@0: 	asm("bcs Asr01 ");				// jump if shift count >=32
sl@0: 	asm("rsb r12, r2, #32 ");		// r12=32-shift count
sl@0: 	asm("mov r0, r0, lsr r2 ");		// shift ls word right
sl@0: 	asm("orr r0, r0, r1, lsl r12 ");	// or in bits shifted out of ms word
sl@0: 	asm("mov r1, r1, asr r2 ");		// shift ms word right
sl@0: 	__JUMP(,lr);
sl@0: 	asm("Asr01: ");
sl@0: 	asm("sub r2, r2, #32 ");		// r2=shift count-32
sl@0: 	asm("mov r0, r1, asr r2 ");		// ls word = ms word >> (count-32)
sl@0: 	asm("mov r1, r1, asr #32 ");	// ms word of result=sign extension of r1
sl@0: 	__JUMP(,lr);
sl@0: 	}
sl@0: 
sl@0: __NAKED__ long long __ashldi3(long long /*value*/, unsigned int /*count*/)
sl@0: 	{
sl@0: 	asm("cmp r2, #63 ");
sl@0: 	asm("movhi r2, #64 ");			// count>63 same as count=64
sl@0: 	asm("cmp r2, #32 ");
sl@0: 	asm("bcs Asl01 ");				// jump if shift count >=32
sl@0: 	asm("rsb r12, r2, #32 ");		// r12=32-shift count
sl@0: 	asm("mov r1, r1, asl r2 ");		// shift ms word left
sl@0: 	asm("orr r1, r1, r0, lsr r12 ");	// or in bits shifted out of ls word
sl@0: 	asm("mov r0, r0, asl r2 ");		// shift ls word left
sl@0: 	__JUMP(,lr);
sl@0: 	asm("Asl01: ");
sl@0: 	asm("sub r2, r2, #32 ");		// r2=shift count-32
sl@0: 	asm("mov r1, r0, asl r2 ");		// result ms word = ls word << (count-32)
sl@0: 	asm("mov r0, #0 ");				// ls word of result is zero
sl@0: 	__JUMP(,lr);
sl@0: 	}
sl@0: 
sl@0: __NAKED__ unsigned long long __lshrdi3(unsigned long long /*value*/, unsigned int /*count*/)
sl@0: 	{
sl@0: 	asm("cmp r2, #63 ");
sl@0: 	asm("movhi r2, #64 ");			// count>63 same as count=64
sl@0: 	asm("cmp r2, #32 ");
sl@0: 	asm("bcs Lsr01 ");				// jump if shift count >=32
sl@0: 	asm("rsb r12, r2, #32 ");		// r12=32-shift count
sl@0: 	asm("mov r0, r0, lsr r2 ");		// shift ls word right
sl@0: 	asm("orr r0, r0, r1, lsl r12 ");	// or in bits shifted out of ms word
sl@0: 	asm("mov r1, r1, lsr r2 ");		// shift ms word right
sl@0: 	__JUMP(,lr);
sl@0: 	asm("Lsr01: ");
sl@0: 	asm("sub r2, r2, #32 ");		// r2=shift count-32
sl@0: 	asm("mov r0, r1, lsr r2 ");		// ls word = ms word >> (count-32)
sl@0: 	asm("mov r1, #0 ");				// ms word of result = 0
sl@0: 	__JUMP(,lr);
sl@0: 	}
sl@0: 
sl@0: __NAKED__ long long __muldi3(long long /*multiplicand*/, long long /*multiplier*/)
sl@0: 	{
sl@0: 	asm("mul r1, r2, r1 ");				// r1=low2*high1
sl@0: 	asm("mov ip, r0 ");					// ip=low1
sl@0: 	asm("mla r1, r0, r3, r1 ");			// r1+=low1*high2
sl@0: 	asm("mov r0, #0 ");
sl@0: 	asm("umlal r0, r1, r2, ip ");		// r1:r0 += high1*low1
sl@0: 	__JUMP(,lr);
sl@0: 	}
sl@0: 
sl@0: __NAKED__ long long __negdi2(long long /*argument*/)
sl@0: 	{
sl@0: 	asm("rsbs r0, r0, #0 ");		// r0=0-r0, set carry
sl@0: 	asm("rscs r1, r1, #0 ");		// r1=0-r1-(1-C)
sl@0: 	__JUMP(,lr);
sl@0: 	}
sl@0: 
sl@0: __NAKED__ unsigned long long __udivmoddi4 (unsigned long long /*dividend*/,
sl@0: 													unsigned long long /*divisor*/,
sl@0: 													unsigned long long* /*p_remainder*/)
sl@0: 	{
sl@0: 	asm("stmfd sp!, {r4-r7,lr} ");
sl@0: 	asm("bl UDiv01 ");					// do the division, quotient in r5:r4 remainder in r6:r3
sl@0: 	asm("ldr r7, [sp, #20] ");			// r7=p_remainder
sl@0: 	asm("mov r0, r4 ");					// r0=quotient low
sl@0: 	asm("stmia r7, {r3,r6} ");			// store remainder
sl@0: 	asm("mov r1, r5 ");					// r0=quotient high
sl@0: 	__POPRET("r4-r7,");
sl@0: 	}
sl@0: 
sl@0: __NAKED__ int __cmpdi2(long long /*a*/, long long /*b*/)
sl@0: 	{
sl@0: 	// return 0 if a<b, 1 if a=b, 2 if a>b
sl@0: 	asm("subs r0, r2, r0 ");
sl@0: 	asm("sbcs r1, r3, r1 ");			// r1:r0 = b-a, set flags
sl@0: 	asm("movlt r0, #2 ");				// if b<a r0=2
sl@0: 	__JUMP(lt,lr);						// if b<a return
sl@0: 	asm("cmpeq r0, #0 ");				// if top word of difference=0, look at bottom
sl@0: 	asm("moveq r0, #1 ");				// if a=b, r0=1
sl@0: 	asm("movne r0, #0 ");				// else r=0
sl@0: 	__JUMP(,lr);
sl@0: 	}
sl@0: 
sl@0: __NAKED__ int __ucmpdi2(unsigned long long /*a*/, unsigned long long /*b*/)
sl@0: 	{
sl@0: 	// return 0 if a<b, 1 if a=b, 2 if a>b
sl@0: 	asm("cmp r1, r3 ");
sl@0: 	asm("cmpeq r0, r2 ");				// compare r1:r0 - r3:r2
sl@0: 	asm("movhi r0, #2 ");				// r0=2 if a>b
sl@0: 	asm("moveq r0, #1 ");				// r0=1 if a=b
sl@0: 	asm("movlo r0, #0 ");				// r0=0 if a<b
sl@0: 	__JUMP(,lr);
sl@0: 	}
sl@0: #endif
sl@0: 
sl@0: #if defined(__GCC32__)
sl@0: void __division_by_zero();
sl@0: #define DIV_BY_ZERO " __division_by_zero "
sl@0: #elif defined(__ARMCC__)
sl@0: void __rt_div0 (void);
sl@0: #define DIV_BY_ZERO " __cpp(__rt_div0) "
sl@0: #endif
sl@0: 
sl@0: void __division_by_zero()
sl@0: 	{
sl@0: 	RThread().RaiseException(EExcIntegerDivideByZero);
sl@0:     }
sl@0: 
sl@0: __NAKED__ unsigned long long __udivdi3(unsigned long long /*dividend*/, unsigned long long /*divisor*/)
sl@0: //
sl@0: // Dividend in r1:r0, divisor in r3:r2, Return quotient in r1:r0
sl@0: //
sl@0: 	{
sl@0: 	asm("stmfd sp!, {r4-r7,lr} ");
sl@0: 	asm("bl UDiv01 ");					// do the division, result in r4,r5
sl@0: 	asm("mov r0, r4 ");
sl@0: 	asm("mov r1, r5 ");
sl@0: 	__POPRET("r4-r7,");
sl@0: 
sl@0: 	// Unsigned 64-bit division. Dividend in r0,r1, divisor in r2,r3
sl@0: 	// Quotient returned in r4,r5, Remainder in r3,r6
sl@0: 	// Registers r0-r7,r12 used, r8-r11 unmodified
sl@0: 	asm(".global UDiv01 ");
sl@0: 	asm("UDiv01: ");
sl@0: 	asm("movs r3, r3 ");				// check if divisor fits in 32 bits
sl@0: 	asm("bne udiv64a ");				// branch if not
sl@0: 	asm("movs r2, r2 ");				// check if divisor fits in 31 bits
sl@0: 	asm("bmi udiv64e ");				// branch if not
sl@0: 	asm("beq udiv64_divby0 ");			// if divisor=0, branch to error routine
sl@0: 
sl@0: 	// Divisor is <0x80000000
sl@0: 	// This means that a 32-bit accumulator is sufficient
sl@0: 	asm("mov r4, #0 ");					// use r3 as acc, result in r4, r5
sl@0: 	asm("mov r5, #0 ");
sl@0: 	asm("mov r6, #8 ");					// do 2 set of 32 iterations
sl@0: 	asm("udiv64b: ");
sl@0: 	asm("adds r1, r1, r1 ");			// shift dividend left into acc
sl@0: 	asm("adcs r3, r3, r3 ");
sl@0: 	asm("subs r3, r3, r2 ");			// subtract divisor from acc
sl@0: 	asm("adc r5, r5, r5 ");				// shift result bit left into quotient
sl@0: 	asm("addcc r3, r3, r2 ");			// if borrow, add back
sl@0: 	asm("adds r1, r1, r1 ");			// shift dividend left into acc
sl@0: 	asm("adcs r3, r3, r3 ");
sl@0: 	asm("subs r3, r3, r2 ");			// subtract divisor from acc
sl@0: 	asm("adc r5, r5, r5 ");				// shift result bit left into quotient
sl@0: 	asm("addcc r3, r3, r2 ");			// if borrow, add back
sl@0: 	asm("adds r1, r1, r1 ");			// shift dividend left into acc
sl@0: 	asm("adcs r3, r3, r3 ");
sl@0: 	asm("subs r3, r3, r2 ");			// subtract divisor from acc
sl@0: 	asm("adc r5, r5, r5 ");				// shift result bit left into quotient
sl@0: 	asm("addcc r3, r3, r2 ");			// if borrow, add back
sl@0: 	asm("adds r1, r1, r1 ");			// shift dividend left into acc
sl@0: 	asm("adcs r3, r3, r3 ");
sl@0: 	asm("subs r3, r3, r2 ");			// subtract divisor from acc
sl@0: 	asm("adc r5, r5, r5 ");				// shift result bit left into quotient
sl@0: 	asm("addcc r3, r3, r2 ");			// if borrow, add back
sl@0: 	asm("subs r6, r6, #1 ");			// loop
sl@0: 	asm("bne udiv64b ");
sl@0: 	asm("mov r6, #8 ");					// 2nd set of 32 iterations
sl@0: 	asm("udiv64c: ");
sl@0: 	asm("adds r0, r0, r0 ");			// shift dividend left into acc
sl@0: 	asm("adcs r3, r3, r3 ");
sl@0: 	asm("subs r3, r3, r2 ");			// subtract divisor from acc
sl@0: 	asm("adc r4, r4, r4 ");				// shift result bit left into quotient
sl@0: 	asm("addcc r3, r3, r2 ");			// if borrow, add back
sl@0: 	asm("adds r0, r0, r0 ");			// shift dividend left into acc
sl@0: 	asm("adcs r3, r3, r3 ");
sl@0: 	asm("subs r3, r3, r2 ");			// subtract divisor from acc
sl@0: 	asm("adc r4, r4, r4 ");				// shift result bit left into quotient
sl@0: 	asm("addcc r3, r3, r2 ");			// if borrow, add back
sl@0: 	asm("adds r0, r0, r0 ");			// shift dividend left into acc
sl@0: 	asm("adcs r3, r3, r3 ");
sl@0: 	asm("subs r3, r3, r2 ");			// subtract divisor from acc
sl@0: 	asm("adc r4, r4, r4 ");				// shift result bit left into quotient
sl@0: 	asm("addcc r3, r3, r2 ");			// if borrow, add back
sl@0: 	asm("adds r0, r0, r0 ");			// shift dividend left into acc
sl@0: 	asm("adcs r3, r3, r3 ");
sl@0: 	asm("subs r3, r3, r2 ");			// subtract divisor from acc
sl@0: 	asm("adc r4, r4, r4 ");				// shift result bit left into quotient
sl@0: 	asm("addcc r3, r3, r2 ");			// if borrow, add back
sl@0: 	asm("subs r6, r6, #1 ");			// loop
sl@0: 	asm("bne udiv64c ");
sl@0: 	__JUMP(,lr);
sl@0: 
sl@0: 	// 2^31 <= Divisor < 2^32
sl@0: 	// Need 33-bit accumulator - use carry flag as 33rd bit
sl@0: 	asm("udiv64e: ");
sl@0: 	asm("mov r4, #0 ");					// use r3 as acc, result in r4, r5
sl@0: 	asm("mov r5, #0 ");
sl@0: 	asm("mov r6, #8 ");					// do 2 set of 32 iterations
sl@0: 	asm("udiv64f: ");
sl@0: 	asm("adds r1, r1, r1 ");			// shift dividend left into acc
sl@0: 	asm("adcs r3, r3, r3 ");
sl@0: 	asm("subcs r3, r3, r2 ");
sl@0: 	asm("subccs r3, r3, r2 ");			// subtract divisor from acc
sl@0: 	asm("adc r5, r5, r5 ");				// shift result bit left into quotient
sl@0: 	asm("addcc r3, r3, r2 ");			// if borrow, add back
sl@0: 	asm("adds r1, r1, r1 ");			// shift dividend left into acc
sl@0: 	asm("adcs r3, r3, r3 ");
sl@0: 	asm("subcs r3, r3, r2 ");
sl@0: 	asm("subccs r3, r3, r2 ");			// subtract divisor from acc
sl@0: 	asm("adc r5, r5, r5 ");				// shift result bit left into quotient
sl@0: 	asm("addcc r3, r3, r2 ");			// if borrow, add back
sl@0: 	asm("adds r1, r1, r1 ");			// shift dividend left into acc
sl@0: 	asm("adcs r3, r3, r3 ");
sl@0: 	asm("subcs r3, r3, r2 ");
sl@0: 	asm("subccs r3, r3, r2 ");			// subtract divisor from acc
sl@0: 	asm("adc r5, r5, r5 ");				// shift result bit left into quotient
sl@0: 	asm("addcc r3, r3, r2 ");			// if borrow, add back
sl@0: 	asm("adds r1, r1, r1 ");			// shift dividend left into acc
sl@0: 	asm("adcs r3, r3, r3 ");
sl@0: 	asm("subcs r3, r3, r2 ");
sl@0: 	asm("subccs r3, r3, r2 ");			// subtract divisor from acc
sl@0: 	asm("adc r5, r5, r5 ");				// shift result bit left into quotient
sl@0: 	asm("addcc r3, r3, r2 ");			// if borrow, add back
sl@0: 	asm("subs r6, r6, #1 ");			// loop
sl@0: 	asm("bne udiv64f ");
sl@0: 	asm("mov r6, #8 ");					// 2nd set of 32 iterations
sl@0: 	asm("udiv64g: ");
sl@0: 	asm("adds r0, r0, r0 ");			// shift dividend left into acc
sl@0: 	asm("adcs r3, r3, r3 ");
sl@0: 	asm("subcs r3, r3, r2 ");
sl@0: 	asm("subccs r3, r3, r2 ");			// subtract divisor from acc
sl@0: 	asm("adc r4, r4, r4 ");				// shift result bit left into quotient
sl@0: 	asm("addcc r3, r3, r2 ");			// if borrow, add back
sl@0: 	asm("adds r0, r0, r0 ");			// shift dividend left into acc
sl@0: 	asm("adcs r3, r3, r3 ");
sl@0: 	asm("subcs r3, r3, r2 ");
sl@0: 	asm("subccs r3, r3, r2 ");			// subtract divisor from acc
sl@0: 	asm("adc r4, r4, r4 ");				// shift result bit left into quotient
sl@0: 	asm("addcc r3, r3, r2 ");			// if borrow, add back
sl@0: 	asm("adds r0, r0, r0 ");			// shift dividend left into acc
sl@0: 	asm("adcs r3, r3, r3 ");
sl@0: 	asm("subcs r3, r3, r2 ");
sl@0: 	asm("subccs r3, r3, r2 ");			// subtract divisor from acc
sl@0: 	asm("adc r4, r4, r4 ");				// shift result bit left into quotient
sl@0: 	asm("addcc r3, r3, r2 ");			// if borrow, add back
sl@0: 	asm("adds r0, r0, r0 ");			// shift dividend left into acc
sl@0: 	asm("adcs r3, r3, r3 ");
sl@0: 	asm("subcs r3, r3, r2 ");
sl@0: 	asm("subccs r3, r3, r2 ");			// subtract divisor from acc
sl@0: 	asm("adc r4, r4, r4 ");				// shift result bit left into quotient
sl@0: 	asm("addcc r3, r3, r2 ");			// if borrow, add back
sl@0: 	asm("subs r6, r6, #1 ");			// loop
sl@0: 	asm("bne udiv64g ");
sl@0: 	__JUMP(,lr);
sl@0: 	
sl@0: 	// Divisor >= 2^32, so quotient < 2^32
sl@0: 	// Use 64 bit accumulator, 32 bit quotient
sl@0: 	asm("udiv64a: ");
sl@0: 	asm("mov r4, #0 ");					// quotient in r4, use r1, r6 as accumulator
sl@0: 	asm("mov r6, #0 ");
sl@0: 	asm("mov r5, #8 ");					// do 32 iterations
sl@0: 	asm("udiv64d: ");
sl@0: 	asm("adds r0, r0, r0 ");			// shift dividend left into acc
sl@0: 	asm("adcs r1, r1, r1 ");
sl@0: 	asm("adcs r6, r6, r6 ");
sl@0: 	asm("subs r7, r1, r2 ");			// subtract divisor from acc, result into r7,r12
sl@0: 	asm("sbcs r12, r6, r3 ");
sl@0: 	asm("adc r4, r4, r4 ");				// shift result bit left into quotient
sl@0: 	asm("movcs r1, r7 ");				// if no borrow, update acc
sl@0: 	asm("movcs r6, r12 ");
sl@0: 	asm("adds r0, r0, r0 ");			// shift dividend left into acc
sl@0: 	asm("adcs r1, r1, r1 ");
sl@0: 	asm("adcs r6, r6, r6 ");
sl@0: 	asm("subs r7, r1, r2 ");			// subtract divisor from acc, result into r7,r12
sl@0: 	asm("sbcs r12, r6, r3 ");
sl@0: 	asm("adc r4, r4, r4 ");				// shift result bit left into quotient
sl@0: 	asm("movcs r1, r7 ");				// if no borrow, update acc
sl@0: 	asm("movcs r6, r12 ");
sl@0: 	asm("adds r0, r0, r0 ");			// shift dividend left into acc
sl@0: 	asm("adcs r1, r1, r1 ");
sl@0: 	asm("adcs r6, r6, r6 ");
sl@0: 	asm("subs r7, r1, r2 ");			// subtract divisor from acc, result into r7,r12
sl@0: 	asm("sbcs r12, r6, r3 ");
sl@0: 	asm("adc r4, r4, r4 ");				// shift result bit left into quotient
sl@0: 	asm("movcs r1, r7 ");				// if no borrow, update acc
sl@0: 	asm("movcs r6, r12 ");
sl@0: 	asm("adds r0, r0, r0 ");			// shift dividend left into acc
sl@0: 	asm("adcs r1, r1, r1 ");
sl@0: 	asm("adcs r6, r6, r6 ");
sl@0: 	asm("subs r7, r1, r2 ");			// subtract divisor from acc, result into r7,r12
sl@0: 	asm("sbcs r12, r6, r3 ");
sl@0: 	asm("adc r4, r4, r4 ");				// shift result bit left into quotient
sl@0: 	asm("movcs r1, r7 ");				// if no borrow, update acc
sl@0: 	asm("movcs r6, r12 ");
sl@0: 	asm("subs r5, r5, #1 ");			// loop
sl@0: 	asm("bne udiv64d ");
sl@0: 	asm("mov r3, r1 ");					// remainder in r3,r6
sl@0: 	__JUMP(,lr);
sl@0: 
sl@0: 	asm("udiv64_divby0: ");
sl@0: 	asm("str lr, [sp, #-4]! ");
sl@0: 	asm("bl " DIV_BY_ZERO);
sl@0: 	__POPRET("");
sl@0: 	}
sl@0: 
sl@0: }
sl@0: