sl@0: /* sl@0: * Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies). sl@0: * All rights reserved. sl@0: * This component and the accompanying materials are made available sl@0: * under the terms of the License "Eclipse Public License v1.0" sl@0: * which accompanies this distribution, and is available sl@0: * at the URL "http://www.eclipse.org/legal/epl-v10.html". sl@0: * sl@0: * Initial Contributors: sl@0: * Nokia Corporation - initial contribution. sl@0: */ sl@0: // sl@0: // Contributors: sl@0: // sl@0: // Description: sl@0: // This file is part of the NE1_TB Variant Base Port sl@0: // Hardware Configuration Respoitory Platform Specific Layer (PSL) sl@0: // sl@0: sl@0: sl@0: // -- INCLUDES ---------------------------------------------------------------- sl@0: sl@0: sl@0: #include "hcr_debug.h" sl@0: sl@0: #include "hcr_hai.h" sl@0: sl@0: #include "hcr_uids.h" sl@0: sl@0: #include sl@0: #include sl@0: sl@0: sl@0: #ifdef __WINS__ sl@0: // On WINS the EMapAttrSupRo and EMapAttrCachedMax doesn't exists sl@0: #define EMapAttrSupRo 0x01 sl@0: #define EMapAttrCachedMax 0xF000 sl@0: #endif sl@0: sl@0: sl@0: // -- GLOBALS ----------------------------------------------------------------- sl@0: sl@0: sl@0: GLREF_C HCR::SRepositoryCompiled gRepository; sl@0: #define BUFFER_OFFSET_ZERO 0 sl@0: sl@0: // -- CLASSES- ---------------------------------------------------------------- sl@0: sl@0: sl@0: class HCRVariant : public HCR::MVariant sl@0: { sl@0: sl@0: public: sl@0: sl@0: HCRVariant(); sl@0: virtual ~HCRVariant(); sl@0: sl@0: public: sl@0: sl@0: TInt Initialise(); sl@0: sl@0: TBool IgnoreCoreImgRepository(); sl@0: TInt GetCompiledRepositoryAddress( TAny* & aAddr); sl@0: TInt GetOverrideRepositoryAddress( TAny* & aAddr); sl@0: sl@0: private: sl@0: DChunk * iChunk; sl@0: }; sl@0: sl@0: sl@0: sl@0: sl@0: // -- METHODS ----------------------------------------------------------------- sl@0: sl@0: sl@0: HCRVariant::HCRVariant() sl@0: : iChunk(0) sl@0: { sl@0: HCR_FUNC("HCRVariant"); sl@0: } sl@0: sl@0: sl@0: HCRVariant::~HCRVariant() sl@0: { sl@0: HCR_FUNC("~HCRVariant"); sl@0: if (iChunk != 0) sl@0: { sl@0: NKern::ThreadEnterCS(); sl@0: TInt r = Kern::ChunkClose(iChunk); sl@0: __NK_ASSERT_ALWAYS(r!=0); sl@0: NKern::ThreadLeaveCS(); sl@0: } sl@0: } sl@0: sl@0: sl@0: TInt HCRVariant::Initialise() sl@0: { sl@0: HCR_FUNC("HCRVariant::Initialise"); sl@0: sl@0: HCR_TRACE_RETURN(KErrNone); sl@0: } sl@0: sl@0: sl@0: TInt HCRVariant::GetCompiledRepositoryAddress( TAny* & aAddr) sl@0: { sl@0: HCR_FUNC("HCRVariant::GetCompiledRepositoryAddress"); sl@0: sl@0: aAddr = static_cast(&gRepository); sl@0: HCR_TRACE_RETURN(KErrNone); sl@0: } sl@0: sl@0: TBool HCRVariant::IgnoreCoreImgRepository() sl@0: { sl@0: HCR_FUNC("HCRVariant::IgnoreCoreImgRepository"); sl@0: sl@0: HCR_TRACE_RETURN(EFalse); sl@0: } sl@0: sl@0: TInt HCRVariant::GetOverrideRepositoryAddress( TAny* & aAddr) sl@0: { sl@0: HCR_FUNC("HCRVariant::GetRAMRepositoryAddress"); sl@0: aAddr = 0; sl@0: sl@0: // Note: the SMR feature by which we obtain the address of the override sl@0: // repository is only supported in the ARM bootstrap, not X86 or WINS so sl@0: // this test code needs conditional compilation. sl@0: #if !defined(__WINS__) && !defined(__X86__) sl@0: sl@0: // Note to future implementor: sl@0: // #include sl@0: // First check to see if SMRIB was created during boot time. sl@0: // If SSuperPageBase::iSmrData == KSuperPageAddressFieldUndefined (i.e. -1) sl@0: // it does not exist, return KErrNotSupported, SMR not support by base port sl@0: // or it is not available due to boot scenario, i.e. boot from MMC sl@0: // sl@0: // If it does exist (i.e. boot from NAND) then read and process the sl@0: // SMR entries listed in the SMRIB looking for KHCRUID_SMRPayloadUID. sl@0: // Next using the internal sizes from the HCR dat file within the SMR image sl@0: // determine if the RAM holding the SMR image can be shrunk to return sl@0: // unused RAM pages at the end of the image. sl@0: // sl@0: // Finally allocate the reserved RAM identified in the SMR entry to a sl@0: // DChunk and return the virtual address of the HCR data file payload sl@0: // within the SMR image, i.e. iBase+(sizeof(SSmrRomHeader)>>2). sl@0: // Locate SMRIB sl@0: const TSuperPage& superpage = Kern::SuperPage(); sl@0: TUint32* smrIB; sl@0: smrIB = (TUint32 *) superpage.iSmrData; sl@0: sl@0: HCR_TRACE2("--- Superpage: 0x%08x, SMRIB: 0x%08x", &superpage, smrIB); sl@0: sl@0: if( (smrIB == NULL) || (smrIB == (TUint32*)KSuperPageAddressFieldUndefined)) sl@0: { sl@0: HCR_TRACE_RETURN(KErrNotSupported); sl@0: } sl@0: sl@0: HCR_HEX_DUMP_ABS((TUint8 *)smrIB, 8*sizeof(SSmrBank) ); sl@0: SSmrBank * smrBank = (SSmrBank *) smrIB; sl@0: sl@0: // T_HCRUT designed to work ith the second HCR SMR image as the first sl@0: // is used by the t_hcr test suite. sl@0: int smrInst = 2; sl@0: sl@0: while( smrBank->iBase != 0 ) sl@0: { sl@0: HCR_TRACE2("--- smrBank: 0x%08x, smrBank->iPayloadUID: 0x%08x", smrBank, smrBank->iPayloadUID); sl@0: sl@0: if (smrBank->iPayloadUID == KHCRUID_SMRPayloadUID) sl@0: { sl@0: smrInst--; sl@0: if (smrInst == 0) // PSL to use only the 2nd HCR SMR image sl@0: { sl@0: sl@0: HCR_TRACE2("--- smrPhysAddr: 0x%08x, size:0x%08x", smrBank->iBase, smrBank->iSize); sl@0: NKern::ThreadEnterCS(); sl@0: sl@0: TChunkCreateInfo info; sl@0: info.iType = TChunkCreateInfo::ESharedKernelSingle; sl@0: info.iMaxSize = smrBank->iSize; sl@0: sl@0: // Enable to give supervisor read only access and maximum caching at both L1 and L2. sl@0: info.iMapAttr = EMapAttrSupRo|EMapAttrCachedMax; sl@0: sl@0: info.iOwnsMemory = EFalse; sl@0: info.iDestroyedDfc = NULL; sl@0: TUint32 mapAttr; sl@0: TLinAddr chunkKernAddr; sl@0: TInt r = Kern::ChunkCreate(info, iChunk, chunkKernAddr, mapAttr); sl@0: if( r != KErrNone ) sl@0: { sl@0: HCR_TRACE1("--- Kern::ChunkCreate failed: 0x%08x", r); sl@0: NKern::ThreadLeaveCS(); sl@0: HCR_TRACE_RETURN(r); sl@0: } sl@0: sl@0: r = Kern::ChunkCommitPhysical(iChunk, BUFFER_OFFSET_ZERO, smrBank->iSize, smrBank->iBase); sl@0: if( r != KErrNone) sl@0: { sl@0: HCR_TRACE1("--- Kern::ChunkCommitPhysical failed: 0x%08x", r); sl@0: TInt r2 = Kern::ChunkClose(iChunk); sl@0: __NK_ASSERT_ALWAYS(r2!=0); sl@0: NKern::ThreadLeaveCS(); sl@0: HCR_TRACE_RETURN(r); sl@0: } sl@0: NKern::ThreadLeaveCS(); sl@0: sl@0: HCR_TRACE1("--- iChunkKernAddr: 0x%08x", chunkKernAddr); sl@0: // It should contains SMR and HCR image headers and some settings sl@0: HCR_HEX_DUMP_ABS((TUint8 *)chunkKernAddr, 1024 ); sl@0: sl@0: // Skip the SMR header, so we return the address of the first byte in the Repository sl@0: aAddr = (TAny *) (chunkKernAddr + sizeof(SSmrRomHeader)); sl@0: sl@0: HCR_TRACE_RETURN(KErrNone); sl@0: } sl@0: } sl@0: sl@0: ++smrBank; sl@0: } sl@0: #endif // !__WINS__ && !__X86__ sl@0: sl@0: HCR_TRACE_RETURN(KErrNotSupported); sl@0: } sl@0: sl@0: sl@0: // -- ENTRY POINTS ------------------------------------------------------------ sl@0: sl@0: sl@0: GLDEF_C HCR::MVariant* CreateHCRVariant() sl@0: { sl@0: HCR_FUNC("CreateHCRVariant"); sl@0: sl@0: return new HCRVariant; sl@0: }