sl@0: // Copyright (c) 1997-2009 Nokia Corporation and/or its subsidiary(-ies).
sl@0: // All rights reserved.
sl@0: // This component and the accompanying materials are made available
sl@0: // under the terms of the License "Eclipse Public License v1.0"
sl@0: // which accompanies this distribution, and is available
sl@0: // at the URL "http://www.eclipse.org/legal/epl-v10.html".
sl@0: //
sl@0: // Initial Contributors:
sl@0: // Nokia Corporation - initial contribution.
sl@0: //
sl@0: // Contributors:
sl@0: //
sl@0: // Description:
sl@0: // e32test\mmu\d_shadow.h
sl@0: // 
sl@0: //
sl@0: 
sl@0: #if !defined(__D_SHADOW_H__)
sl@0: #define __D_SHADOW_H__
sl@0: #include <e32cmn.h>
sl@0: #ifndef __KERNEL_MODE__
sl@0: #include <e32std.h>
sl@0: #endif
sl@0: 
sl@0: 
sl@0: enum TMemModel
sl@0: 	{
sl@0: 	EMemModelOther,
sl@0: 	EMemModelMoving,
sl@0: 	EMemModelMultiple,
sl@0: 	EMemModelFlexible
sl@0: 	};
sl@0: 	
sl@0: enum TCpu
sl@0: 	{
sl@0: 	ECpuUnknown,
sl@0: 	ECpuArm,
sl@0: 	ECpuX86
sl@0: 	};
sl@0: 	
sl@0: 	
sl@0: #ifdef __KERNEL_MODE__
sl@0: 
sl@0: // Memory Model Architecture
sl@0: 
sl@0: #ifdef __CPU_X86
sl@0: 	const TUint KPageDirectorySize = 1024;
sl@0: 	const TUint KMaxNumberOfPageDirectories = 1024;
sl@0: 	const TUint KPsudoX86TTBCR = 512;
sl@0: 
sl@0: #else 
sl@0: 	const TUint KPageDirectorySize = 4096;  // Full size (ttbr0+ttbr1)
sl@0: 	const TUint KMaxNumberOfPageDirectories = 256;
sl@0: #endif
sl@0: 
sl@0: #if defined(__MEMMODEL_MOVING__)
sl@0: 	const TUint KPageDirectoryBase = 0x61000000;
sl@0: 	const TUint KPageTableBase = 0x62000000;
sl@0: 	const TMemModel  KMemoryModel = EMemModelMoving;
sl@0: 	
sl@0: #elif defined(__MEMMODEL_MULTIPLE__)
sl@0: 	const TUint KPageDirectoryBase = 0xC1000000;
sl@0: 	const TUint KPageTableBase = 0xC2000000;
sl@0: 	const TMemModel  KMemoryModel = EMemModelMultiple;
sl@0: 
sl@0: #elif defined(__MEMMODEL_FLEXIBLE__)
sl@0: 	const TUint KPageDirectoryBase = 0xF4000000u;
sl@0: 	const TUint KPageTableBase = 0xF8000000u;
sl@0: 	const TMemModel  KMemoryModel = EMemModelFlexible;
sl@0: 	
sl@0: #else // other memory model
sl@0: 	const TUint KPageDirectoryBase = 0x00000000;
sl@0: 	const TUint KPageTableBase = 0x00000000;
sl@0: 	const TMemModel  KMemoryModel = EMemModelOther;
sl@0: #endif
sl@0: 
sl@0: #endif
sl@0: 
sl@0: 
sl@0: 
sl@0: class TCapsShadowV01
sl@0: 	{
sl@0: public:
sl@0: 	TVersion	iVersion;
sl@0: 	};
sl@0: 
sl@0: 	const TUint KGlobalPageDirectory=0xFFFFFFFF;
sl@0: 	const TUint KErrNoPageTable = 0x80000000;
sl@0: 	const TUint KPageOffsetMask = 0x7FFFFFFF;
sl@0: 
sl@0: class RShadow : public RBusLogicalChannel
sl@0: 	{
sl@0: public:
sl@0: 	enum TControl
sl@0: 		{
sl@0: 		EControlAllocShadow,
sl@0: 		EControlFreeShadow,
sl@0: 		EControlWriteShadow,
sl@0: 		EControlFreezeShadow,
sl@0: 		EControlSetPriority,
sl@0: 		EControlRead,
sl@0: 		EControlMmuId,
sl@0: 		EControlCacheType,
sl@0: 		EControlMeasureKernStackUse,
sl@0: 		EControlMeasureKernHeapFree,
sl@0: 		EControlWalkHeap,
sl@0: 		EControlCallFunction,
sl@0: 		EControlAllocPhys,
sl@0: 		EControlFreePhys,
sl@0: 		EControlClaimPhys,
sl@0: 		EControlGetMemoryArchitecture,
sl@0: 		EControlGetMemModelInfo,
sl@0: 		EControlGetPdInfo		
sl@0: 		};
sl@0: 		
sl@0: public:
sl@0: 	inline TInt Open();
sl@0: 	inline TInt Alloc(TUint anAddr);				// allocate a shadow ROM page
sl@0: 	inline TInt Free(TUint anAddr);					// free a shadow ROM page
sl@0: 	inline TInt Write(TUint anAddr, TAny* aSrc);	// write to a shadow ROM page
sl@0: 	inline TInt Freeze(TUint anAddr);				// freeze a shadow ROM page
sl@0: 	inline TInt SetPriority(TInt aHandle, TInt aPriority);
sl@0: 	inline TUint Read(TUint aLinAddr);
sl@0: 	inline TUint MmuId();
sl@0: 	inline TUint CacheType();
sl@0: 	inline TInt KernStackUsed();
sl@0: 	inline TInt KernHeapFree();
sl@0: 	inline void WalkHeap(TInt aThreadHandle);
sl@0: 	inline TInt CallFunction(TThreadFunction aFunction, TAny* aPtr);
sl@0: 	inline TInt AllocPhysicalRam(TUint32& aAddr, TInt aSize, TInt aAlign);
sl@0: 	inline TInt FreePhysicalRam(TUint32 aAddr, TInt aSize);
sl@0: 	inline TInt ClaimPhysicalRam(TUint32 aAddr, TInt aSize);
sl@0: 	inline void GetMemoryArchitecture(TCpu &aCpu, TUint &aCR);
sl@0: 	inline TMemModel GetMemModelInfo(TUint &aPageTable, TUint &aNumPds);
sl@0: 	inline TInt GetPdInfo(TUint aPdNo, TUint &aPdSize, TUint &aPdBase, TUint &aOffset);
sl@0: 	};
sl@0: 
sl@0: 
sl@0: #ifndef __KERNEL_MODE__
sl@0: inline TInt RShadow::Open()
sl@0: 	{
sl@0: 	return DoCreate(_L("Shadow"),TVersion(0,1,1),KNullUnit,NULL,NULL);
sl@0: 	}
sl@0: 
sl@0: inline TInt RShadow::Alloc(TUint anAddr)
sl@0: 	{ return DoControl(EControlAllocShadow,(TAny*)anAddr); }
sl@0: 
sl@0: inline TInt RShadow::Free(TUint anAddr)
sl@0: 	{ return DoControl(EControlFreeShadow,(TAny*)anAddr); }
sl@0: 
sl@0: inline TInt RShadow::Write(TUint anAddr, TAny *aSrc)
sl@0: 	{ return DoControl(EControlWriteShadow,(TAny*)anAddr,aSrc); }
sl@0: 
sl@0: inline TInt RShadow::Freeze(TUint anAddr)
sl@0: 	{ return DoControl(EControlFreezeShadow,(TAny*)anAddr); }
sl@0: 
sl@0: inline TInt RShadow::SetPriority(TInt aHandle, TInt aPriority)
sl@0: 	{ return DoControl(EControlSetPriority, (TAny*)aHandle, (TAny*)aPriority); }
sl@0: 
sl@0: inline TUint RShadow::Read(TUint aLinAddr)
sl@0: 	{ return DoControl(EControlRead, (TAny*)aLinAddr); }
sl@0: 
sl@0: inline TUint RShadow::MmuId()
sl@0: 	{ return DoControl(EControlMmuId); }
sl@0: 
sl@0: inline TUint RShadow::CacheType()
sl@0: 	{ return DoControl(EControlCacheType); }
sl@0: 
sl@0: inline TInt RShadow::KernStackUsed()
sl@0: 	{ return DoControl(EControlMeasureKernStackUse); }
sl@0: 
sl@0: inline TInt RShadow::KernHeapFree()
sl@0: 	{ return DoControl(EControlMeasureKernHeapFree); }
sl@0: 
sl@0: inline void RShadow::WalkHeap(TInt aThreadHandle)
sl@0: 	{ DoControl(EControlWalkHeap,(TAny*)aThreadHandle); }
sl@0: 
sl@0: inline TInt RShadow::CallFunction(TThreadFunction aFunction, TAny* aPtr)
sl@0: 	{ return DoControl(EControlCallFunction, (TAny*)aFunction, aPtr); }
sl@0: 
sl@0: inline TInt RShadow::AllocPhysicalRam(TUint32& aAddr, TInt aSize, TInt aAlign)
sl@0: 	{ TInt r=DoControl(EControlAllocPhys, (TAny*)aSize, (TAny*)aAlign); if (r>=0) aAddr=TUint32(r)<<4; return r<0?r:KErrNone; }
sl@0: 
sl@0: inline TInt RShadow::FreePhysicalRam(TUint32 aAddr, TInt aSize)
sl@0: 	{ return DoControl(EControlFreePhys, (TAny*)aAddr, (TAny*)aSize); }
sl@0: 
sl@0: inline TInt RShadow::ClaimPhysicalRam(TUint32 aAddr, TInt aSize)
sl@0: 	{ return DoControl(EControlClaimPhys, (TAny*)aAddr, (TAny*)aSize); }
sl@0: 	
sl@0: inline void RShadow::GetMemoryArchitecture(TCpu &aCpu, TUint &aCR)
sl@0: 	{ DoControl(EControlGetMemoryArchitecture, (TAny*) &aCpu, (TAny*) &aCR); }
sl@0: 
sl@0: inline TMemModel RShadow::GetMemModelInfo(TUint &aPageTable, TUint &aNumPds)
sl@0: 	{ return (TMemModel) DoControl(EControlGetMemModelInfo,(TAny*) &aPageTable, (TAny*) &aNumPds); }
sl@0: 
sl@0: inline TInt RShadow::GetPdInfo(TUint aPdNo, TUint &aPdSize, TUint &aPdBase, TUint &aOffset)
sl@0: 	{
sl@0: 	aPdSize=aPdNo;
sl@0: 	TUint ret= (TUint) DoControl(EControlGetPdInfo,(TAny*) &aPdSize, (TAny*) &aPdBase);
sl@0: 	aOffset =  ret & KPageOffsetMask;
sl@0: 	return (ret & KErrNoPageTable)?KErrNotFound:KErrNone;
sl@0: 	}
sl@0: 	
sl@0: #endif
sl@0: 
sl@0: #endif