sl@0: // Copyright (c) 1998-2009 Nokia Corporation and/or its subsidiary(-ies).
sl@0: // All rights reserved.
sl@0: // This component and the accompanying materials are made available
sl@0: // under the terms of the License "Eclipse Public License v1.0"
sl@0: // which accompanies this distribution, and is available
sl@0: // at the URL "http://www.eclipse.org/legal/epl-v10.html".
sl@0: //
sl@0: // Initial Contributors:
sl@0: // Nokia Corporation - initial contribution.
sl@0: //
sl@0: // Contributors:
sl@0: //
sl@0: // Description:
sl@0: // e32test\misc\t_cp0.cia
sl@0: // 
sl@0: //
sl@0: 
sl@0: #include <e32test.h>
sl@0: #include <cpudefs.h>
sl@0: #include "nk_cpu.h"
sl@0: 
sl@0: __NAKED__ TUint32 BCUCTL()
sl@0: 	{
sl@0: 	asm("mrc p13, 0, r0, c0, c1, 0 ");
sl@0: 	__JUMP(,lr);
sl@0: 	}
sl@0: 
sl@0: __NAKED__ void GetAcc0(TInt64&)
sl@0: 	{
sl@0: 	MRA(0,1,2);
sl@0: 	asm("stmia r0, {r1,r2} ");
sl@0: 	__JUMP(,lr);
sl@0: 	}
sl@0: 
sl@0: __NAKED__ void SetAcc0(const TInt64&)
sl@0: 	{
sl@0: 	asm("ldmia r0, {r1,r2} ");
sl@0: 	MAR(0,1,2);
sl@0: 	__JUMP(,lr);
sl@0: 	}
sl@0: 
sl@0: __NAKED__ void InnerProduct(TInt64& /*aResult*/, const TInt16* /*aVec1*/, const TInt16* /*aVec2*/, TInt /*aLength*/)
sl@0: //
sl@0: // Calculate the inner product of vectors using the DSP coprocessor
sl@0: //
sl@0: 	{
sl@0: 	asm("str lr, [sp, #-4]! ");
sl@0: 	asm("mov r12, #0 ");
sl@0: 	asm("mov r14, #0 ");
sl@0: 	MAR(0,12,14);
sl@0: 	asm("1: ");
sl@0: 	asm("ldrh r12, [r1], #2 ");
sl@0: 	asm("ldrh r14, [r2], #2 ");
sl@0: 	MIABB(0,12,14);
sl@0: 	asm("subs r3, r3, #1 ");
sl@0: 	asm("bne 1b ");
sl@0: 	MRA(0,12,14);
sl@0: 	asm("stmia r0, {r12,r14} ");
sl@0: 	asm("ldr pc, [sp], #4 ");
sl@0: 	}
sl@0: 
sl@0: __NAKED__ void InnerProduct2(TInt64& /*aResult*/, const TInt16* /*aVec1*/, const TInt16* /*aVec2*/, TInt /*aLength*/)
sl@0: //
sl@0: // Calculate the inner product of vectors using the normal multiply instructions
sl@0: //
sl@0: 	{
sl@0: 	asm("stmfd sp!, {r4-r5,lr} ");
sl@0: 	asm("mov r4, #0 ");
sl@0: 	asm("mov r5, #0 ");
sl@0: 	asm("1: ");
sl@0: 	asm("ldrsh r12, [r1], #2 ");
sl@0: 	asm("ldrsh r14, [r2], #2 ");
sl@0: 	asm("smlal r4, r5, r12, r14 ");
sl@0: 	asm("subs r3, r3, #1 ");
sl@0: 	asm("bne 1b ");
sl@0: 	asm("stmia r0, {r4,r5} ");
sl@0: 	asm("ldmfd sp!, {r4-r5,pc} ");
sl@0: 	}
sl@0: