sl@0: // Copyright (c) 1998-2009 Nokia Corporation and/or its subsidiary(-ies).
sl@0: // All rights reserved.
sl@0: // This component and the accompanying materials are made available
sl@0: // under the terms of the License "Eclipse Public License v1.0"
sl@0: // which accompanies this distribution, and is available
sl@0: // at the URL "http://www.eclipse.org/legal/epl-v10.html".
sl@0: //
sl@0: // Initial Contributors:
sl@0: // Nokia Corporation - initial contribution.
sl@0: //
sl@0: // Contributors:
sl@0: //
sl@0: // Description:
sl@0: // e32test\misc\strataflash32.cpp
sl@0: // 
sl@0: //
sl@0: 
sl@0: #include <e32def.h>
sl@0: #include <e32def_private.h>
sl@0: #include "flash.h"
sl@0: 
sl@0: #include <e32test.h>
sl@0: GLREF_C RTest test;
sl@0: 
sl@0: class StrataFlash32 : public Flash
sl@0: 	{
sl@0: public:
sl@0: 	virtual TInt Read(TUint32 anAddr, TUint32 aSize, TUint8* aDest);
sl@0: 	virtual TInt BlankCheck(TUint32 anAddr, TUint32 aSize);
sl@0: 	virtual TInt Erase(TUint32 anAddr, TUint32 aSize);
sl@0: 	virtual TInt Write(TUint32 anAddr, TUint32 aSize, const TUint8* aSrc);
sl@0: 	};
sl@0: 
sl@0: 
sl@0: Flash* Flash::New(TUint32 /*anAddr*/)
sl@0: 	{
sl@0: 	return new StrataFlash32;
sl@0: 	}
sl@0: 
sl@0: TInt StrataFlash32::Read(TUint32 anAddr, TUint32 aSize, TUint8* aDest)
sl@0: 	{
sl@0: 	Mem::Move(aDest,(const TUint32*)anAddr,aSize);
sl@0: 	return KErrNone;
sl@0: 	}
sl@0: 
sl@0: TInt StrataFlash32::BlankCheck(TUint32 anAddr, TUint32 aSize)
sl@0: 	{
sl@0: 	const TUint32* p=(const TUint32*)anAddr;
sl@0: 	const TUint32* pE=p+(aSize+3)/4;
sl@0: 	while(p<pE)
sl@0: 		{
sl@0: 		if (*p++!=0xffffffff)
sl@0: 			return (TUint32)p-anAddr;
sl@0: 		}
sl@0: 	return 0;
sl@0: 	}
sl@0: 
sl@0: TInt StrataFlash32::Erase(TUint32 anAddr, TUint32 aSize)
sl@0: 	{
sl@0: 	TUint32 base=anAddr&~0x3ffff;	// round base address down to block
sl@0: 	TUint32 end=anAddr+aSize;
sl@0: 	end=(end+0x3ffff)&~0x3ffff;	// round end address up to block
sl@0: 	TUint32 size=end-base;
sl@0: 	volatile TUint32* p=(volatile TUint32*)base;
sl@0: 	*p=0x00500050;	// clear status reg
sl@0: 	for (; size; size-=0x40000, p+=0x40000/4)
sl@0: 		{
sl@0: 		*p=0x00200020;	// block erase
sl@0: 		*p=0x00d000d0;	// block erase confirm
sl@0: 		while ((*p & 0x00800080)!=0x00800080) {}
sl@0: 		TUint32 s=*p;
sl@0: 		*p=0x00500050;	// clear status reg
sl@0: 		*p=0x00ff00ff;	// read mode
sl@0: 		if (s&0x00200020)
sl@0: 			{
sl@0: 			// error
sl@0: 			return (TUint32)p-anAddr+1;
sl@0: 			}
sl@0: 		}
sl@0: 	return 0;
sl@0: 	}
sl@0: 
sl@0: TInt StrataFlash32::Write(TUint32 anAddr, TUint32 aSize, const TUint8* aSrc)
sl@0: 	{
sl@0: 	volatile TUint32* p=(volatile TUint32*)anAddr;
sl@0: 	const TUint32* pS=(const TUint32*)aSrc;
sl@0: 	aSize=(aSize+63)&~63;
sl@0: /*
sl@0: 	const TUint32* pE=pS+aSize/4;
sl@0: 	for (; pS<pE; pS++, p++)
sl@0: 		{
sl@0: 		*p=0x00400040;	// word write
sl@0: 		*p=*pS;		// write data
sl@0: 		while ((*p & 0x00800080)!=0x00800080);
sl@0: 		TUint32 s=*p;
sl@0: 		*p=0x00500050;	// clear status reg
sl@0: 		*p=0x00ff00ff;	// read mode
sl@0: 		if (s&0x00100010)
sl@0: 			{
sl@0: 			// error
sl@0: 			return (TUint32)p-anAddr+1;
sl@0: 			}
sl@0: 		}
sl@0: */
sl@0: 
sl@0: 	TUint32 s=0;
sl@0: 	*p=0x00500050;	// clear status reg
sl@0: 	while(aSize)
sl@0: 		{
sl@0: 		TUint32 wb_offset=((TUint32)p)&0x3f;
sl@0: 		TUint32 max_count=(64-wb_offset)/4;
sl@0: 		TUint32 count=Min(aSize/4,max_count);
sl@0: 		TUint32 cwd=count-1;
sl@0: 		cwd|=(cwd<<16);
sl@0: 
sl@0: 		s=0;
sl@0: 		do	{
sl@0: 			*p=0x00e800e8;	// Write to Buffer
sl@0: 			*p=0x00700070;	// Read status register
sl@0: 			s=*p;
sl@0: 			} while ((s&0x00800080)!=0x00800080);
sl@0: 		s=*p;
sl@0: 		*p=cwd;
sl@0: 		TUint32 i;
sl@0: 		for (i=0; i<count; ++i)
sl@0: 			*p++=*pS++;
sl@0: 		*p=0x00d000d0;	// Write confirm
sl@0: 		aSize-=4*count;
sl@0: 		while ((*p & 0x00800080)!=0x00800080) {}	// Wait for write to complete
sl@0: 		s=*p;
sl@0: 		if (s&0x00300030)
sl@0: 			break;
sl@0: 		}
sl@0: 	*p=0x00500050;	// clear status reg
sl@0: 	*p=0x00ff00ff;	// read mode
sl@0: 	if (s&0x00300030)
sl@0: 		{
sl@0: 		// error
sl@0: 		return (TUint32)p-anAddr+1;
sl@0: 		}
sl@0: 
sl@0: 	return 0;
sl@0: 	}
sl@0: 
sl@0: