sl@0: // Copyright (c) 1996-2009 Nokia Corporation and/or its subsidiary(-ies).
sl@0: // All rights reserved.
sl@0: // This component and the accompanying materials are made available
sl@0: // under the terms of the License "Eclipse Public License v1.0"
sl@0: // which accompanies this distribution, and is available
sl@0: // at the URL "http://www.eclipse.org/legal/epl-v10.html".
sl@0: //
sl@0: // Initial Contributors:
sl@0: // Nokia Corporation - initial contribution.
sl@0: //
sl@0: // Contributors:
sl@0: //
sl@0: // Description:
sl@0: // e32\memmodel\epoc\direct\minit.cpp
sl@0: // 
sl@0: //
sl@0: 
sl@0: #include <memmodel.h>
sl@0: #include "cache_maintenance.h"
sl@0: 
sl@0: _LIT(KLitRamAlloc,"RamAlloc");
sl@0: 
sl@0: const TInt KMaxSupervisorStackSpace=0x200000;
sl@0: 
sl@0: void M::Init1()
sl@0: 	{
sl@0: 	__KTRACE_OPT2(KBOOT,KMMU,Kern::Printf("M::Init1"));
sl@0: 	MM::UserDataSectionBase=TheRomHeader().iUserDataAddress;
sl@0: 	MM::UserRomDataSectionEnd=TheRomHeader().iUserDataAddress+TheRomHeader().iTotalUserDataSize;
sl@0: 	MM::UserDataSectionEnd = TheSuperPage().iRamBase + TheSuperPage().iTotalRamSize;
sl@0: 
sl@0: 	__KTRACE_OPT2(KBOOT,KMMU,Kern::Printf("MM::UserDataSectionBase=%08x",MM::UserDataSectionBase));
sl@0: 	__KTRACE_OPT2(KBOOT,KMMU,Kern::Printf("MM::UserRomDataSectionEnd=%08x",MM::UserRomDataSectionEnd));
sl@0: 	__KTRACE_OPT2(KBOOT,KMMU,Kern::Printf("MM::UserDataSectionEnd=%08x",MM::UserDataSectionEnd));
sl@0: 
sl@0: 	// Memory model dependent CPU stuff
sl@0: 	MM::Init1();
sl@0: 
sl@0: 	// Set up cache info
sl@0: 	CacheMaintenance::Init1();
sl@0: 	}
sl@0: 
sl@0: void M::Init2()
sl@0: 	{
sl@0: 	__KTRACE_OPT2(KBOOT,KMMU,Kern::Printf("M::Init2"));
sl@0: 	TInt userRam=MM::UserDataSectionEnd-MM::UserDataSectionBase;
sl@0: 	TInt blocks=userRam>>MM::RamBlockShift;
sl@0: 	MM::RamAllocator=TBitMapAllocator::New(blocks,ETrue);
sl@0: 	if (!MM::RamAllocator)
sl@0: 		MM::Panic(MM::ERamAllocCreateFailed);
sl@0: 	TInt used_blocks=(MM::UserRomDataSectionEnd-MM::UserDataSectionBase)>>MM::RamBlockShift;
sl@0: 	if (used_blocks)
sl@0: 		MM::RamAllocator->Alloc(0,used_blocks);
sl@0: 	__KTRACE_OPT(KBOOT,Kern::Printf("%d blocks, %d used",blocks,used_blocks));
sl@0: 	TInt r=K::MutexCreate((DMutex*&)MM::RamAllocatorMutex, KLitRamAlloc, NULL, EFalse, KMutexOrdRamAlloc);
sl@0: 	if (r!=KErrNone)
sl@0: 		MM::Panic(MM::ERamAllocMutexCreateFailed);
sl@0: 	const SRamBank* banks = (const SRamBank*)TheSuperPage().iRamBootData;
sl@0: 	TInt nBanks = 0;
sl@0: 	TInt maxBankBlocks = 0;
sl@0: 	TInt bnum = 0;
sl@0: 	const SRamBank* pB = banks;
sl@0: 	for (; pB->iSize; ++nBanks, ++pB)
sl@0: 		{
sl@0: 		TInt nblocks = pB->iSize >> MM::RamBlockShift;
sl@0: 		TInt abnum = bnum &~ 31;
sl@0: 		TInt a_end = (bnum + nblocks + 31)&~31;
sl@0: 		TInt a_count = a_end - abnum;
sl@0: 		if (a_count > maxBankBlocks)
sl@0: 			maxBankBlocks = a_count;
sl@0: 		bnum += (pB->iSize >> MM::RamBlockShift);
sl@0: 		}
sl@0: 	__KTRACE_OPT(KBOOT,Kern::Printf("%d banks, max bank blocks %08x", nBanks, maxBankBlocks));
sl@0: 	if (nBanks>1)
sl@0: 		{
sl@0: 		MM::SecondaryAllocator = TBitMapAllocator::New(maxBankBlocks, ETrue);
sl@0: 		if (!MM::SecondaryAllocator)
sl@0: 			MM::Panic(MM::ESecAllocCreateFailed);
sl@0: 		}
sl@0: 	}
sl@0: 
sl@0: void M::Init3()
sl@0: 	{
sl@0: 	// Third phase MMU initialisation
sl@0: 	}
sl@0: 
sl@0: TInt M::InitSvHeapChunk(DChunk* aChunk, TInt aSize)
sl@0: 	{
sl@0: 	DMemModelChunk* pC=(DMemModelChunk*)aChunk;
sl@0: 	TLinAddr base = TheRomHeader().iKernDataAddress;
sl@0: 	K::HeapInfo.iChunk = aChunk;
sl@0: 	K::HeapInfo.iBase = (TUint8*)base;
sl@0: 	K::HeapInfo.iMaxSize = pC->MaxSize();
sl@0: 	pC->SetFixedAddress(base, aSize);
sl@0: 	__KTRACE_OPT(KBOOT,Kern::Printf("Created SvHeap chunk, addr %08X, init size %08X max size %08X",pC->Base(),aSize,pC->MaxSize()));
sl@0: 	return KErrNone;
sl@0: 	}
sl@0: 
sl@0: TInt M::InitSvStackChunk()
sl@0: 	{
sl@0: 	return KErrNone;
sl@0: 	}
sl@0: