sl@0: // Copyright (c) 1995-2009 Nokia Corporation and/or its subsidiary(-ies). sl@0: // All rights reserved. sl@0: // This component and the accompanying materials are made available sl@0: // under the terms of the License "Eclipse Public License v1.0" sl@0: // which accompanies this distribution, and is available sl@0: // at the URL "http://www.eclipse.org/legal/epl-v10.html". sl@0: // sl@0: // Initial Contributors: sl@0: // Nokia Corporation - initial contribution. sl@0: // sl@0: // Contributors: sl@0: // sl@0: // Description: sl@0: // e32\common\arm\cgcchelp.cia sl@0: // sl@0: // sl@0: sl@0: #include "../common.h" sl@0: #ifdef __KERNEL_MODE__ sl@0: #include "nkern.h" sl@0: #endif sl@0: sl@0: extern "C" { sl@0: #ifdef __GCC32__ sl@0: EXPORT_C __NAKED__ TInt __divsi3(TInt /*dividend*/,TInt /*divisor*/) sl@0: // sl@0: // Signed divide of r0 by r1: returns quotient in r0 sl@0: // Quotient is truncated (rounded towards zero). sl@0: // Destroys r2, r3 and ip sl@0: // Negates dividend and divisor, then does an unsigned divide; signs sl@0: // get sorted out again at the end. sl@0: // sl@0: // Have to calculate the sign of the result for the end of the calculation. sl@0: // Store this in the LSB of ip which also saves the old lr. sl@0: // sl@0: { sl@0: sl@0: asm("STMFD sp!, {lr} "); sl@0: asm("ANDS r3, r1, #0x80000000 "); // r3 bit 31=sign of divisor, rest of r3=0 sl@0: asm("RSBMI r1, r1, #0 "); // r1=ABS(divisor) sl@0: asm("EORS ip, r3, r0, ASR #32 "); // ip bit 31=sign of quotient, all other bits=carry=sign of dividend sl@0: asm("RSBCS r0, r0, #0 "); // r0=ABS(dividend) sl@0: asm(".EXTERN "); sl@0: asm("BL __umodsi3_start "); sl@0: asm("MOV r0, r3 "); sl@0: asm("CMP ip, #0 "); // test sign of quotient sl@0: asm("RSBMI r0, r0, #0 "); // negate if necessary sl@0: __POPRET(""); sl@0: } sl@0: sl@0: sl@0: EXPORT_C __NAKED__ TInt __modsi3(TInt /*dividend*/,TInt /*divisor*/) sl@0: // sl@0: // Signed divide of r0 by r1: returns remainder in r0 sl@0: // Sign of remainder = sign of dividend. sl@0: // Destroys r2, r3 and ip sl@0: // Negates dividend and divisor, then does an unsigned divide; signs sl@0: // get sorted out again at the end. sl@0: // sl@0: // Have to save sign of dividend in order to apply sign to remainder sl@0: // at the end of the calculation. Store this in the LSB of ip which also sl@0: // saves the old lr. sl@0: // sl@0: { sl@0: sl@0: asm("STMFD sp!, {lr} "); sl@0: asm("MOVS r1, r1 "); sl@0: asm("RSBMI r1, r1, #0 "); sl@0: asm("MOVS ip, r0 "); sl@0: asm("RSBMI r0, r0, #0 "); sl@0: asm(".EXTERN "); sl@0: asm("BL __umodsi3_start "); sl@0: asm("MOVS ip, ip "); sl@0: asm("RSBMI r0, r0, #0 "); sl@0: __POPRET(""); sl@0: } sl@0: sl@0: EXPORT_C __NAKED__ TUint __udivsi3(TUint /*dividend*/,TUint /*divisor*/) sl@0: // sl@0: // Unsigned divide of r0 by r1: returns quotient in r0 sl@0: // Quotient is truncated (rounded towards zero). sl@0: // Destroys r2, r3 and ip sl@0: // sl@0: { sl@0: sl@0: asm("MOV ip, lr "); sl@0: asm(".EXTERN "); sl@0: asm("BL __umodsi3_start "); sl@0: asm("MOV r0, r3 "); sl@0: __JUMP(,ip); sl@0: } sl@0: sl@0: sl@0: EXPORT_C __NAKED__ long long __divdi3(long long /*dividend*/, long long /*divisor*/) sl@0: // sl@0: // Dividend in r1:r0, divisor in r3:r2, Return quotient in r1:r0 sl@0: // sl@0: { sl@0: asm("stmfd sp!, {r4-r8,lr} "); sl@0: asm("eor r8, r1, r3 "); // sign of result into r8 sl@0: asm("movs r1, r1 "); sl@0: asm("bpl 1f "); sl@0: asm("rsbs r0, r0, #0 "); // ABS(dividend) sl@0: asm("rsc r1, r1, #0 "); sl@0: asm("1: "); sl@0: asm("movs r3, r3 "); sl@0: asm("bpl 2f "); sl@0: asm("rsbs r2, r2, #0 "); // ABS(divisor) sl@0: asm("rsc r3, r3, #0 "); sl@0: asm("2: "); sl@0: asm("bl UDiv01 "); // do the division, result in r4,r5 sl@0: asm("eors r0, r4, r8, asr #32 "); // quotient into r1:r0, inverted if quotient -ve sl@0: asm("eors r1, r5, r8, asr #32 "); sl@0: asm("adcs r0, r0, #0 "); // if quotient -ve, add 1 sl@0: asm("adcs r1, r1, #0 "); sl@0: __POPRET("r4-r8,"); sl@0: } sl@0: sl@0: EXPORT_C __NAKED__ long long __moddi3(long long /*dividend*/, long long /*divisor*/) /* signed */ sl@0: { sl@0: asm("stmfd sp!, {r4-r8,lr} "); sl@0: asm("movs r8, r1 "); // sign of remainder (=sign of dividend) into r8 sl@0: asm("bpl 1f "); sl@0: asm("rsbs r0, r0, #0 "); // ABS(dividend) sl@0: asm("rsc r1, r1, #0 "); sl@0: asm("1: "); sl@0: asm("movs r3, r3 "); sl@0: asm("bpl 2f "); sl@0: asm("rsbs r2, r2, #0 "); // ABS(divisor) sl@0: asm("rsc r3, r3, #0 "); sl@0: asm("2: "); sl@0: asm("bl UDiv01 "); // do the division, remainder in r3,r6 sl@0: asm("eors r0, r3, r8, asr #32 "); // remainder into r1:r0, inverted if dividend -ve sl@0: asm("eors r1, r6, r8, asr #32 "); sl@0: asm("adcs r0, r0, #0 "); // if dividend -ve, add 1 sl@0: asm("adcs r1, r1, #0 "); sl@0: __POPRET("r4-r8,"); sl@0: } sl@0: sl@0: EXPORT_C __NAKED__ long long __umoddi3(unsigned long long /*dividend*/, unsigned long long /*divisor*/) /* unsigned */ sl@0: { sl@0: asm("stmfd sp!, {r4-r7,lr} "); sl@0: asm("bl UDiv01 "); // do the division, remainder in r6:r3 sl@0: asm("mov r0, r3 "); sl@0: asm("mov r1, r6 "); sl@0: __POPRET("r4-r7,"); sl@0: } sl@0: sl@0: EXPORT_C __NAKED__ long long __ashrdi3(long long /*value*/, unsigned int /*count*/) sl@0: { sl@0: asm("cmp r2, #63 "); sl@0: asm("movhi r2, #63 "); // count>63 same as count=63 sl@0: asm("cmp r2, #32 "); sl@0: asm("bcs Asr01 "); // jump if shift count >=32 sl@0: asm("rsb r12, r2, #32 "); // r12=32-shift count sl@0: asm("mov r0, r0, lsr r2 "); // shift ls word right sl@0: asm("orr r0, r0, r1, lsl r12 "); // or in bits shifted out of ms word sl@0: asm("mov r1, r1, asr r2 "); // shift ms word right sl@0: __JUMP(,lr); sl@0: asm("Asr01: "); sl@0: asm("sub r2, r2, #32 "); // r2=shift count-32 sl@0: asm("mov r0, r1, asr r2 "); // ls word = ms word >> (count-32) sl@0: asm("mov r1, r1, asr #32 "); // ms word of result=sign extension of r1 sl@0: __JUMP(,lr); sl@0: } sl@0: sl@0: EXPORT_C __NAKED__ long long __ashldi3(long long /*value*/, unsigned int /*count*/) sl@0: { sl@0: asm("cmp r2, #63 "); sl@0: asm("movhi r2, #64 "); // count>63 same as count=64 sl@0: asm("cmp r2, #32 "); sl@0: asm("bcs Asl01 "); // jump if shift count >=32 sl@0: asm("rsb r12, r2, #32 "); // r12=32-shift count sl@0: asm("mov r1, r1, asl r2 "); // shift ms word left sl@0: asm("orr r1, r1, r0, lsr r12 "); // or in bits shifted out of ls word sl@0: asm("mov r0, r0, asl r2 "); // shift ls word left sl@0: __JUMP(,lr); sl@0: asm("Asl01: "); sl@0: asm("sub r2, r2, #32 "); // r2=shift count-32 sl@0: asm("mov r1, r0, asl r2 "); // result ms word = ls word << (count-32) sl@0: asm("mov r0, #0 "); // ls word of result is zero sl@0: __JUMP(,lr); sl@0: } sl@0: sl@0: EXPORT_C __NAKED__ unsigned long long __lshrdi3(unsigned long long /*value*/, unsigned int /*count*/) sl@0: { sl@0: asm("cmp r2, #63 "); sl@0: asm("movhi r2, #64 "); // count>63 same as count=64 sl@0: asm("cmp r2, #32 "); sl@0: asm("bcs Lsr01 "); // jump if shift count >=32 sl@0: asm("rsb r12, r2, #32 "); // r12=32-shift count sl@0: asm("mov r0, r0, lsr r2 "); // shift ls word right sl@0: asm("orr r0, r0, r1, lsl r12 "); // or in bits shifted out of ms word sl@0: asm("mov r1, r1, lsr r2 "); // shift ms word right sl@0: __JUMP(,lr); sl@0: asm("Lsr01: "); sl@0: asm("sub r2, r2, #32 "); // r2=shift count-32 sl@0: asm("mov r0, r1, lsr r2 "); // ls word = ms word >> (count-32) sl@0: asm("mov r1, #0 "); // ms word of result = 0 sl@0: __JUMP(,lr); sl@0: } sl@0: sl@0: EXPORT_C __NAKED__ long long __muldi3(long long /*multiplicand*/, long long /*multiplier*/) sl@0: { sl@0: asm("mul r1, r2, r1 "); // r1=low2*high1 sl@0: asm("mov ip, r0 "); // ip=low1 sl@0: asm("mla r1, r0, r3, r1 "); // r1+=low1*high2 sl@0: asm("mov r0, #0 "); sl@0: asm("umlal r0, r1, r2, ip "); // r1:r0 += high1*low1 sl@0: __JUMP(,lr); sl@0: } sl@0: sl@0: EXPORT_C __NAKED__ long long __negdi2(long long /*argument*/) sl@0: { sl@0: asm("rsbs r0, r0, #0 "); // r0=0-r0, set carry sl@0: asm("rscs r1, r1, #0 "); // r1=0-r1-(1-C) sl@0: __JUMP(,lr); sl@0: } sl@0: sl@0: EXPORT_C __NAKED__ unsigned long long __udivmoddi4 (unsigned long long /*dividend*/, sl@0: unsigned long long /*divisor*/, sl@0: unsigned long long* /*p_remainder*/) sl@0: { sl@0: asm("stmfd sp!, {r4-r7,lr} "); sl@0: asm("bl UDiv01 "); // do the division, quotient in r5:r4 remainder in r6:r3 sl@0: asm("ldr r7, [sp, #20] "); // r7=p_remainder sl@0: asm("mov r0, r4 "); // r0=quotient low sl@0: asm("stmia r7, {r3,r6} "); // store remainder sl@0: asm("mov r1, r5 "); // r0=quotient high sl@0: __POPRET("r4-r7,"); sl@0: } sl@0: sl@0: EXPORT_C __NAKED__ int __cmpdi2(long long /*a*/, long long /*b*/) sl@0: { sl@0: // return 0 if ab sl@0: asm("subs r0, r2, r0 "); sl@0: asm("sbcs r1, r3, r1 "); // r1:r0 = b-a, set flags sl@0: asm("movlt r0, #2 "); // if bb sl@0: asm("cmp r1, r3 "); sl@0: asm("cmpeq r0, r2 "); // compare r1:r0 - r3:r2 sl@0: asm("movhi r0, #2 "); // r0=2 if a>b sl@0: asm("moveq r0, #1 "); // r0=1 if a=b sl@0: asm("movlo r0, #0 "); // r0=0 if a= 2^32, so quotient < 2^32 sl@0: // Use 64 bit accumulator, 32 bit quotient sl@0: asm("udiv64a: "); sl@0: asm("mov r4, #0 "); // quotient in r4, use r1, r6 as accumulator sl@0: asm("mov r6, #0 "); sl@0: asm("mov r5, #8 "); // do 32 iterations sl@0: asm("udiv64d: "); sl@0: asm("adds r0, r0, r0 "); // shift dividend left into acc sl@0: asm("adcs r1, r1, r1 "); sl@0: asm("adcs r6, r6, r6 "); sl@0: asm("subs r7, r1, r2 "); // subtract divisor from acc, result into r7,r12 sl@0: asm("sbcs r12, r6, r3 "); sl@0: asm("adc r4, r4, r4 "); // shift result bit left into quotient sl@0: asm("movcs r1, r7 "); // if no borrow, update acc sl@0: asm("movcs r6, r12 "); sl@0: asm("adds r0, r0, r0 "); // shift dividend left into acc sl@0: asm("adcs r1, r1, r1 "); sl@0: asm("adcs r6, r6, r6 "); sl@0: asm("subs r7, r1, r2 "); // subtract divisor from acc, result into r7,r12 sl@0: asm("sbcs r12, r6, r3 "); sl@0: asm("adc r4, r4, r4 "); // shift result bit left into quotient sl@0: asm("movcs r1, r7 "); // if no borrow, update acc sl@0: asm("movcs r6, r12 "); sl@0: asm("adds r0, r0, r0 "); // shift dividend left into acc sl@0: asm("adcs r1, r1, r1 "); sl@0: asm("adcs r6, r6, r6 "); sl@0: asm("subs r7, r1, r2 "); // subtract divisor from acc, result into r7,r12 sl@0: asm("sbcs r12, r6, r3 "); sl@0: asm("adc r4, r4, r4 "); // shift result bit left into quotient sl@0: asm("movcs r1, r7 "); // if no borrow, update acc sl@0: asm("movcs r6, r12 "); sl@0: asm("adds r0, r0, r0 "); // shift dividend left into acc sl@0: asm("adcs r1, r1, r1 "); sl@0: asm("adcs r6, r6, r6 "); sl@0: asm("subs r7, r1, r2 "); // subtract divisor from acc, result into r7,r12 sl@0: asm("sbcs r12, r6, r3 "); sl@0: asm("adc r4, r4, r4 "); // shift result bit left into quotient sl@0: asm("movcs r1, r7 "); // if no borrow, update acc sl@0: asm("movcs r6, r12 "); sl@0: asm("subs r5, r5, #1 "); // loop sl@0: asm("bne udiv64d "); sl@0: asm("mov r3, r1 "); // remainder in r3,r6 sl@0: __JUMP(,lr); sl@0: sl@0: asm("udiv64_divby0: "); sl@0: asm("stmfd sp!, {r11,lr} "); sl@0: __EH_FRAME_PUSH2(r11,lr) sl@0: asm("mov r11, sp "); sl@0: asm("bic sp, sp, #4 "); sl@0: asm("bl " DIV_BY_ZERO); sl@0: asm("mov sp, r11 "); sl@0: __POPRET("r11,"); sl@0: } sl@0: sl@0: } sl@0: