sl@0: // Copyright (c) 1998-2009 Nokia Corporation and/or its subsidiary(-ies).
sl@0: // All rights reserved.
sl@0: // This component and the accompanying materials are made available
sl@0: // under the terms of the License "Eclipse Public License v1.0"
sl@0: // which accompanies this distribution, and is available
sl@0: // at the URL "http://www.eclipse.org/legal/epl-v10.html".
sl@0: //
sl@0: // Initial Contributors:
sl@0: // Nokia Corporation - initial contribution.
sl@0: //
sl@0: // Contributors:
sl@0: //
sl@0: // Description:
sl@0: //
sl@0: 
sl@0: #ifndef __FLASH_NOR_H__
sl@0: #define __FLASH_NOR_H__
sl@0: 
sl@0: // If Flash parameters are not already defined, set them to Tyax values.
sl@0: #ifndef FLASHERASEBLOCKSIZE
sl@0: #define FLASHERASEBLOCKSIZE 0x20000 //128KB
sl@0: #endif
sl@0: #ifndef FLASHWRITEBUFSIZE
sl@0: #define FLASHWRITEBUFSIZE 0x40 //64 bytes
sl@0: #endif
sl@0: 
sl@0: ///////////////////////////////////////////////////////////////////////////////
sl@0: //
sl@0: // CFI - flash identification
sl@0: //
sl@0: ///////////////////////////////////////////////////////////////////////////////
sl@0: enum CfiManifacturerId
sl@0: 	{
sl@0: 	CFI_MANUF_SPANSION = 0x01,
sl@0: 	CFI_MANUF_INTEL    = 0x89,
sl@0: 	CFI_MANUF_ANY      = (TUint16) -1, // some manufacturers' flash chips comform to one standard CFI command set
sl@0: 	};
sl@0: 
sl@0: enum CfiDeviceId
sl@0: 	{
sl@0: 	CFI_DEV_S29GL512N  = 0x227e,
sl@0: 	CFI_DEV_SIBLEY     = 0x88b1,          // Intel Sibley as found on 3430 SDP (H6)
sl@0: 	CFI_DEV_28F256L18T = 0x880d,          // Intel Tyax as found on my H4
sl@0: 	CFI_DEV_ANY        = (TUint16) -1,    // some manufacturers' flash chips comform to one standard CFI command set
sl@0: 	};
sl@0: 
sl@0: typedef struct
sl@0: 	{
sl@0: 	TPtrC   name;
sl@0: 	TUint16	manufacturerId;
sl@0: 	TUint16 deviceId;
sl@0: 
sl@0: 	TInt (*reset)(TUint32 flashId, TUint32 address);
sl@0: 	TInt (*erase)(TUint32 flashId, TUint32 aBase,  TUint32 anAddr, TUint32 aSize);
sl@0: 	TInt (*write)(TUint32 flashId, TUint32 anAddr, TUint32 aSize,  const TUint32* aPS);
sl@0: 
sl@0: 	TUint   blockSize;  // the physical block size of the flash
sl@0: 	}
sl@0: TFlashInfo;
sl@0: 
sl@0: const TUint	FLASH_TYPE_UNKNOWN        = 0;
sl@0: 
sl@0: ///////////////////////////////////////////////////////////////////////////////
sl@0: //
sl@0: // CFI - generic command processing
sl@0: //
sl@0: ///////////////////////////////////////////////////////////////////////////////
sl@0: typedef struct
sl@0: 	{
sl@0: 	TUint32 location; // where to write this command to
sl@0: 	TUint32	offset;   // the offset for this command
sl@0: 	TUint32 command;  // the command itself
sl@0: 	}
sl@0: TCfiCommands;
sl@0: 
sl@0: enum
sl@0: 	{
sl@0: 	CFI_BASE8,   // use the base   address for this 8 bit command
sl@0: 	CFI_SECTOR8, // use the sector address for this 8 bit command
sl@0: 
sl@0: 	CFI_END = (TUint32) -1 // used to mark the end of the command sequence
sl@0: 	};
sl@0: 
sl@0: 
sl@0: 
sl@0: const TUint32 KFlashEraseBlockSize = FLASHERASEBLOCKSIZE;
sl@0: const TUint32 KFlashWriteBufSize   = FLASHWRITEBUFSIZE;
sl@0: const TUint32 KRebootDelaySecs     = 5; // Delay(S) between flashing bootldr to reboot
sl@0: 
sl@0: // Flash commands
sl@0: //const TUint8	KCmdWordProgram        = 0x40 ;
sl@0: const TUint8	KCmdBlockErase1        = 0x20 ;
sl@0: const TUint8	KCmdBlockErase2        = 0xd0 ;
sl@0: //const TUint8	KCmdEraseSuspend       = 0xb0 ;
sl@0: //const TUint8	KCmdEraseResume        = 0xd0 ;
sl@0: const TUint8	KCmdReadStatus         = 0x70 ; 
sl@0: const TUint8	KCmdClearStatus        = 0x50 ;
sl@0: const TUint8	KCmdReadArrayMode      = 0xFF ; 
sl@0: const TUint8	KCmdClearBlockLockBit1 = 0x60 ;
sl@0: const TUint8	KCmdClearBlockLockBit2 = 0xD0 ;
sl@0: //const TUint8  KCmdSetBlockLockBit1   = 0x60 ;
sl@0: //const TUint8	KCmdSetBlockLockBit2   = 0x01 ;
sl@0: 
sl@0: // Flash status
sl@0: const TUint8	KStatusBusy            = 0x80 ;
sl@0: //const TUint8	KStatusProgramError    = 0x38 ;
sl@0: //const TUint8	KStatusVoltageError    = 0x08 ;
sl@0: const TUint8	KStatusCmdSeqError     = 0x30 ;
sl@0: const TUint8	KStatusLockBitError    = 0x20 ;
sl@0: 
sl@0: const TUint8    KCmdWriteStatusSibley  = 0xE9; // Sibley write
sl@0: const TUint8    KCmdWriteStatus        = 0xE8; // send Tyax write
sl@0: 
sl@0: GLREF_C TUint32 * GetFlashChunk(void);
sl@0: GLREF_C TBool     BlankCheck   (TUint32 anAddr, TUint32 aSize);
sl@0: GLREF_C TInt      Erase        (TUint32 anAddr, TUint32 aSize);
sl@0: GLREF_C TInt      Write        (TUint32 anAddr, TUint32 aSize, const TUint32* aPS);
sl@0: 
sl@0: #endif