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1 // Copyright (c) 1997-2009 Nokia Corporation and/or its subsidiary(-ies).
2 // All rights reserved.
3 // This component and the accompanying materials are made available
4 // under the terms of the License "Eclipse Public License v1.0"
5 // which accompanies this distribution, and is available
6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".
8 // Initial Contributors:
9 // Nokia Corporation - initial contribution.
14 // template\template_assp\template_assp.h
15 // Definitions for Template ASSP
17 // WARNING: This file contains some APIs which are internal and are subject
18 // to change without notice. Such APIs should therefore not be used
19 // outside the Kernel and Hardware Services package.
22 #ifndef __A32TEMPLATEV1_H__
23 #define __A32TEMPLATEV1_H__
28 #include <kernel/kern_priv.h>
30 //----------------------------------------------------------------------------
31 // Constant conventions:
32 //----------------------------------------------------------------------------
34 // KH Hardware definition
35 // KHw 4-byte word definition prefix
36 // KHb Byte definition prefix
37 // KHt Bit definition prefix
38 // KHm Mask definition prefix
39 // KHs Shift definition prefix
40 // KHo Offset definition prefix
41 // KHwRo Read-only register
42 // KHwWo Write-only register
43 // KHwRw Read/write register
44 // KHwBase Base address within memory map
47 // _b Input/output suffix
49 //----------------------------------------------------------------------------
50 // Memory map: physical addresses
51 //----------------------------------------------------------------------------
52 // NB: these are just examples
54 const TUint KHwBaseCs0 = 0x00000000;
55 const TUint KHwBaseCs1 = KHwBaseCs0 + 128*KMega;
56 const TUint KHwBaseCs2 = KHwBaseCs1 + 128*KMega;
57 const TUint KHwBaseCs3 = KHwBaseCs2 + 128*KMega;
59 const TUint KHwBaseMemBank0 = 0x20000000;
60 const TUint KHwBaseMemBank1 = KHwBaseMemBank0 + 256*KMega;
62 const TUint KHwBaseRegisters = 0x80000000;
63 const TUint KHwBasePeripherals = KHwBaseRegisters; // 8000.0000
64 const TUint KHwBasePeripheralsA = KHwBasePeripherals + 256*KMega; // 9000.0000
65 const TUint KHwBasePeripheralsB = KHwBasePeripheralsA + 256*KMega; // A000.0000
66 const TUint KHwBasePeripheralsC = KHwBasePeripheralsB + 256*KMega; // B000.0000
70 //----------------------------------------------------------------------------
71 // Memory map: linear addresses
72 //----------------------------------------------------------------------------
74 #if defined (__MEMMODEL_MULTIPLE__)
75 const TUint KHwLinBaseRegisters = 0xc6000000; // as mapped by bootstrap
76 const TUint KHwLinSeparation = 0x1000;
77 #elif defined(__MEMMODEL_DIRECT__)
78 const TUint KHwLinBaseRegisters = 0x10000000; // physical address (example only)
79 const TUint KHwLinSeparation = 0x01000000; // physical offsets (example only)
81 const TUint KHwLinBaseRegisters = 0x63000000; // as mapped by bootstrap
82 const TUint KHwLinSeparation = 0x1000;
86 const TUint KHwLinBasePeriphGroupA = KHwLinBaseRegisters;
87 const TUint KHwLinBasePeripheral1 = KHwLinBasePeriphGroupA + 0x00*KHwLinSeparation;
88 const TUint KHwLinBasePeripheral2 = KHwLinBasePeriphGroupA + 0x01*KHwLinSeparation;
89 const TUint KHwLinBasePeripheral3 = KHwLinBasePeriphGroupA + 0x02*KHwLinSeparation;
90 const TUint KHwLinBasePeripheral4 = KHwLinBasePeriphGroupA + 0x03*KHwLinSeparation;
92 const TUint KHwLinBasePeriphGroupB = KHwLinBaseRegisters + 0x20*KHwLinSeparation;
94 const TUint KHwBaseSerial1 = KHwLinBasePeriphGroupB + 0x00*KHwLinSeparation;
95 const TUint KHwBaseSerial2 = KHwLinBasePeriphGroupB + 0x01*KHwLinSeparation;
96 const TUint KHwBaseSerial3 = KHwLinBasePeriphGroupB + 0x02*KHwLinSeparation;
98 const TUint KHwLinBasePeriphGroupC = KHwLinBaseRegisters + 0x30*KHwLinSeparation;
100 const TUint KHwBaseInterrupts = KHwLinBasePeriphGroupC + 0x00*KHwLinSeparation;
101 const TUint KHwInterruptsMaskRo = KHwBaseInterrupts + 0x00;
102 const TUint KHwInterruptsMaskSet = KHwBaseInterrupts + 0x04;
103 const TUint KHwInterruptsMaskClear = KHwBaseInterrupts + 0x08;
104 const TUint KHoInterruptsIrqPending = 0x0C;
105 const TUint KHwInterruptsIrqPending = KHwBaseInterrupts + KHoInterruptsIrqPending;
106 const TUint KHoInterruptsFiqPending = 0x10;
107 const TUint KHwInterruptsFiqending = KHwBaseInterrupts + KHoInterruptsFiqPending;
110 // Other device specifc constants, register offsets, bit masks, general-purpose I/O allocations,
111 // interrupt sources, Memory settings and geometries, etc
117 * Accessor functions to hardware resources managed by ASSP (ASIC). Auxiliary and information functions which
118 * are commonly used by Device Drivers or ASSP/Variant code.
119 * Some examples below. These examples assume that the hardware blocks they access (e.g. Interrupt controller
120 * RTC, Clock Control Module, UART, etc) are part of the ASSP.
128 * Active waiting loop (not to be used after System Tick timer has been set up - Init3()
129 * @param aDuration A wait time in milliseconds
131 IMPORT_C static void BootWaitMilliSeconds(TInt aDuration);
133 * Read and return the Startup reason of the Hardware
134 * @return A TMachineStartupType enumerated value
136 IMPORT_C static TMachineStartupType StartupReason();
138 * Read and return the the CPU ID
139 * @return An integer containing the CPU ID string read off the hardware
141 IMPORT_C static TInt CpuVersionId();
143 * Read Linear base address of debug UART (as selected in obey file or with eshell debugport command).
144 * @return An integer containing the Linear address of debug Serial Port
146 IMPORT_C static TUint DebugPortAddr();
148 * Read CPU clock period in picoseconds
149 * @return An integer containing the CPU clock period in picoseconds
151 IMPORT_C static TUint ProcessorPeriodInPs();
153 * Set the Hardware Interrupt masks
154 * @param aValue A new interrupt mask value
156 IMPORT_C static void SetIntMask(TUint aValue);
158 * Modify the Hardware Interrupt masks
159 * @param aClearMask A mask with interrupt source bits to clear (disable)
160 * @param aSetMask A mask with interrupt source bits to set (enable)
162 IMPORT_C static void ModifyIntMask(TUint aClearMask,TUint aSetMask);
164 * Read the state of pending interrupts
165 * @return A mask containing bits set for all pending interrupts
167 IMPORT_C static TUint IntsPending();
169 * Read the current time of the RTC
170 * @return A value that is the real time as given by a RTC
172 IMPORT_C static TUint RtcData();
175 * @param aValue The real time to set the RTC
177 IMPORT_C static void SetRtcData(TUint aValue);
179 * Obtain the physical start address of Video Buffer
180 * @return the physical start address of Video Buffer
182 IMPORT_C static TPhysAddr VideoRamPhys();
185 * Assp-specific implementation for Kern::NanoWait function
187 static void NanoWait(TUint32 aInterval);
192 // Enumerate here all ASSP interrupt souces. It could be a good idea to enumerate them in a way that facilitates
193 // operating on the corresponding interrupt controller registers (e.g using their value as a shift count)
196 enum TTemplateAsspInterruptId
198 // ASSP or first-level Interrupt IDs
214 // Define here some commonly used ASSP interrupts
217 const TInt KIntIdExpansion=EAsspIntIdA; // this is the ASSP interrupt which connects to second-level (Variant)
218 // Interrupt controller: all 2nd level interrupts come through this interrupt
219 const TInt KIntIdOstMatchMsTimer=EAsspIntIdB;
220 const TInt KIntIdDigitiser=EAsspIntIdC;
221 const TInt KIntIdSound=EAsspIntIdD;
222 const TInt KIntIdTimer1=EAsspIntIdE;