1 // Copyright (c) 1994-2009 Nokia Corporation and/or its subsidiary(-ies).
2 // All rights reserved.
3 // This component and the accompanying materials are made available
4 // under the terms of the License "Eclipse Public License v1.0"
5 // which accompanies this distribution, and is available
6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".
8 // Initial Contributors:
9 // Nokia Corporation - initial contribution.
14 // naviengine_assp\assp.cpp
21 TSpinLock AsspLock(TSpinLock::EOrderGenericIrqLow1);
24 ///////////////////////////////////////////////////////////////////////////////
26 // MHA - Modular Hardware Adaption
30 ///////////////////////////////////////////////////////////////////////////////
33 ///////////////////////////////////////////////////////////////////////////////
34 // We need spin locks around read, modify, write operations because another CPU
35 // may access the same memory in between operations and potentially cause
37 ///////////////////////////////////////////////////////////////////////////////
38 EXPORT_C void AsspRegister::Modify8(TLinAddr aAddr, TUint8 aClearMask, TUint8 aSetMask)
40 TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
41 TUint8 value = *(volatile TUint8 *)aAddr;
44 *(volatile TUint8 *)aAddr = value;
45 __SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
48 EXPORT_C void AsspRegister::Modify16(TLinAddr aAddr, TUint16 aClearMask, TUint16 aSetMask)
50 TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
51 TUint16 value = *(volatile TUint16 *)aAddr;
54 *(volatile TUint16 *)aAddr = value;
55 __SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
58 EXPORT_C void AsspRegister::Modify32(TLinAddr aAddr, TUint32 aClearMask, TUint32 aSetMask)
60 TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
61 TUint32 value = *(volatile TUint32 *)aAddr;
64 *(volatile TUint32 *)aAddr = value;
65 __SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
68 ///////////////////////////////////////////////////////////////////////////////
69 // 64 bit operations may be more complex than 8/16/32 bit operations, depending
70 // upon hardware support for 64 bit accesses.
72 // For example, one platform required an assembly language function to prevent
73 // the compliler optimising the accesses into 2 x 32 bit accesses and causing a
76 // Spinlocks are required for non-atomic operations and are therefore
77 // recommended for 64 bit accesses on current platforms.
78 ///////////////////////////////////////////////////////////////////////////////
79 extern TUint64 DoRead64(TLinAddr aAddr);
81 EXPORT_C TUint64 AsspRegister::Read64(TLinAddr aAddr)
83 TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
84 TUint64 value = DoRead64(aAddr);
85 __SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
89 extern void DoWrite64(TLinAddr aAddr, TUint64 aValue);
91 EXPORT_C void AsspRegister::Write64(TLinAddr aAddr, TUint64 aValue)
93 TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
94 DoWrite64(aAddr, aValue);
95 __SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
98 EXPORT_C void AsspRegister::Modify64(TLinAddr aAddr, TUint64 aClearMask, TUint64 aSetMask)
100 TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
101 TUint64 value = DoRead64(aAddr);
102 value &= ~aClearMask;
104 DoWrite64(aAddr, value);
105 __SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);