Update contrib.
1 // Copyright (c) 1999-2009 Nokia Corporation and/or its subsidiary(-ies).
2 // All rights reserved.
3 // This component and the accompanying materials are made available
4 // under the terms of the License "Eclipse Public License v1.0"
5 // which accompanies this distribution, and is available
6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".
8 // Initial Contributors:
9 // Nokia Corporation - initial contribution.
14 // e32utils\profiler\sampler.cia
21 #include <kernel/kern_priv.h> //temporary
24 #if defined(__GCC32__)
25 // CIA symbol macros for Gcc98r2
26 #define CSM__ZN5NKern14CurrentContextEv " CurrentContext__5NKern"
27 #elif defined(__ARMCC__)
28 // CIA symbol macros for RVCT
29 #define CSM__ZN5NKern14CurrentContextEv " __cpp(NKern::CurrentContext)"
31 // CIA symbol macros for EABI assemblers
32 #define CSM__ZN5NKern14CurrentContextEv " _ZN5NKern14CurrentContextEv"
36 __NAKED__ TUint IntStackPtr()
39 asm("bic r3, r1, #0x1f ");
41 // asm("orr r3, r3, #0xd1 "); // mode_fiq, all interrupts off
43 asm("orr r3, r3, #0xd2 "); // mode_irq, all interrupts off
46 asm("mov r0, sp "); // r0=sp_irq or sp_fiq
47 asm("msr cpsr, r1 "); // restore interrupts
51 __NAKED__ TUint32 SPSR()
58 // This will return 1 if it was iDFC interrupted (0 otherwise).
59 // As there is no Kernel interface for that, we have to 'fake' Kernel by
60 // setting SVC mode before calling NKern::CurrentContext.
61 // Without that, CurrentContext would always return EInterrupt.
62 __NAKED__ TUint IDFCRunning()
64 asm("stmfd sp!, {r4-r5} ");
66 asm("mrs r5, cpsr"); // r5 = cpsr_irq
67 asm("bic r4, r5, #0xdf "); // clear interrupt mask & CPU mode
68 asm("orr r4, r4, #0xd3 "); // disable all interrupts and set SVC mode
70 asm("msr CPSR_cf, r4"); // switch to SVC, (dissable FIQ, IRQ)
72 // NKern::CurrentContext does not use sp (only r0,r1,r2)
73 // It is just lr in svc mode we need to preserve.
74 asm("mov r4, lr"); // r4 = lr_svc
75 asm("bl " CSM__ZN5NKern14CurrentContextEv ); // r0 = 1 if iDFC was running, 0 if a thread was running
76 asm("mov lr, r4"); // lr_svc is back to original state
78 asm("msr CPSR_cf, r5"); // return to IRQ mode
80 asm("ldmfd sp!, {r4-r5} ");