os/kernelhwsrv/kernel/eka/memmodel/epoc/flexible/mmu/x86/xmmu.cia
author sl
Tue, 10 Jun 2014 14:32:02 +0200 (2014-06-10)
changeset 1 260cb5ec6c19
permissions -rw-r--r--
Update contrib.
     1 // Copyright (c) 2007-2009 Nokia Corporation and/or its subsidiary(-ies).
     2 // All rights reserved.
     3 // This component and the accompanying materials are made available
     4 // under the terms of the License "Eclipse Public License v1.0"
     5 // which accompanies this distribution, and is available
     6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".
     7 //
     8 // Initial Contributors:
     9 // Nokia Corporation - initial contribution.
    10 //
    11 // Contributors:
    12 //
    13 // Description:
    14 //
    15 
    16 #include <x86_mem.h>
    17 
    18 #if defined(KMMU)
    19 extern "C" void __DebugMsgFlushTLB();
    20 extern "C" void __DebugMsgLocalFlushTLB();
    21 extern "C" void __DebugMsgTotalFlushTLB();
    22 extern "C" void __DebugMsgINVLPG(int a);
    23 #endif
    24 
    25 
    26 __NAKED__ void __fastcall DoInvalidateTLBForPage(TLinAddr /*aLinAddr*/)
    27 //
    28 // Flush a specified virtual address from the TLB.
    29 //
    30 	{
    31 	ASM_DEBUG1(INVLPG,ecx)
    32 	asm("invlpg [ecx]");
    33 	asm("ret");
    34 	}
    35 
    36 // On 486 and Pentium this invalidates all TLB entries.
    37 // On P6 and later CPUs it only invalidates non-global TLB entries.
    38 __NAKED__ void DoLocalInvalidateTLB()
    39 	{
    40 	ASM_DEBUG0(LocalFlushTLB)
    41 	asm("mov eax, cr3");
    42 	asm("mov cr3, eax");
    43 	asm("ret");
    44 	}
    45 
    46 // Invalidate all TLB entries regardless of CPU type.
    47 __NAKED__ void DoInvalidateTLB()
    48 	{
    49 	ASM_DEBUG0(FlushTLB)
    50 	asm("mov edx, [%a0]": : "i"(&X86_UseGlobalPTEs));
    51 	asm("mov eax, cr3");
    52 	asm("cmp edx, 0");
    53 	asm("jz no_global_pages");
    54 	MOV_ECX_CR4;
    55 	asm("mov edx, ecx");
    56 	asm("and dl, 0x7f");
    57 	asm("pushfd");
    58 	asm("cli");
    59 	MOV_CR4_EDX;
    60 	asm("mov cr3, eax");
    61 	MOV_CR4_ECX;
    62 	asm("popfd");
    63 	asm("ret");
    64 	asm("no_global_pages:");
    65 	asm("mov cr3, eax");
    66 	asm("ret");
    67 	}
    68 
    69 __NAKED__ void __fastcall UserWriteFault(TLinAddr /*aAddr*/)
    70 	{
    71 	// must use ES for writes because IpcExcHandler expects this...
    72 	asm("push es");
    73 	asm("mov eax, %0" : : "i"(RING3_DS));
    74 	asm("mov es, ax");
    75 	asm("mov es:[ecx], ecx");
    76 	asm("pop es");
    77 	asm("ret");
    78 	}
    79 
    80 __NAKED__ void __fastcall UserReadFault(TLinAddr /*aAddr*/)
    81 	{	
    82 	// must use DS for reads because IpcExcHandler expects this...
    83 	asm("push ds");
    84 	asm("mov eax, %0" : : "i"(RING3_DS));
    85 	asm("mov ds, ax");
    86 	asm("mov eax, [ecx]");
    87 	asm("pop ds");
    88 	asm("ret");
    89 	}
    90 
    91 #ifdef __SMP__
    92 extern "C" __NAKED__ void __e32_instruction_barrier()
    93 	{
    94 	asm("push ebx ");
    95 	asm("cpuid ");		// fully serializing instruction
    96 	asm("pop ebx ");
    97 	asm("ret ");
    98 	}
    99 #endif
   100