os/kernelhwsrv/bsptemplate/asspandvariant/template_variant/specific/variant.cia
author sl
Tue, 10 Jun 2014 14:32:02 +0200
changeset 1 260cb5ec6c19
permissions -rw-r--r--
Update contrib.
     1 // Copyright (c) 1994-2009 Nokia Corporation and/or its subsidiary(-ies).
     2 // All rights reserved.
     3 // This component and the accompanying materials are made available
     4 // under the terms of the License "Eclipse Public License v1.0"
     5 // which accompanies this distribution, and is available
     6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".
     7 //
     8 // Initial Contributors:
     9 // Nokia Corporation - initial contribution.
    10 //
    11 // Contributors:
    12 //
    13 // Description:
    14 // template\template_variant\specific\variant.cia
    15 // 
    16 //
    17 
    18 #include <e32cia.h>
    19 #include "variant.h"
    20 #include "mconf.h"
    21 
    22 /******************************************************************************
    23  * Interrupt handling/dispatch
    24  ******************************************************************************/
    25 __NAKED__ void XIntDispatch(TAny*)
    26 	{
    27 	// Service second-level Variant Interrupts
    28 	// Enter with r0->{Variant int controller base; Handlers;}
    29 	asm("stmfd sp!, {r4,lr} ");
    30 	asm("ldmia r0, {r3,r4} ");										// r3=Variant interrupt controller base, r4->handlers
    31 	asm("0: ");
    32 	asm("ldr r0, [r3, #%a0]" : : "i" ((TInt)KHoIntContEnable));		// r0=bitmask with enabled interrupts
    33 	asm("ldr r1, [r3, #%a0]" : : "i" ((TInt)KHoIntContPending));	// r1=bitmask with pending interrupts
    34 	asm("mov r2, #31 ");											// int id
    35 	asm("and r0, r0, r1 ");
    36 	asm("bics r0, r0, #0xf8000000 ");								// mask unused bits (only 26 2nd-level ints defined)
    37 	asm("ldmeqfd sp!, {r4,pc} ");									// if no 2nd level interrupts pending, exit
    38 	asm("cmp r0, #0x00010000 ");
    39 	asm("movcc r0, r0, lsl #16 ");
    40 	asm("subcc r2, r2, #16 ");
    41 	asm("cmp r0, #0x01000000 ");
    42 	asm("movcc r0, r0, lsl #8 ");
    43 	asm("subcc r2, r2, #8 ");
    44 	asm("cmp r0, #0x10000000 ");
    45 	asm("movcc r0, r0, lsl #4 ");
    46 	asm("subcc r2, r2, #4 ");
    47 	asm("cmp r0, #0x40000000 ");
    48 	asm("movcc r0, r0, lsl #2 ");
    49 	asm("subcc r2, r2, #2 ");
    50 	asm("cmp r0, #0x80000000 ");
    51 	asm("subcc r2, r2, #1 ");										// r2=bit no. of MS 1
    52 	asm("add r0, r4, r2, lsl #3 ");									// r0->handler for this interrupt
    53 	asm("adr lr, 0b ");												// look again after calling handler
    54 	asm("ldmia r0, {r0,pc} ");										// jump to handler
    55 	}