Update contrib.
1 // Copyright (c) 1998-2009 Nokia Corporation and/or its subsidiary(-ies).
2 // All rights reserved.
3 // This component and the accompanying materials are made available
4 // under the terms of the License "Eclipse Public License v1.0"
5 // which accompanies this distribution, and is available
6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".
8 // Initial Contributors:
9 // Nokia Corporation - initial contribution.
14 // template\template_assp\interrupts.cia
15 // Template ASSP interrupt control and dispatch
19 #include <template_assp_priv.h>
21 __NAKED__ void TemplateInterrupt::IrqDispatch()
24 // Enter with r0-r3, r12 and return address on IRQ stack
25 // Must preserve r4-r11
27 // for the moment, use bit number as priority
28 asm("stmfd sp!, {r4-r6,lr} ");
29 asm("ldr r4, __KTemplateIntCtrlBase ");
30 asm("ldr r5, __Handlers ");
31 asm("dispatch_irq: ");
32 asm("ldr r12, [r4, #%a0]" : : "i" ((TInt)KHoInterruptsIrqPending)); // r12=IRQ pending register
34 asm("ldmeqfd sp!, {r4-r6,pc} "); // no more pending, so finish
36 asm("cmp r12, #0x00010000 ");
37 asm("movcc r12, r12, lsl #16 ");
38 asm("subcc r3, r3, #16 ");
39 asm("cmp r12, #0x01000000 ");
40 asm("movcc r12, r12, lsl #8 ");
41 asm("subcc r3, r3, #8 ");
42 asm("cmp r12, #0x10000000 ");
43 asm("movcc r12, r12, lsl #4 ");
44 asm("subcc r3, r3, #4 ");
45 asm("cmp r12, #0x40000000 ");
46 asm("movcc r12, r12, lsl #2 ");
47 asm("subcc r3, r3, #2 ");
48 asm("cmp r12, #0x80000000 ");
49 asm("subcc r3, r3, #1 "); // r3=bit no. of MS 1
50 asm("add r0, r5, r3, lsl #3 "); // r0=address of SInterruptHandler
51 asm("adr lr, dispatch_irq "); // return to dispatch_irq
52 asm("ldmia r0, {r0,pc} "); // (*iIsr)(iPtr);
55 __NAKED__ void TemplateInterrupt::FiqDispatch()
58 // Enter with return address on FIQ stack
59 // We may use r8-r12, but must preserve other registers
60 // for the moment, use bit number as priority
61 // NOTE: STACK MISALIGNED ON ENTRY (1 WORD PUSHED)
62 asm("stmfd sp!, {r0-r3,lr} ");
63 asm("ldr r8, __KTemplateIntCtrlBase ");
64 asm("ldr r9, __Handlers ");
65 asm("dispatch_fiq: ");
66 asm("ldr r12, [r4, #%a0]" : : "i" ((TInt)KHoInterruptsFiqPending)); // r12=FIQ pending register
68 asm("ldmeqfd sp!, {r0-r3,pc} "); // no more pending, so finish
70 asm("cmp r12, #0x00010000 ");
71 asm("movcc r12, r12, lsl #16 ");
72 asm("subcc r3, r3, #16 ");
73 asm("cmp r12, #0x01000000 ");
74 asm("movcc r12, r12, lsl #8 ");
75 asm("subcc r3, r3, #8 ");
76 asm("cmp r12, #0x10000000 ");
77 asm("movcc r12, r12, lsl #4 ");
78 asm("subcc r3, r3, #4 ");
79 asm("cmp r12, #0x40000000 ");
80 asm("movcc r12, r12, lsl #2 ");
81 asm("subcc r3, r3, #2 ");
82 asm("cmp r12, #0x80000000 ");
83 asm("subcc r3, r3, #1 "); // r3=bit no. of MS 1
84 asm("add r0, r9, r3, lsl #3 "); // r0=address of SInterruptHandler
85 asm("adr lr, dispatch_fiq "); // return to dispatch_fiq
86 asm("ldmia r0, {r0,pc} "); // (*iIsr)(iPtr);
88 asm("__KTemplateIntCtrlBase: ");
89 asm(".word %a0" : : "i" ((TInt)KHwBaseInterrupts));
91 asm(".word %a0" : : "i" ((TInt)&TemplateInterrupt::Handlers[0]));