1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/os/security/crypto/weakcryptospi/source/bigint/gcchelp.cpp Fri Jun 15 03:10:57 2012 +0200
1.3 @@ -0,0 +1,395 @@
1.4 +/*
1.5 +* Copyright (c) 2005-2009 Nokia Corporation and/or its subsidiary(-ies).
1.6 +* All rights reserved.
1.7 +* This component and the accompanying materials are made available
1.8 +* under the terms of the License "Eclipse Public License v1.0"
1.9 +* which accompanies this distribution, and is available
1.10 +* at the URL "http://www.eclipse.org/legal/epl-v10.html".
1.11 +*
1.12 +* Initial Contributors:
1.13 +* Nokia Corporation - initial contribution.
1.14 +*
1.15 +* Contributors:
1.16 +*
1.17 +* Description:
1.18 +*
1.19 +*/
1.20 +
1.21 +
1.22 +/**
1.23 + @file
1.24 +*/
1.25 +
1.26 +
1.27 +#include <kernel\u32std.h> // need this for __NAKED__, __JUMP and __POPRET
1.28 +
1.29 +extern "C" {
1.30 +#ifdef __GCC32__
1.31 +__NAKED__ long long __divdi3(long long /*dividend*/, long long /*divisor*/)
1.32 +//
1.33 +// Dividend in r1:r0, divisor in r3:r2, Return quotient in r1:r0
1.34 +//
1.35 + {
1.36 + asm("stmfd sp!, {r4-r8,lr} ");
1.37 + asm("eor r8, r1, r3 "); // sign of result into r8
1.38 + asm("movs r1, r1 ");
1.39 + asm("bpl 1f ");
1.40 + asm("rsbs r0, r0, #0 "); // ABS(dividend)
1.41 + asm("rsc r1, r1, #0 ");
1.42 + asm("1: ");
1.43 + asm("movs r3, r3 ");
1.44 + asm("bpl 2f ");
1.45 + asm("rsbs r2, r2, #0 "); // ABS(divisor)
1.46 + asm("rsc r3, r3, #0 ");
1.47 + asm("2: ");
1.48 + asm("bl UDiv01 "); // do the division, result in r4,r5
1.49 + asm("eors r0, r4, r8, asr #32 "); // quotient into r1:r0, inverted if quotient -ve
1.50 + asm("eors r1, r5, r8, asr #32 ");
1.51 + asm("adcs r0, r0, #0 "); // if quotient -ve, add 1
1.52 + asm("adcs r1, r1, #0 ");
1.53 + __POPRET("r4-r8,");
1.54 + }
1.55 +
1.56 +__NAKED__ long long __moddi3(long long /*dividend*/, long long /*divisor*/) /* signed */
1.57 + {
1.58 + asm("stmfd sp!, {r4-r8,lr} ");
1.59 + asm("movs r8, r1 "); // sign of remainder (=sign of dividend) into r8
1.60 + asm("bpl 1f ");
1.61 + asm("rsbs r0, r0, #0 "); // ABS(dividend)
1.62 + asm("rsc r1, r1, #0 ");
1.63 + asm("1: ");
1.64 + asm("movs r3, r3 ");
1.65 + asm("bpl 2f ");
1.66 + asm("rsbs r2, r2, #0 "); // ABS(divisor)
1.67 + asm("rsc r3, r3, #0 ");
1.68 + asm("2: ");
1.69 + asm("bl UDiv01 "); // do the division, remainder in r3,r6
1.70 + asm("eors r0, r3, r8, asr #32 "); // remainder into r1:r0, inverted if dividend -ve
1.71 + asm("eors r1, r6, r8, asr #32 ");
1.72 + asm("adcs r0, r0, #0 "); // if dividend -ve, add 1
1.73 + asm("adcs r1, r1, #0 ");
1.74 + __POPRET("r4-r8,");
1.75 + }
1.76 +
1.77 +__NAKED__ long long __umoddi3(unsigned long long /*dividend*/, unsigned long long /*divisor*/) /* unsigned */
1.78 + {
1.79 + asm("stmfd sp!, {r4-r7,lr} ");
1.80 + asm("bl UDiv01 "); // do the division, remainder in r6:r3
1.81 + asm("mov r0, r3 ");
1.82 + asm("mov r1, r6 ");
1.83 + __POPRET("r4-r7,");
1.84 + }
1.85 +
1.86 +__NAKED__ long long __ashrdi3(long long /*value*/, unsigned int /*count*/)
1.87 + {
1.88 + asm("cmp r2, #63 ");
1.89 + asm("movhi r2, #63 "); // count>63 same as count=63
1.90 + asm("cmp r2, #32 ");
1.91 + asm("bcs Asr01 "); // jump if shift count >=32
1.92 + asm("rsb r12, r2, #32 "); // r12=32-shift count
1.93 + asm("mov r0, r0, lsr r2 "); // shift ls word right
1.94 + asm("orr r0, r0, r1, lsl r12 "); // or in bits shifted out of ms word
1.95 + asm("mov r1, r1, asr r2 "); // shift ms word right
1.96 + __JUMP(,lr);
1.97 + asm("Asr01: ");
1.98 + asm("sub r2, r2, #32 "); // r2=shift count-32
1.99 + asm("mov r0, r1, asr r2 "); // ls word = ms word >> (count-32)
1.100 + asm("mov r1, r1, asr #32 "); // ms word of result=sign extension of r1
1.101 + __JUMP(,lr);
1.102 + }
1.103 +
1.104 +__NAKED__ long long __ashldi3(long long /*value*/, unsigned int /*count*/)
1.105 + {
1.106 + asm("cmp r2, #63 ");
1.107 + asm("movhi r2, #64 "); // count>63 same as count=64
1.108 + asm("cmp r2, #32 ");
1.109 + asm("bcs Asl01 "); // jump if shift count >=32
1.110 + asm("rsb r12, r2, #32 "); // r12=32-shift count
1.111 + asm("mov r1, r1, asl r2 "); // shift ms word left
1.112 + asm("orr r1, r1, r0, lsr r12 "); // or in bits shifted out of ls word
1.113 + asm("mov r0, r0, asl r2 "); // shift ls word left
1.114 + __JUMP(,lr);
1.115 + asm("Asl01: ");
1.116 + asm("sub r2, r2, #32 "); // r2=shift count-32
1.117 + asm("mov r1, r0, asl r2 "); // result ms word = ls word << (count-32)
1.118 + asm("mov r0, #0 "); // ls word of result is zero
1.119 + __JUMP(,lr);
1.120 + }
1.121 +
1.122 +__NAKED__ unsigned long long __lshrdi3(unsigned long long /*value*/, unsigned int /*count*/)
1.123 + {
1.124 + asm("cmp r2, #63 ");
1.125 + asm("movhi r2, #64 "); // count>63 same as count=64
1.126 + asm("cmp r2, #32 ");
1.127 + asm("bcs Lsr01 "); // jump if shift count >=32
1.128 + asm("rsb r12, r2, #32 "); // r12=32-shift count
1.129 + asm("mov r0, r0, lsr r2 "); // shift ls word right
1.130 + asm("orr r0, r0, r1, lsl r12 "); // or in bits shifted out of ms word
1.131 + asm("mov r1, r1, lsr r2 "); // shift ms word right
1.132 + __JUMP(,lr);
1.133 + asm("Lsr01: ");
1.134 + asm("sub r2, r2, #32 "); // r2=shift count-32
1.135 + asm("mov r0, r1, lsr r2 "); // ls word = ms word >> (count-32)
1.136 + asm("mov r1, #0 "); // ms word of result = 0
1.137 + __JUMP(,lr);
1.138 + }
1.139 +
1.140 +__NAKED__ long long __muldi3(long long /*multiplicand*/, long long /*multiplier*/)
1.141 + {
1.142 + asm("mul r1, r2, r1 "); // r1=low2*high1
1.143 + asm("mov ip, r0 "); // ip=low1
1.144 + asm("mla r1, r0, r3, r1 "); // r1+=low1*high2
1.145 + asm("mov r0, #0 ");
1.146 + asm("umlal r0, r1, r2, ip "); // r1:r0 += high1*low1
1.147 + __JUMP(,lr);
1.148 + }
1.149 +
1.150 +__NAKED__ long long __negdi2(long long /*argument*/)
1.151 + {
1.152 + asm("rsbs r0, r0, #0 "); // r0=0-r0, set carry
1.153 + asm("rscs r1, r1, #0 "); // r1=0-r1-(1-C)
1.154 + __JUMP(,lr);
1.155 + }
1.156 +
1.157 +__NAKED__ unsigned long long __udivmoddi4 (unsigned long long /*dividend*/,
1.158 + unsigned long long /*divisor*/,
1.159 + unsigned long long* /*p_remainder*/)
1.160 + {
1.161 + asm("stmfd sp!, {r4-r7,lr} ");
1.162 + asm("bl UDiv01 "); // do the division, quotient in r5:r4 remainder in r6:r3
1.163 + asm("ldr r7, [sp, #20] "); // r7=p_remainder
1.164 + asm("mov r0, r4 "); // r0=quotient low
1.165 + asm("stmia r7, {r3,r6} "); // store remainder
1.166 + asm("mov r1, r5 "); // r0=quotient high
1.167 + __POPRET("r4-r7,");
1.168 + }
1.169 +
1.170 +__NAKED__ int __cmpdi2(long long /*a*/, long long /*b*/)
1.171 + {
1.172 + // return 0 if a<b, 1 if a=b, 2 if a>b
1.173 + asm("subs r0, r2, r0 ");
1.174 + asm("sbcs r1, r3, r1 "); // r1:r0 = b-a, set flags
1.175 + asm("movlt r0, #2 "); // if b<a r0=2
1.176 + __JUMP(lt,lr); // if b<a return
1.177 + asm("cmpeq r0, #0 "); // if top word of difference=0, look at bottom
1.178 + asm("moveq r0, #1 "); // if a=b, r0=1
1.179 + asm("movne r0, #0 "); // else r=0
1.180 + __JUMP(,lr);
1.181 + }
1.182 +
1.183 +__NAKED__ int __ucmpdi2(unsigned long long /*a*/, unsigned long long /*b*/)
1.184 + {
1.185 + // return 0 if a<b, 1 if a=b, 2 if a>b
1.186 + asm("cmp r1, r3 ");
1.187 + asm("cmpeq r0, r2 "); // compare r1:r0 - r3:r2
1.188 + asm("movhi r0, #2 "); // r0=2 if a>b
1.189 + asm("moveq r0, #1 "); // r0=1 if a=b
1.190 + asm("movlo r0, #0 "); // r0=0 if a<b
1.191 + __JUMP(,lr);
1.192 + }
1.193 +#endif
1.194 +
1.195 +#if defined(__GCC32__)
1.196 +void __division_by_zero();
1.197 +#define DIV_BY_ZERO " __division_by_zero "
1.198 +#elif defined(__ARMCC__)
1.199 +void __rt_div0 (void);
1.200 +#define DIV_BY_ZERO " __cpp(__rt_div0) "
1.201 +#endif
1.202 +
1.203 +void __division_by_zero()
1.204 + {
1.205 + RThread().RaiseException(EExcIntegerDivideByZero);
1.206 + }
1.207 +
1.208 +__NAKED__ unsigned long long __udivdi3(unsigned long long /*dividend*/, unsigned long long /*divisor*/)
1.209 +//
1.210 +// Dividend in r1:r0, divisor in r3:r2, Return quotient in r1:r0
1.211 +//
1.212 + {
1.213 + asm("stmfd sp!, {r4-r7,lr} ");
1.214 + asm("bl UDiv01 "); // do the division, result in r4,r5
1.215 + asm("mov r0, r4 ");
1.216 + asm("mov r1, r5 ");
1.217 + __POPRET("r4-r7,");
1.218 +
1.219 + // Unsigned 64-bit division. Dividend in r0,r1, divisor in r2,r3
1.220 + // Quotient returned in r4,r5, Remainder in r3,r6
1.221 + // Registers r0-r7,r12 used, r8-r11 unmodified
1.222 + asm(".global UDiv01 ");
1.223 + asm("UDiv01: ");
1.224 + asm("movs r3, r3 "); // check if divisor fits in 32 bits
1.225 + asm("bne udiv64a "); // branch if not
1.226 + asm("movs r2, r2 "); // check if divisor fits in 31 bits
1.227 + asm("bmi udiv64e "); // branch if not
1.228 + asm("beq udiv64_divby0 "); // if divisor=0, branch to error routine
1.229 +
1.230 + // Divisor is <0x80000000
1.231 + // This means that a 32-bit accumulator is sufficient
1.232 + asm("mov r4, #0 "); // use r3 as acc, result in r4, r5
1.233 + asm("mov r5, #0 ");
1.234 + asm("mov r6, #8 "); // do 2 set of 32 iterations
1.235 + asm("udiv64b: ");
1.236 + asm("adds r1, r1, r1 "); // shift dividend left into acc
1.237 + asm("adcs r3, r3, r3 ");
1.238 + asm("subs r3, r3, r2 "); // subtract divisor from acc
1.239 + asm("adc r5, r5, r5 "); // shift result bit left into quotient
1.240 + asm("addcc r3, r3, r2 "); // if borrow, add back
1.241 + asm("adds r1, r1, r1 "); // shift dividend left into acc
1.242 + asm("adcs r3, r3, r3 ");
1.243 + asm("subs r3, r3, r2 "); // subtract divisor from acc
1.244 + asm("adc r5, r5, r5 "); // shift result bit left into quotient
1.245 + asm("addcc r3, r3, r2 "); // if borrow, add back
1.246 + asm("adds r1, r1, r1 "); // shift dividend left into acc
1.247 + asm("adcs r3, r3, r3 ");
1.248 + asm("subs r3, r3, r2 "); // subtract divisor from acc
1.249 + asm("adc r5, r5, r5 "); // shift result bit left into quotient
1.250 + asm("addcc r3, r3, r2 "); // if borrow, add back
1.251 + asm("adds r1, r1, r1 "); // shift dividend left into acc
1.252 + asm("adcs r3, r3, r3 ");
1.253 + asm("subs r3, r3, r2 "); // subtract divisor from acc
1.254 + asm("adc r5, r5, r5 "); // shift result bit left into quotient
1.255 + asm("addcc r3, r3, r2 "); // if borrow, add back
1.256 + asm("subs r6, r6, #1 "); // loop
1.257 + asm("bne udiv64b ");
1.258 + asm("mov r6, #8 "); // 2nd set of 32 iterations
1.259 + asm("udiv64c: ");
1.260 + asm("adds r0, r0, r0 "); // shift dividend left into acc
1.261 + asm("adcs r3, r3, r3 ");
1.262 + asm("subs r3, r3, r2 "); // subtract divisor from acc
1.263 + asm("adc r4, r4, r4 "); // shift result bit left into quotient
1.264 + asm("addcc r3, r3, r2 "); // if borrow, add back
1.265 + asm("adds r0, r0, r0 "); // shift dividend left into acc
1.266 + asm("adcs r3, r3, r3 ");
1.267 + asm("subs r3, r3, r2 "); // subtract divisor from acc
1.268 + asm("adc r4, r4, r4 "); // shift result bit left into quotient
1.269 + asm("addcc r3, r3, r2 "); // if borrow, add back
1.270 + asm("adds r0, r0, r0 "); // shift dividend left into acc
1.271 + asm("adcs r3, r3, r3 ");
1.272 + asm("subs r3, r3, r2 "); // subtract divisor from acc
1.273 + asm("adc r4, r4, r4 "); // shift result bit left into quotient
1.274 + asm("addcc r3, r3, r2 "); // if borrow, add back
1.275 + asm("adds r0, r0, r0 "); // shift dividend left into acc
1.276 + asm("adcs r3, r3, r3 ");
1.277 + asm("subs r3, r3, r2 "); // subtract divisor from acc
1.278 + asm("adc r4, r4, r4 "); // shift result bit left into quotient
1.279 + asm("addcc r3, r3, r2 "); // if borrow, add back
1.280 + asm("subs r6, r6, #1 "); // loop
1.281 + asm("bne udiv64c ");
1.282 + __JUMP(,lr);
1.283 +
1.284 + // 2^31 <= Divisor < 2^32
1.285 + // Need 33-bit accumulator - use carry flag as 33rd bit
1.286 + asm("udiv64e: ");
1.287 + asm("mov r4, #0 "); // use r3 as acc, result in r4, r5
1.288 + asm("mov r5, #0 ");
1.289 + asm("mov r6, #8 "); // do 2 set of 32 iterations
1.290 + asm("udiv64f: ");
1.291 + asm("adds r1, r1, r1 "); // shift dividend left into acc
1.292 + asm("adcs r3, r3, r3 ");
1.293 + asm("subcs r3, r3, r2 ");
1.294 + asm("subccs r3, r3, r2 "); // subtract divisor from acc
1.295 + asm("adc r5, r5, r5 "); // shift result bit left into quotient
1.296 + asm("addcc r3, r3, r2 "); // if borrow, add back
1.297 + asm("adds r1, r1, r1 "); // shift dividend left into acc
1.298 + asm("adcs r3, r3, r3 ");
1.299 + asm("subcs r3, r3, r2 ");
1.300 + asm("subccs r3, r3, r2 "); // subtract divisor from acc
1.301 + asm("adc r5, r5, r5 "); // shift result bit left into quotient
1.302 + asm("addcc r3, r3, r2 "); // if borrow, add back
1.303 + asm("adds r1, r1, r1 "); // shift dividend left into acc
1.304 + asm("adcs r3, r3, r3 ");
1.305 + asm("subcs r3, r3, r2 ");
1.306 + asm("subccs r3, r3, r2 "); // subtract divisor from acc
1.307 + asm("adc r5, r5, r5 "); // shift result bit left into quotient
1.308 + asm("addcc r3, r3, r2 "); // if borrow, add back
1.309 + asm("adds r1, r1, r1 "); // shift dividend left into acc
1.310 + asm("adcs r3, r3, r3 ");
1.311 + asm("subcs r3, r3, r2 ");
1.312 + asm("subccs r3, r3, r2 "); // subtract divisor from acc
1.313 + asm("adc r5, r5, r5 "); // shift result bit left into quotient
1.314 + asm("addcc r3, r3, r2 "); // if borrow, add back
1.315 + asm("subs r6, r6, #1 "); // loop
1.316 + asm("bne udiv64f ");
1.317 + asm("mov r6, #8 "); // 2nd set of 32 iterations
1.318 + asm("udiv64g: ");
1.319 + asm("adds r0, r0, r0 "); // shift dividend left into acc
1.320 + asm("adcs r3, r3, r3 ");
1.321 + asm("subcs r3, r3, r2 ");
1.322 + asm("subccs r3, r3, r2 "); // subtract divisor from acc
1.323 + asm("adc r4, r4, r4 "); // shift result bit left into quotient
1.324 + asm("addcc r3, r3, r2 "); // if borrow, add back
1.325 + asm("adds r0, r0, r0 "); // shift dividend left into acc
1.326 + asm("adcs r3, r3, r3 ");
1.327 + asm("subcs r3, r3, r2 ");
1.328 + asm("subccs r3, r3, r2 "); // subtract divisor from acc
1.329 + asm("adc r4, r4, r4 "); // shift result bit left into quotient
1.330 + asm("addcc r3, r3, r2 "); // if borrow, add back
1.331 + asm("adds r0, r0, r0 "); // shift dividend left into acc
1.332 + asm("adcs r3, r3, r3 ");
1.333 + asm("subcs r3, r3, r2 ");
1.334 + asm("subccs r3, r3, r2 "); // subtract divisor from acc
1.335 + asm("adc r4, r4, r4 "); // shift result bit left into quotient
1.336 + asm("addcc r3, r3, r2 "); // if borrow, add back
1.337 + asm("adds r0, r0, r0 "); // shift dividend left into acc
1.338 + asm("adcs r3, r3, r3 ");
1.339 + asm("subcs r3, r3, r2 ");
1.340 + asm("subccs r3, r3, r2 "); // subtract divisor from acc
1.341 + asm("adc r4, r4, r4 "); // shift result bit left into quotient
1.342 + asm("addcc r3, r3, r2 "); // if borrow, add back
1.343 + asm("subs r6, r6, #1 "); // loop
1.344 + asm("bne udiv64g ");
1.345 + __JUMP(,lr);
1.346 +
1.347 + // Divisor >= 2^32, so quotient < 2^32
1.348 + // Use 64 bit accumulator, 32 bit quotient
1.349 + asm("udiv64a: ");
1.350 + asm("mov r4, #0 "); // quotient in r4, use r1, r6 as accumulator
1.351 + asm("mov r6, #0 ");
1.352 + asm("mov r5, #8 "); // do 32 iterations
1.353 + asm("udiv64d: ");
1.354 + asm("adds r0, r0, r0 "); // shift dividend left into acc
1.355 + asm("adcs r1, r1, r1 ");
1.356 + asm("adcs r6, r6, r6 ");
1.357 + asm("subs r7, r1, r2 "); // subtract divisor from acc, result into r7,r12
1.358 + asm("sbcs r12, r6, r3 ");
1.359 + asm("adc r4, r4, r4 "); // shift result bit left into quotient
1.360 + asm("movcs r1, r7 "); // if no borrow, update acc
1.361 + asm("movcs r6, r12 ");
1.362 + asm("adds r0, r0, r0 "); // shift dividend left into acc
1.363 + asm("adcs r1, r1, r1 ");
1.364 + asm("adcs r6, r6, r6 ");
1.365 + asm("subs r7, r1, r2 "); // subtract divisor from acc, result into r7,r12
1.366 + asm("sbcs r12, r6, r3 ");
1.367 + asm("adc r4, r4, r4 "); // shift result bit left into quotient
1.368 + asm("movcs r1, r7 "); // if no borrow, update acc
1.369 + asm("movcs r6, r12 ");
1.370 + asm("adds r0, r0, r0 "); // shift dividend left into acc
1.371 + asm("adcs r1, r1, r1 ");
1.372 + asm("adcs r6, r6, r6 ");
1.373 + asm("subs r7, r1, r2 "); // subtract divisor from acc, result into r7,r12
1.374 + asm("sbcs r12, r6, r3 ");
1.375 + asm("adc r4, r4, r4 "); // shift result bit left into quotient
1.376 + asm("movcs r1, r7 "); // if no borrow, update acc
1.377 + asm("movcs r6, r12 ");
1.378 + asm("adds r0, r0, r0 "); // shift dividend left into acc
1.379 + asm("adcs r1, r1, r1 ");
1.380 + asm("adcs r6, r6, r6 ");
1.381 + asm("subs r7, r1, r2 "); // subtract divisor from acc, result into r7,r12
1.382 + asm("sbcs r12, r6, r3 ");
1.383 + asm("adc r4, r4, r4 "); // shift result bit left into quotient
1.384 + asm("movcs r1, r7 "); // if no borrow, update acc
1.385 + asm("movcs r6, r12 ");
1.386 + asm("subs r5, r5, #1 "); // loop
1.387 + asm("bne udiv64d ");
1.388 + asm("mov r3, r1 "); // remainder in r3,r6
1.389 + __JUMP(,lr);
1.390 +
1.391 + asm("udiv64_divby0: ");
1.392 + asm("str lr, [sp, #-4]! ");
1.393 + asm("bl " DIV_BY_ZERO);
1.394 + __POPRET("");
1.395 + }
1.396 +
1.397 +}
1.398 +