1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/os/kernelhwsrv/userlibandfileserver/fileserver/sfat/sl_cache.h Fri Jun 15 03:10:57 2012 +0200
1.3 @@ -0,0 +1,211 @@
1.4 +// Copyright (c) 1996-2009 Nokia Corporation and/or its subsidiary(-ies).
1.5 +// All rights reserved.
1.6 +// This component and the accompanying materials are made available
1.7 +// under the terms of the License "Eclipse Public License v1.0"
1.8 +// which accompanies this distribution, and is available
1.9 +// at the URL "http://www.eclipse.org/legal/epl-v10.html".
1.10 +//
1.11 +// Initial Contributors:
1.12 +// Nokia Corporation - initial contribution.
1.13 +//
1.14 +// Contributors:
1.15 +//
1.16 +// Description:
1.17 +// f32\sfat32\inc\sl_cache.h
1.18 +//
1.19 +//
1.20 +
1.21 +/**
1.22 + @file
1.23 + @internalTechnology
1.24 +*/
1.25 +
1.26 +//!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
1.27 +//!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
1.28 +//!!
1.29 +//!! WARNING!! DO NOT edit this file !! '\sfat' component is obsolete and is not being used. '\sfat32'replaces it
1.30 +//!!
1.31 +//!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
1.32 +//!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
1.33 +
1.34 +
1.35 +#ifndef SL_CACHE_H
1.36 +#define SL_CACHE_H
1.37 +
1.38 +
1.39 +//---------------------------------------------------------------------------------------------------------------------------------
1.40 +//-- dedicated FAT directory cache related stuff
1.41 +
1.42 +//-- if defined, a dedicated cache will be used for FAT directories
1.43 +#define ENABLE_DEDICATED_DIR_CACHE
1.44 +
1.45 +//---------------------------------------------------------------------------------------------------------------------------------
1.46 +
1.47 +
1.48 +/**
1.49 + An abstract interface to the media Write-Through cache
1.50 +*/
1.51 +class MWTCacheInterface
1.52 + {
1.53 +public:
1.54 +
1.55 + /** Enums for control functions. See Control() */
1.56 + enum TControl
1.57 + {
1.58 + EDisableCache = 0, ///< disable/enable cache, can be used for debug purposes
1.59 + EDumpCache = 1, ///< print full cache content, can be used for debug purposes
1.60 + ECacheInfo = 2, ///< print cache info, can be used for debug purposes
1.61 + };
1.62 +
1.63 + virtual ~MWTCacheInterface() {}
1.64 +
1.65 + /** the same meaning and parameters as in CRawDisk::ReadL */
1.66 + virtual void ReadL(TInt64 aPos, TInt aLength, TDes8& aDes)=0;
1.67 +
1.68 + /** the same meaning and parameters as in CRawDisk::WriteL */
1.69 + virtual void WriteL(TInt64 aPos,const TDesC8& aDes)=0;
1.70 +
1.71 + /** Invalidates whole directory cache*/
1.72 + virtual void InvalidateCache(void)=0;
1.73 +
1.74 + /** invalidate a single cache page if the aPos is cached*/
1.75 + virtual void InvalidateCachePage(TUint64 aPos)=0;
1.76 +
1.77 + /**
1.78 + Finds out if the media position "aPosToSearch" is in the cache and returns cache page information in this case.
1.79 +
1.80 + @param aPosToSearch linear media position to lookup in the cache
1.81 + @param aCachedPosStart if "aPosToSearch" is cached, here will be media position of this page start
1.82 +
1.83 + @return 0 if aPosToSearch isn't cached, otherwise cache page size in bytes (see also aCachedPosStart).
1.84 + */
1.85 + virtual TUint32 PosCached(const TInt64& aPosToSearch, TInt64& aCachedPosStart) = 0;
1.86 +
1.87 + /**
1.88 + @return size of the cache in bytes. Can be 0.
1.89 + */
1.90 + virtual TUint32 CacheSizeInBytes() const = 0;
1.91 +
1.92 + /**
1.93 + Make the page indexed by aPos the MRU page in the cache.
1.94 + Assumes cache evicts pages according to LRU algorithm.
1.95 + */
1.96 + virtual void MakePageMRU(TInt64 aPos) = 0;
1.97 +
1.98 + /**
1.99 + @return log2 number of the size of the cache in bytes.
1.100 + */
1.101 + virtual TUint32 PageSizeInBytesLog2() const = 0;
1.102 +
1.103 + /**
1.104 + Control method.
1.105 +
1.106 + @param aFunction control function
1.107 + @param aParam1 just arbitrary parameter
1.108 + @param aParam2 just arbitrary parameter
1.109 + @return Standard error code.
1.110 + */
1.111 + virtual TInt Control(TUint32 aFunction, TUint32 aParam1, TAny* aParam2)=0;
1.112 +
1.113 + /**
1.114 + Set cache base position at aBasePos
1.115 + @param aBasePos base position of the cache pages. Affects pages alignment.
1.116 + */
1.117 + virtual void SetCacheBasePos(TInt64 aBasePos)=0;
1.118 +
1.119 + };
1.120 +
1.121 +//---------------------------------------------------------------------------------------------------------------------------------
1.122 +
1.123 +/**
1.124 +This class represents the media Write-Through cache page
1.125 +*/
1.126 +class CWTCachePage
1.127 + {
1.128 +public:
1.129 +
1.130 + static CWTCachePage* NewL(TUint32 aPageSizeLog2);
1.131 + void ConstructL(TUint32 aPageSizeLog2);
1.132 +
1.133 + ~CWTCachePage();
1.134 +
1.135 + inline TBool PosCached(TInt64 aPos) const;
1.136 + inline TUint32 PosInCachePage(TInt64 aPos) const;
1.137 + inline TUint8* PtrInCachePage(TInt64 aPos) const;
1.138 + inline TUint32 PageSize() const;
1.139 +
1.140 +protected:
1.141 +
1.142 + CWTCachePage();
1.143 + CWTCachePage(const CWTCachePage&);
1.144 + CWTCachePage& operator=(const CWTCachePage&);
1.145 +
1.146 +public:
1.147 +
1.148 + TInt32 iValid; ///< 0 if the page doesn't contain valid data
1.149 + TInt64 iStartPos; ///< cache page base media position
1.150 + RBuf8 iData; ///< page Data
1.151 + };
1.152 +
1.153 +//---------------------------------------------------------------------------------------------------------------------------------
1.154 +
1.155 +/**
1.156 + Media Write-through cache.
1.157 +*/
1.158 +class CMediaWTCache : public CBase, public MWTCacheInterface
1.159 + {
1.160 +public:
1.161 + ~CMediaWTCache();
1.162 +
1.163 + static CMediaWTCache* NewL(TFatDriveInterface& aDrive, TUint32 aNumPages, TUint32 aPageSizeLog2);
1.164 +
1.165 + void ConstructL(TUint32 aNumPages, TUint32 aPageSizeLog2);
1.166 +
1.167 + //-- overloads from the base class
1.168 + void ReadL (TInt64 aPos,TInt aLength,TDes8& aDes);
1.169 + void WriteL(TInt64 aPos,const TDesC8& aDes);
1.170 + void InvalidateCache(void);
1.171 + void InvalidateCachePage(TUint64 aPos);
1.172 +
1.173 +
1.174 + TUint32 PosCached(const TInt64& aPosToSearch, TInt64& aCachedPosStart);
1.175 + TUint32 CacheSizeInBytes() const;
1.176 + void MakePageMRU(TInt64 aPos);
1.177 + TUint32 PageSizeInBytesLog2() const;
1.178 + TInt Control(TUint32 aFunction, TUint32 aParam1, TAny* aParam2);
1.179 + inline void SetCacheBasePos(TInt64 aBasePos);
1.180 + //--
1.181 +
1.182 +protected:
1.183 + CMediaWTCache();
1.184 + CMediaWTCache(TFatDriveInterface& aDrive);
1.185 +
1.186 + inline TInt64 CalcPageStartPos(TInt64 aPos) const;
1.187 + inline TUint32 PageSize() const;
1.188 +
1.189 + void MakePageLRU(TInt aPageNo);
1.190 +
1.191 + TInt FindPageByPos(TInt64 aPos) const;
1.192 + TUint32 GrabPage() const;
1.193 + TUint32 GrabReadPageL(TInt64 aPos);
1.194 + TUint32 FindOrGrabReadPageL(TInt64 aPos);
1.195 +
1.196 +protected:
1.197 + TFatDriveInterface& iDrive; ///< reference to the driver for media access
1.198 + TUint32 iPageSizeLog2; ///< Log2 (cache page size)
1.199 + mutable TBool iAllPagesValid;///< ETrue if all cache pages have valid data
1.200 + TInt64 iCacheBasePos; ///< Cache pages base position, used to align them at cluster size
1.201 + RPointerArray<CWTCachePage> iPages; ///< array of pointers to the cache pages. Used for organising LRU list
1.202 + TUint32 iCacheDisabled :1; ///< if not 0 the cache is disabled totally and all reads and writes go via TFatDriveInterface directly
1.203 + };
1.204 +
1.205 +
1.206 +
1.207 +
1.208 +#include"sl_cache.inl"
1.209 +
1.210 +#endif //SL_CACHE_H
1.211 +
1.212 +
1.213 +
1.214 +