1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/os/kernelhwsrv/kerneltest/e32test/realtime/d_latncy.cia	Fri Jun 15 03:10:57 2012 +0200
     1.3 @@ -0,0 +1,115 @@
     1.4 +// Copyright (c) 1999-2009 Nokia Corporation and/or its subsidiary(-ies).
     1.5 +// All rights reserved.
     1.6 +// This component and the accompanying materials are made available
     1.7 +// under the terms of the License "Eclipse Public License v1.0"
     1.8 +// which accompanies this distribution, and is available
     1.9 +// at the URL "http://www.eclipse.org/legal/epl-v10.html".
    1.10 +//
    1.11 +// Initial Contributors:
    1.12 +// Nokia Corporation - initial contribution.
    1.13 +//
    1.14 +// Contributors:
    1.15 +//
    1.16 +// Description:
    1.17 +// e32test\realtime\d_latncy.cia
    1.18 +// 
    1.19 +//
    1.20 +
    1.21 +#include <platform.h>
    1.22 +
    1.23 +#if defined(__MEIG__)
    1.24 +#include <cl7211.h>
    1.25 +#elif defined(__MAWD__)
    1.26 +#include <windermere.h>
    1.27 +#elif defined(__MISA__)
    1.28 +#include <sa1100.h>
    1.29 +#elif defined(__MCOT__)
    1.30 +#include <cotulla.h>
    1.31 +#elif defined(__MI920__) || defined(__NI1136__)
    1.32 +#include <integratorap.h>
    1.33 +#elif defined(__RVEMUBOARD__)
    1.34 +#include <rvemuboard.h>
    1.35 +#endif
    1.36 +
    1.37 +#include <kernel/kern_priv.h>		//temporary
    1.38 +#include "d_latncy.h"
    1.39 +
    1.40 +#if !defined(__SMP__)
    1.41 +#if !defined(__EPOC32__) || !defined(__CPU_X86)
    1.42 +__NAKED__ TUint IntStackPtr()
    1.43 +	{
    1.44 +	asm("mrs r1, cpsr ");
    1.45 +	asm("bic r3, r1, #0x1f ");
    1.46 +#ifdef __MISA__
    1.47 +	asm("orr r3, r3, #0xd1 ");		// mode_fiq, all interrupts off
    1.48 +#else
    1.49 +	asm("orr r3, r3, #0xd2 ");		// mode_irq, all interrupts off
    1.50 +#endif
    1.51 +	asm("msr cpsr, r3 ");
    1.52 +	asm("mov r0, sp ");				// r0=sp_irq or sp_fiq
    1.53 +	asm("msr cpsr, r1 ");			// restore interrupts
    1.54 +	__JUMP(,lr);
    1.55 +	}
    1.56 +#endif
    1.57 +
    1.58 +#ifdef __CAPTURE_EXTRAS
    1.59 +#include <arm.h>
    1.60 +
    1.61 +__NAKED__ void CaptureExtras(SLatencyResults&)
    1.62 +	{
    1.63 +	asm("mrs r1, spsr ");			// r1=interrupted mode
    1.64 +	asm("mrs r2, cpsr ");			// r2=current PSR
    1.65 +	asm("tst r1, #0x0f ");			// check if we interrupted user mode
    1.66 +	asm("orr ip, r1, #%a0" : : "i" ((TInt)KAllInterruptsMask));		// ip=interrupted mode with interrupts off
    1.67 +	asm("orreq ip, ip, #0x1f ");	// if we interrupted user mode, go to system mode instead
    1.68 +	asm("bic ip, ip, #0x20 ");		// make sure we don't go into THUMB mode
    1.69 +	asm("msr cpsr, ip ");			// switch to interrupted mode with ints off
    1.70 +	asm("mov r3, lr ");				// r3=interrupted mode R14
    1.71 +	asm("msr cpsr, r2 ");			// back to interrupt mode
    1.72 +	asm("str r1, [r0, #%a0]" : : "i" _FOFF(SLatencyResults,iIntSpsr));
    1.73 +	asm("str r3, [r0, #%a0]" : : "i" _FOFF(SLatencyResults,iIntR14));
    1.74 +	__JUMP(,lr);
    1.75 +	}
    1.76 +#endif
    1.77 +#endif	// __SMP__
    1.78 +
    1.79 +#if defined (__MISA__) || defined (__MCOT__)
    1.80 +__NAKED__ void DLatency::MsCallBack(TAny* aPtr)
    1.81 +	{
    1.82 +	asm("ldr ip, __KHwBaseOst");
    1.83 +	asm("ldr r3, [r0, #%a0]" : : "i" _FOFF(DLatency,iTickIncrement));
    1.84 +	asm("ldr r1, [ip, #0x10] ");		// r1=OSCR
    1.85 +	asm("ldr r2, [ip, #0x00] ");		// r2=OSMR0
    1.86 +	asm("sub r1, r1, r2 ");				// r1=int latency in ticks
    1.87 +	asm("str r1, [r0, #%a0]" : : "i" _FOFF(DLatency,iResults.iIntTicks));
    1.88 +	asm("str r2, [r0, #%a0]" : : "i" _FOFF(DLatency,iTriggerTime));
    1.89 +	asm("add r2, r2, r3 ");				// add increment to OSMR0
    1.90 +	asm("ldr r1, [r0, #%a0]" : : "i" _FOFF(DLatency,iIntStackTop));
    1.91 +	asm("ldrb r3, [r0, #%a0]" : : "i" _FOFF(DLatency,iOff));
    1.92 +	asm("str r2, [ip, #0x00] ");
    1.93 +	asm("ldr r1, [r1, #-4] ");			// r1=interrupt return address
    1.94 +	asm("mov r2, #1 ");
    1.95 +	asm("cmp r3, #0 ");
    1.96 +	asm("str r1, [r0, #%a0]" : : "i" _FOFF(DLatency,iResults.iIntRetAddr));
    1.97 +	asm("str r2, [ip, #0x14] ");		// clear interrupt
    1.98 +	asm("add r0, r0, #%a0" : : "i" _FOFF(DLatency,iMsDfc));
    1.99 +	asm("beq Add__4TDfc ");
   1.100 +	__JUMP(,lr);
   1.101 +
   1.102 +	asm("__KHwBaseOst: ");	//OS timer register locations
   1.103 +#ifdef __MISA__
   1.104 +	#ifdef __MEMMODEL_DIRECT__
   1.105 +		asm(".word 0x90000000");		//Assabet direct MM
   1.106 +	#else
   1.107 +		asm(".word 0x63008000");		//Assabet non-direct MM
   1.108 +	#endif
   1.109 +#else
   1.110 +	#ifdef __MEMMODEL_DIRECT__
   1.111 +		asm(".word 0x40A00000");		//Lubbock direct MM
   1.112 +	#else
   1.113 +		asm(".word 0x6300A000");		//Lubbock non-direct MM
   1.114 +	#endif
   1.115 +#endif
   1.116 +	}
   1.117 +#endif
   1.118 +