1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/os/kernelhwsrv/kerneltest/e32test/mmu/d_shadow.h Fri Jun 15 03:10:57 2012 +0200
1.3 @@ -0,0 +1,206 @@
1.4 +// Copyright (c) 1997-2009 Nokia Corporation and/or its subsidiary(-ies).
1.5 +// All rights reserved.
1.6 +// This component and the accompanying materials are made available
1.7 +// under the terms of the License "Eclipse Public License v1.0"
1.8 +// which accompanies this distribution, and is available
1.9 +// at the URL "http://www.eclipse.org/legal/epl-v10.html".
1.10 +//
1.11 +// Initial Contributors:
1.12 +// Nokia Corporation - initial contribution.
1.13 +//
1.14 +// Contributors:
1.15 +//
1.16 +// Description:
1.17 +// e32test\mmu\d_shadow.h
1.18 +//
1.19 +//
1.20 +
1.21 +#if !defined(__D_SHADOW_H__)
1.22 +#define __D_SHADOW_H__
1.23 +#include <e32cmn.h>
1.24 +#ifndef __KERNEL_MODE__
1.25 +#include <e32std.h>
1.26 +#endif
1.27 +
1.28 +
1.29 +enum TMemModel
1.30 + {
1.31 + EMemModelOther,
1.32 + EMemModelMoving,
1.33 + EMemModelMultiple,
1.34 + EMemModelFlexible
1.35 + };
1.36 +
1.37 +enum TCpu
1.38 + {
1.39 + ECpuUnknown,
1.40 + ECpuArm,
1.41 + ECpuX86
1.42 + };
1.43 +
1.44 +
1.45 +#ifdef __KERNEL_MODE__
1.46 +
1.47 +// Memory Model Architecture
1.48 +
1.49 +#ifdef __CPU_X86
1.50 + const TUint KPageDirectorySize = 1024;
1.51 + const TUint KMaxNumberOfPageDirectories = 1024;
1.52 + const TUint KPsudoX86TTBCR = 512;
1.53 +
1.54 +#else
1.55 + const TUint KPageDirectorySize = 4096; // Full size (ttbr0+ttbr1)
1.56 + const TUint KMaxNumberOfPageDirectories = 256;
1.57 +#endif
1.58 +
1.59 +#if defined(__MEMMODEL_MOVING__)
1.60 + const TUint KPageDirectoryBase = 0x61000000;
1.61 + const TUint KPageTableBase = 0x62000000;
1.62 + const TMemModel KMemoryModel = EMemModelMoving;
1.63 +
1.64 +#elif defined(__MEMMODEL_MULTIPLE__)
1.65 + const TUint KPageDirectoryBase = 0xC1000000;
1.66 + const TUint KPageTableBase = 0xC2000000;
1.67 + const TMemModel KMemoryModel = EMemModelMultiple;
1.68 +
1.69 +#elif defined(__MEMMODEL_FLEXIBLE__)
1.70 + const TUint KPageDirectoryBase = 0xF4000000u;
1.71 + const TUint KPageTableBase = 0xF8000000u;
1.72 + const TMemModel KMemoryModel = EMemModelFlexible;
1.73 +
1.74 +#else // other memory model
1.75 + const TUint KPageDirectoryBase = 0x00000000;
1.76 + const TUint KPageTableBase = 0x00000000;
1.77 + const TMemModel KMemoryModel = EMemModelOther;
1.78 +#endif
1.79 +
1.80 +#endif
1.81 +
1.82 +
1.83 +
1.84 +class TCapsShadowV01
1.85 + {
1.86 +public:
1.87 + TVersion iVersion;
1.88 + };
1.89 +
1.90 + const TUint KGlobalPageDirectory=0xFFFFFFFF;
1.91 + const TUint KErrNoPageTable = 0x80000000;
1.92 + const TUint KPageOffsetMask = 0x7FFFFFFF;
1.93 +
1.94 +class RShadow : public RBusLogicalChannel
1.95 + {
1.96 +public:
1.97 + enum TControl
1.98 + {
1.99 + EControlAllocShadow,
1.100 + EControlFreeShadow,
1.101 + EControlWriteShadow,
1.102 + EControlFreezeShadow,
1.103 + EControlSetPriority,
1.104 + EControlRead,
1.105 + EControlMmuId,
1.106 + EControlCacheType,
1.107 + EControlMeasureKernStackUse,
1.108 + EControlMeasureKernHeapFree,
1.109 + EControlWalkHeap,
1.110 + EControlCallFunction,
1.111 + EControlAllocPhys,
1.112 + EControlFreePhys,
1.113 + EControlClaimPhys,
1.114 + EControlGetMemoryArchitecture,
1.115 + EControlGetMemModelInfo,
1.116 + EControlGetPdInfo
1.117 + };
1.118 +
1.119 +public:
1.120 + inline TInt Open();
1.121 + inline TInt Alloc(TUint anAddr); // allocate a shadow ROM page
1.122 + inline TInt Free(TUint anAddr); // free a shadow ROM page
1.123 + inline TInt Write(TUint anAddr, TAny* aSrc); // write to a shadow ROM page
1.124 + inline TInt Freeze(TUint anAddr); // freeze a shadow ROM page
1.125 + inline TInt SetPriority(TInt aHandle, TInt aPriority);
1.126 + inline TUint Read(TUint aLinAddr);
1.127 + inline TUint MmuId();
1.128 + inline TUint CacheType();
1.129 + inline TInt KernStackUsed();
1.130 + inline TInt KernHeapFree();
1.131 + inline void WalkHeap(TInt aThreadHandle);
1.132 + inline TInt CallFunction(TThreadFunction aFunction, TAny* aPtr);
1.133 + inline TInt AllocPhysicalRam(TUint32& aAddr, TInt aSize, TInt aAlign);
1.134 + inline TInt FreePhysicalRam(TUint32 aAddr, TInt aSize);
1.135 + inline TInt ClaimPhysicalRam(TUint32 aAddr, TInt aSize);
1.136 + inline void GetMemoryArchitecture(TCpu &aCpu, TUint &aCR);
1.137 + inline TMemModel GetMemModelInfo(TUint &aPageTable, TUint &aNumPds);
1.138 + inline TInt GetPdInfo(TUint aPdNo, TUint &aPdSize, TUint &aPdBase, TUint &aOffset);
1.139 + };
1.140 +
1.141 +
1.142 +#ifndef __KERNEL_MODE__
1.143 +inline TInt RShadow::Open()
1.144 + {
1.145 + return DoCreate(_L("Shadow"),TVersion(0,1,1),KNullUnit,NULL,NULL);
1.146 + }
1.147 +
1.148 +inline TInt RShadow::Alloc(TUint anAddr)
1.149 + { return DoControl(EControlAllocShadow,(TAny*)anAddr); }
1.150 +
1.151 +inline TInt RShadow::Free(TUint anAddr)
1.152 + { return DoControl(EControlFreeShadow,(TAny*)anAddr); }
1.153 +
1.154 +inline TInt RShadow::Write(TUint anAddr, TAny *aSrc)
1.155 + { return DoControl(EControlWriteShadow,(TAny*)anAddr,aSrc); }
1.156 +
1.157 +inline TInt RShadow::Freeze(TUint anAddr)
1.158 + { return DoControl(EControlFreezeShadow,(TAny*)anAddr); }
1.159 +
1.160 +inline TInt RShadow::SetPriority(TInt aHandle, TInt aPriority)
1.161 + { return DoControl(EControlSetPriority, (TAny*)aHandle, (TAny*)aPriority); }
1.162 +
1.163 +inline TUint RShadow::Read(TUint aLinAddr)
1.164 + { return DoControl(EControlRead, (TAny*)aLinAddr); }
1.165 +
1.166 +inline TUint RShadow::MmuId()
1.167 + { return DoControl(EControlMmuId); }
1.168 +
1.169 +inline TUint RShadow::CacheType()
1.170 + { return DoControl(EControlCacheType); }
1.171 +
1.172 +inline TInt RShadow::KernStackUsed()
1.173 + { return DoControl(EControlMeasureKernStackUse); }
1.174 +
1.175 +inline TInt RShadow::KernHeapFree()
1.176 + { return DoControl(EControlMeasureKernHeapFree); }
1.177 +
1.178 +inline void RShadow::WalkHeap(TInt aThreadHandle)
1.179 + { DoControl(EControlWalkHeap,(TAny*)aThreadHandle); }
1.180 +
1.181 +inline TInt RShadow::CallFunction(TThreadFunction aFunction, TAny* aPtr)
1.182 + { return DoControl(EControlCallFunction, (TAny*)aFunction, aPtr); }
1.183 +
1.184 +inline TInt RShadow::AllocPhysicalRam(TUint32& aAddr, TInt aSize, TInt aAlign)
1.185 + { TInt r=DoControl(EControlAllocPhys, (TAny*)aSize, (TAny*)aAlign); if (r>=0) aAddr=TUint32(r)<<4; return r<0?r:KErrNone; }
1.186 +
1.187 +inline TInt RShadow::FreePhysicalRam(TUint32 aAddr, TInt aSize)
1.188 + { return DoControl(EControlFreePhys, (TAny*)aAddr, (TAny*)aSize); }
1.189 +
1.190 +inline TInt RShadow::ClaimPhysicalRam(TUint32 aAddr, TInt aSize)
1.191 + { return DoControl(EControlClaimPhys, (TAny*)aAddr, (TAny*)aSize); }
1.192 +
1.193 +inline void RShadow::GetMemoryArchitecture(TCpu &aCpu, TUint &aCR)
1.194 + { DoControl(EControlGetMemoryArchitecture, (TAny*) &aCpu, (TAny*) &aCR); }
1.195 +
1.196 +inline TMemModel RShadow::GetMemModelInfo(TUint &aPageTable, TUint &aNumPds)
1.197 + { return (TMemModel) DoControl(EControlGetMemModelInfo,(TAny*) &aPageTable, (TAny*) &aNumPds); }
1.198 +
1.199 +inline TInt RShadow::GetPdInfo(TUint aPdNo, TUint &aPdSize, TUint &aPdBase, TUint &aOffset)
1.200 + {
1.201 + aPdSize=aPdNo;
1.202 + TUint ret= (TUint) DoControl(EControlGetPdInfo,(TAny*) &aPdSize, (TAny*) &aPdBase);
1.203 + aOffset = ret & KPageOffsetMask;
1.204 + return (ret & KErrNoPageTable)?KErrNotFound:KErrNone;
1.205 + }
1.206 +
1.207 +#endif
1.208 +
1.209 +#endif