1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/os/kernelhwsrv/kernel/eka/memmodel/epoc/moving/arm/xkernel.cia Fri Jun 15 03:10:57 2012 +0200
1.3 @@ -0,0 +1,356 @@
1.4 +// Copyright (c) 1994-2009 Nokia Corporation and/or its subsidiary(-ies).
1.5 +// All rights reserved.
1.6 +// This component and the accompanying materials are made available
1.7 +// under the terms of the License "Eclipse Public License v1.0"
1.8 +// which accompanies this distribution, and is available
1.9 +// at the URL "http://www.eclipse.org/legal/epl-v10.html".
1.10 +//
1.11 +// Initial Contributors:
1.12 +// Nokia Corporation - initial contribution.
1.13 +//
1.14 +// Contributors:
1.15 +//
1.16 +// Description:
1.17 +// e32\memmodel\epoc\moving\arm\xkernel.cia
1.18 +//
1.19 +//
1.20 +
1.21 +#include <e32cia.h>
1.22 +#include <arm_mem.h>
1.23 +
1.24 +__NAKED__ void DArmPlatChunk::MoveHomePdes(TLinAddr /*aOldAddr*/, TLinAddr /*aNewAddr*/)
1.25 + {
1.26 + asm("mov r2, r2, lsr #20 "); // r2=pde index for new addr
1.27 + asm("subs r2, r2, r1, lsr #20 "); // subtract pde index for old addr
1.28 + __JUMP(eq,lr); // if zero, nothing to do
1.29 + asm("ldr r1, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iNumPdes));
1.30 + asm("cmp r1, #0 ");
1.31 + __JUMP(eq,lr); // if chunk empty, nothing to do
1.32 + asm("ldr r1, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iHomePdes));
1.33 + asm("add r1, r1, r2, asl #2 "); // move home pde address
1.34 + asm("str r1, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iHomePdes));
1.35 + __JUMP(,lr);
1.36 + }
1.37 +
1.38 +__NAKED__ void DArmPlatChunk::MoveCurrentPdes(TLinAddr /*aOldAddr*/, TLinAddr /*aNewAddr*/)
1.39 + {
1.40 + asm("mov r2, r2, lsr #20 "); // r2=pde index for new addr
1.41 + asm("subs r2, r2, r1, lsr #20 "); // subtract pde index for old addr
1.42 + __JUMP(eq,lr); // if zero, nothing to do
1.43 + asm("ldr r1, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iNumPdes));
1.44 + asm("cmp r1, #0 ");
1.45 + __JUMP(eq,lr); // if chunk empty, nothing to do
1.46 + asm("ldr r1, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iPdes));
1.47 + asm("add r1, r1, r2, asl #2 "); // move current pde address
1.48 + asm("str r1, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iPdes));
1.49 + __JUMP(,lr);
1.50 + }
1.51 +
1.52 +__NAKED__ void DArmPlatChunk::AddPde(TInt /*aOffset*/)
1.53 + {
1.54 + asm("mov r1, r1, lsr #20 "); // r1=pde number
1.55 + asm("ldr r2, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iMaxSize));
1.56 + asm("cmp r2, #0x02000000 ");
1.57 + asm("ldr r3, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iPdeBitMap));
1.58 + asm("bhi add_pde_large ");
1.59 + asm("mov ip, #1 ");
1.60 + asm("orr r3, r3, ip, lsl r1 "); // set bit in bitmap
1.61 + asm("str r3, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iPdeBitMap));
1.62 + asm("b scan_small_bitmap ");
1.63 +
1.64 + asm("add_pde_large: ");
1.65 + asm("stmfd sp!, {r4,lr} ");
1.66 + asm("mov lr, r1, lsr #5 "); // lr=word number in bitmap
1.67 + asm("and r1, r1, #31 "); // r1=bit number in word
1.68 + asm("ldr r4, [r3, lr, lsl #2] ");
1.69 + asm("mov ip, #1 ");
1.70 + asm("orr r4, r4, ip, lsl r1 ");
1.71 + asm("str r4, [r3, lr, lsl #2] "); // set bit in bitmap
1.72 + asm("b scan_large_bitmap ");
1.73 + }
1.74 +
1.75 +__NAKED__ void DArmPlatChunk::RemovePde(TInt /*anOffset*/)
1.76 + {
1.77 + asm("mov r1, r1, lsr #20 "); // r1=pde number
1.78 + asm("ldr r2, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iMaxSize));
1.79 + asm("cmp r2, #0x02000000 ");
1.80 + asm("ldr r3, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iPdeBitMap));
1.81 + asm("bhi rem_pde_large ");
1.82 + asm("mov ip, #1 ");
1.83 + asm("bics r3, r3, ip, lsl r1 "); // clear bit in bitmap
1.84 + asm("str r3, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iPdeBitMap));
1.85 + asm("beq empty_chunk "); // if chunk empty, skip rest
1.86 +
1.87 + asm("scan_small_bitmap: "); // r3 contains nonzero bitmap
1.88 +#ifdef __CPU_ARM_HAS_CLZ
1.89 + asm("sub r2, r3, #1 "); // ip will hold index of first pde
1.90 + asm("eor r2, r2, r3 ");
1.91 + CLZ(12,2);
1.92 + asm("rsb r12, r12, #31 ");
1.93 + asm("mov r3, r3, lsr r12 "); // shift bitmap so bit 0 set
1.94 + CLZ(1, 3);
1.95 + asm("rsb r1, r1, #32 "); // r1 will be 1+most significant 1 in r3
1.96 +#else
1.97 + asm("mov ip, #0 "); // ip will hold index of first pde
1.98 + asm("movs r2, r3, lsl #16 "); // test if bottom 16 bits zero
1.99 + asm("moveq r3, r3, lsr #16 "); // if bottom 16 zero, shift right by 16
1.100 + asm("addeq ip, ip, #16 "); // and add 16 to lsb index
1.101 + asm("tst r3, #0xff ");
1.102 + asm("moveq r3, r3, lsr #8 ");
1.103 + asm("addeq ip, ip, #8 ");
1.104 + asm("tst r3, #0x0f ");
1.105 + asm("moveq r3, r3, lsr #4 ");
1.106 + asm("addeq ip, ip, #4 ");
1.107 + asm("tst r3, #0x03 ");
1.108 + asm("moveq r3, r3, lsr #2 ");
1.109 + asm("addeq ip, ip, #2 ");
1.110 + asm("tst r3, #0x01 ");
1.111 + asm("moveq r3, r3, lsr #1 ");
1.112 + asm("addeq ip, ip, #1 "); // ip=number of right shifts applied, r3 bit 0 set
1.113 + asm("mov r1, #32 "); // r1 will be 1+most significant 1 in r3
1.114 + asm("cmp r3, #0x00010000 ");
1.115 + asm("movcc r3, r3, lsl #16 ");
1.116 + asm("subcc r1, r1, #16 ");
1.117 + asm("cmp r3, #0x01000000 ");
1.118 + asm("movcc r3, r3, lsl #8 ");
1.119 + asm("subcc r1, r1, #8 ");
1.120 + asm("cmp r3, #0x10000000 ");
1.121 + asm("movcc r3, r3, lsl #4 ");
1.122 + asm("subcc r1, r1, #4 ");
1.123 + asm("cmp r3, #0x40000000 ");
1.124 + asm("movcc r3, r3, lsl #2 ");
1.125 + asm("subcc r1, r1, #2 ");
1.126 + asm("cmp r3, #0x80000000 ");
1.127 + asm("movcc r3, r3, lsl #1 ");
1.128 + asm("subcc r1, r1, #1 ");
1.129 +#endif
1.130 +
1.131 + asm("scan_bitmap_end: ");
1.132 + asm("str r1, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iNumPdes)); // r1 gives number of PDEs in range
1.133 + asm("ldr r2, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iBase));
1.134 + asm("add r2, ip, r2, lsr #20 "); // r2=pde index of first current pde
1.135 + asm("mov r2, r2, lsl #2 ");
1.136 + asm("add r2, r2, #%a0" : : "i" ((TInt)KPageDirectoryBase)); // r2->first current pde
1.137 + asm("str r2, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iPdes));
1.138 + asm("ldr r2, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iHomeBase));
1.139 + asm("add r2, ip, r2, lsr #20 "); // r2=pde index of first home pde
1.140 + asm("mov r2, r2, lsl #2 ");
1.141 + asm("add r2, r2, #%a0" : : "i" ((TInt)KPageDirectoryBase)); // r2->first home pde
1.142 + asm("str r2, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iHomePdes));
1.143 + __JUMP(,lr);
1.144 +
1.145 + asm("empty_chunk: ");
1.146 + asm("mov r1, #0 ");
1.147 + asm("str r1, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iNumPdes));
1.148 + asm("str r1, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iPdes));
1.149 + asm("str r1, [r0, #%a0]" : : "i" _FOFF(DMemModelChunk,iHomePdes));
1.150 + __JUMP(,lr);
1.151 +
1.152 + asm("rem_pde_large: ");
1.153 + asm("stmfd sp!, {r4,lr} ");
1.154 + asm("mov lr, r1, lsr #5 "); // lr=word number in bitmap
1.155 + asm("and r1, r1, #31 "); // r1=bit number in word
1.156 + asm("ldr r4, [r3, lr, lsl #2] ");
1.157 + asm("mov ip, #1 ");
1.158 + asm("bic r4, r4, ip, lsl r1 ");
1.159 + asm("str r4, [r3, lr, lsl #2] "); // set bit in bitmap
1.160 +
1.161 + asm("scan_large_bitmap: ");
1.162 + // r0=this, r2=max size, r3->pde bit map
1.163 + asm("add r2, r2, #0x1f00000 ");
1.164 + asm("mov r2, r2, lsr #25 "); // r2=number of words in bitmap
1.165 + asm("add r2, r3, r2, lsl #2 "); // r2=bitmap end address
1.166 + asm("mov r4, r3 "); // save bitmap start address
1.167 +
1.168 + asm("scan_large_1: ");
1.169 + asm("ldr ip, [r3], #4 ");
1.170 + asm("cmp ip, #0 ");
1.171 + asm("bne scan_large_2 "); // found non-empty word
1.172 + asm("cmp r3, r2 ");
1.173 + asm("bne scan_large_1 "); // if not reached end, do next word
1.174 + asm("ldmfd sp!, {r4,lr} ");
1.175 + asm("b empty_chunk "); // branch if no bits set
1.176 +
1.177 + asm("scan_large_2: ");
1.178 + asm("sub r1, r3, r4 ");
1.179 + asm("sub r1, r1, #4 ");
1.180 + asm("mov r1, r1, lsl #3 "); // r1=bit number of lsb of this word
1.181 +#ifdef __CPU_ARM_HAS_CLZ
1.182 + asm("sub lr, ip, #1 "); // ip will hold index of first pde
1.183 + asm("eor ip, lr, ip ");
1.184 + CLZ(12, 12);
1.185 + asm("rsb ip, ip, #31 ");
1.186 + asm("add r1, r1, ip "); // r1 now = first occupied pde offset
1.187 +#else
1.188 + asm("movs lr, ip, lsl #16 ");
1.189 + asm("moveq ip, ip, lsr #16 ");
1.190 + asm("addeq r1, r1, #16 ");
1.191 + asm("tst ip, #0xff ");
1.192 + asm("moveq ip, ip, lsr #8 ");
1.193 + asm("addeq r1, r1, #8 ");
1.194 + asm("tst ip, #0x0f ");
1.195 + asm("moveq ip, ip, lsr #4 ");
1.196 + asm("addeq r1, r1, #4 ");
1.197 + asm("tst ip, #0x03 ");
1.198 + asm("moveq ip, ip, lsr #2 ");
1.199 + asm("addeq r1, r1, #2 ");
1.200 + asm("tst ip, #0x01 ");
1.201 + asm("moveq ip, ip, lsr #1 ");
1.202 + asm("addeq r1, r1, #1 "); // r1 now = first occupied pde offset
1.203 +#endif
1.204 +
1.205 + asm("scan_large_3: ");
1.206 + asm("ldr ip, [r2, #-4]! "); // fetch words from end of bitmap
1.207 + asm("cmp ip, #0 ");
1.208 + asm("beq scan_large_3 "); // we know there is at least one non-zero word
1.209 + asm("sub r2, r2, r4 ");
1.210 + asm("mov r2, r2, lsl #3 "); // r2=bit number of lsb of this word
1.211 +#ifdef __CPU_ARM_HAS_CLZ
1.212 + CLZ(12, 12);
1.213 + asm("rsb ip, ip, #31 ");
1.214 + asm("add r2, r2, ip "); // r2 now = last occupied pde offset
1.215 +#else
1.216 + asm("movs lr, ip, lsr #16 ");
1.217 + asm("movne ip, lr ");
1.218 + asm("addne r2, r2, #16 ");
1.219 + asm("movs lr, ip, lsr #8 ");
1.220 + asm("movne ip, lr ");
1.221 + asm("addne r2, r2, #8 ");
1.222 + asm("movs lr, ip, lsr #4 ");
1.223 + asm("movne ip, lr ");
1.224 + asm("addne r2, r2, #4 ");
1.225 + asm("movs lr, ip, lsr #2 ");
1.226 + asm("movne ip, lr ");
1.227 + asm("addne r2, r2, #2 ");
1.228 + asm("movs lr, ip, lsr #1 ");
1.229 + asm("movne ip, lr ");
1.230 + asm("addne r2, r2, #1 "); // r2 now = last occupied pde offset
1.231 +#endif
1.232 + asm("sub r3, r2, r1 "); // r3=last-first
1.233 + asm("mov ip, r1 "); // ip=first
1.234 + asm("add r1, r3, #1 "); // r1 = number of pdes in range
1.235 + asm("ldmfd sp!, {r4,lr} ");
1.236 + asm("b scan_bitmap_end "); // go back to set pde info
1.237 + }
1.238 +
1.239 +__NAKED__ TBool Exc::IsMagic(TLinAddr /*anAddress*/)
1.240 +//
1.241 +// Return TRUE if anAddress is a 'magic' exception handling instruction
1.242 +//
1.243 + {
1.244 + asm("adr r1, __magic_addresses "); // r1 points to list of magic addresses
1.245 + asm("is_magic_1: ");
1.246 + asm("ldr r2, [r1], #4 "); // r2=next magic address to check
1.247 + asm("cmp r2, r0 "); // is r0=magic address?
1.248 + asm("cmpne r2, #0 "); // if not, have we reached end of list?
1.249 + asm("bne is_magic_1 "); // if neither, check next address
1.250 + asm("movs r0, r2 "); // r0=0 if not magic, r0 unchanged if magic
1.251 + __JUMP(,lr);
1.252 +
1.253 + asm("__magic_addresses: ");
1.254 + asm(".word __magic_address_kusaferead ");
1.255 + asm(".word __magic_address_saferead ");
1.256 + asm(".word __magic_address_kusafewrite ");
1.257 + asm(".word __magic_address_safewrite ");
1.258 + asm(".word __magic_address_msg_lookup_1 "); // in preprocess handler
1.259 + asm(".word __magic_address_readdesheader1 ");
1.260 + asm(".word __magic_address_readdesheader2 ");
1.261 + asm(".word __magic_address_readdesheader3 ");
1.262 +#ifdef __MESSAGE_MACHINE_CODED_2__
1.263 + asm(".word __magic_address_msg_lookup_2 ");
1.264 +#endif
1.265 +#ifdef __CLIENT_REQUEST_MACHINE_CODED__
1.266 + asm(".word __magic_address_client_request_callback");
1.267 + asm(".word __magic_address_svr_accept_1 ");
1.268 + asm(".word __magic_address_svr_accept_2 ");
1.269 + asm(".word __magic_address_svr_accept_3 ");
1.270 + asm(".word __magic_address_svr_accept_4 ");
1.271 + asm(".word __magic_address_svr_accept_5 ");
1.272 + asm(".word __magic_address_svr_accept_6 ");
1.273 + asm(".word __magic_address_svr_accept_7 ");
1.274 + asm(".word __magic_address_svr_accept_8 ");
1.275 +#endif
1.276 +#ifdef __REQUEST_COMPLETE_MACHINE_CODED__
1.277 + asm(".word __magic_address_reqc ");
1.278 + asm(".word __magic_address_kern_request_complete ");
1.279 +#endif
1.280 + // list terminator
1.281 + asm(".word 0 ");
1.282 + }
1.283 +
1.284 +__NAKED__ TAny* MM::CurrentAddress(DThread* /*aThread*/, const TAny* /*aPtr*/, TInt /*aSize*/, TBool /*aWrite*/)
1.285 +//
1.286 +// Return the current base address corresponding to run address region
1.287 +// aPtr to aPtr+aBase-1 in the context of aThread.
1.288 +// aWrite indicates whether the address is intended for writing (aWrite=TRUE) or reading (aWrite=FALSE).
1.289 +// Return NULL if the address range is not all accessible to aThread for access type specified by aWrite.
1.290 +// aWrite=FALSE allows access to the ROM and RAM-loaded code chunks whereas aWrite=TRUE disallows these.
1.291 +// NOTE THIS FUNCTION CONTAINS KNOWLEDGE OF FIXED LINEAR ADDRESSES (the RAM drive and HIVECS area).
1.292 +//
1.293 +// ALLERT! the ip register returns a pointer to the chunk which contains the addresses (null if none)
1.294 +//
1.295 + {
1.296 + asm("CurrentAddress:");
1.297 + asm("ldr r0, [r0, #%a0]" : : "i" _FOFF(DThread, iOwningProcess));
1.298 + asm("stmfd sp!, {r4,r5,lr} ");
1.299 + asm("eor r4, r1, #0x40000000 "); // r4<0x20000000u for RAM drive
1.300 + asm("cmp r4, #0x20000000 "); // Check for RAM drive - ASSUMES RAM DRIVE IS AT 40000000-5FFFFFFF
1.301 + asm("ldr lr, [r0, #%a0]!" : : "i" _FOFF(DMemModelProcess, iNumChunks)); // step r0 on to iChunks[0]
1.302 + asm("bcc lookup_chunk_3 "); // branch if RAM drive
1.303 + asm("subs lr, lr, #1 ");
1.304 + asm("bcc lookup_chunk_2 "); // no chunks so do read check
1.305 + asm("lookup_chunk_1: ");
1.306 + asm("ldmib r0!, {r4,ip} "); // r4=data section base, ip=chunk ptr
1.307 + asm("add r0, r0, #4 "); // move to next entry
1.308 + asm("subs r4, r1, r4 "); // r4=offset
1.309 + asm("ldrcs r5, [ip, #%a0]" : : "i" _FOFF(DChunk,iMaxSize)); // if offset>=0, r5=chunk max size
1.310 + asm("cmpcs r4, r5 "); // and compare offset to max size
1.311 + asm("subcss lr, lr, #1 "); // if offset>=max size, decrement counter
1.312 + asm("bcs lookup_chunk_1 "); // loop if more chunks to check
1.313 + asm("cmp lr, #0 "); // did we find chunk?
1.314 + asm("ldrge r0, [ip, #%a0]" : : "i" _FOFF(DMemModelChunk,iHomeRegionOffset));
1.315 + asm("ldrge r5, [ip, #%a0]" : : "i" _FOFF(DMemModelChunk,iHomeRegionSize));
1.316 + asm("ldrge lr, [ip, #%a0]" : : "i" _FOFF(DChunk,iBase));
1.317 + asm("cmpge r4, r0 "); // if chunk not found or offset<iHomeRegionOffset, do read check
1.318 + asm("blt lookup_chunk_2 ");
1.319 + asm("add r0, r0, r5 "); // r0=home region offset+home region size
1.320 + asm("add r5, r4, r2 "); // r5=offset after end of block
1.321 + asm("cmp r5, r0 "); // check if offset after end<=iHomeRegionOffset+iHomeRegionSize
1.322 + asm("addle r0, lr, r4 "); // if so, r0=current chunk base + offset
1.323 + asm("ldmlefd sp!, {r4,r5,pc} "); // and we are done
1.324 +
1.325 + asm("lookup_chunk_2: "); // come here if address not found in a chunk
1.326 + asm("mov ip, #0"); // ip = 0 to indicate chunk not found
1.327 + asm("ldr r4, __code_limit ");
1.328 + asm("mov r0, #0 ");
1.329 + asm("cmn r1, #0x00100000 "); // address in hivecs area?
1.330 + asm("ldr r4, [r4] "); // r4 = lowest legitimate code address
1.331 + asm("ldmcsfd sp!, {r4,r5,pc} "); // if in hivecs, return NULL
1.332 + asm("cmp r3, #0 "); // is this address intended for writing?
1.333 + asm("ldmnefd sp!, {r4,r5,pc} "); // if it is, return NULL
1.334 + asm("cmp r1, r4 "); // check if address is in RAM-loaded code or ROM
1.335 + asm("ldmccfd sp!, {r4,r5,pc} "); // if not, return NULL
1.336 + asm("adds r4, r1, r2 "); // r4 = end address of requested region
1.337 + asm("ldmcsfd sp!, {r4,r5,pc} "); // if it wrapped, return NULL
1.338 + asm("cmn r4, #0x100000 "); // if it didn't wrap, check if it reaches into hivecs area
1.339 + asm("movls r0, r1 "); // if not, addr is OK for reading
1.340 + asm("ldmfd sp!, {r4,r5,pc} ");
1.341 +
1.342 + asm("lookup_chunk_3: "); // come here if address in RAM drive
1.343 + asm("mov ip, #0"); // ip = 0 to indicate chunk not found
1.344 + asm("ldr r3, __f32 "); // r3=&K::TheFileServerProcess
1.345 + asm("sub r4, r0, #%a0" : : "i" _FOFF(DMemModelProcess, iNumChunks)); // r4=aThread->iOwningProcess
1.346 + asm("mov r0, #0 ");
1.347 + asm("ldr r3, [r3] "); // r3=K::TheFileServerProcess
1.348 + asm("add r5, r1, r2 "); // r5=end address of requested region + 1
1.349 + asm("cmp r5, #0x60000000 "); // is this past the end of the RAM drive? ASSUMES ADDRESS OF RAM DRIVE
1.350 + asm("cmpls r3, r4 "); // if not, is aThread part of F32?
1.351 + asm("moveq r0, r1 "); // if it is, allow the access and return the address unaltered
1.352 + asm("ldmfd sp!, {r4,r5,pc} "); // else return NULL
1.353 +
1.354 + asm("__f32: ");
1.355 + asm(".word " CSM_ZN1K20TheFileServerProcessE );
1.356 + asm("__code_limit: ");
1.357 + asm(".word %a0" : : "i" ((TInt)&::TheMmu.iUserCodeBase) );
1.358 + }
1.359 +