os/kernelhwsrv/kernel/eka/memmodel/epoc/direct/arm/xinit.cpp
changeset 0 bde4ae8d615e
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/os/kernelhwsrv/kernel/eka/memmodel/epoc/direct/arm/xinit.cpp	Fri Jun 15 03:10:57 2012 +0200
     1.3 @@ -0,0 +1,90 @@
     1.4 +// Copyright (c) 1996-2009 Nokia Corporation and/or its subsidiary(-ies).
     1.5 +// All rights reserved.
     1.6 +// This component and the accompanying materials are made available
     1.7 +// under the terms of the License "Eclipse Public License v1.0"
     1.8 +// which accompanies this distribution, and is available
     1.9 +// at the URL "http://www.eclipse.org/legal/epl-v10.html".
    1.10 +//
    1.11 +// Initial Contributors:
    1.12 +// Nokia Corporation - initial contribution.
    1.13 +//
    1.14 +// Contributors:
    1.15 +//
    1.16 +// Description:
    1.17 +// e32\memmodel\epoc\direct\arm\xinit.cpp
    1.18 +// 
    1.19 +//
    1.20 +
    1.21 +#include "arm_mem.h"
    1.22 +#include <e32uid.h>
    1.23 +#include <kernel/cache.h>
    1.24 +
    1.25 +void MM::Init1()
    1.26 +	{
    1.27 +	__KTRACE_OPT(KBOOT,Kern::Printf("MM::Init1()"));
    1.28 +
    1.29 +	MM::RamBlockSize=0x1000;
    1.30 +	MM::RamBlockShift=12;
    1.31 +
    1.32 +	PP::MaxUserThreadStack=0x14000;			// 80K - STDLIB asks for 64K for PosixServer!!!!
    1.33 +	PP::UserThreadStackGuard=0x2000;		// 8K
    1.34 +	PP::MaxStackSpacePerProcess=0x200000;	// 2Mb
    1.35 +	K::SupervisorThreadStackSize=0x1000;	// 4K
    1.36 +	PP::SupervisorThreadStackGuard=0x1000;	// 4K
    1.37 +
    1.38 +	K::MachineConfig=(TMachineConfig*)(((TUint8*)SuperPageAddress)+0x800);	// HACK!!
    1.39 +	K::MaxMemCopyInOneGo = KDefaultMaxMemCopyInOneGo;
    1.40 +	PP::RamDriveStartAddress = TheSuperPage().iKernelLimit;
    1.41 +	PP::RamDriveMaxSize = TheRomHeader().iUserDataAddress - PP::RamDriveStartAddress;
    1.42 +
    1.43 +	__KTRACE_OPT(KBOOT,Kern::Printf("RamDriveBase %08x RamDriveMaxSize %08x",PP::RamDriveStartAddress,PP::RamDriveMaxSize));
    1.44 +
    1.45 +#ifdef __CPU_ARM_USE_DOMAINS
    1.46 +	Arm::DefaultDomainAccess=Arm::Dacr();
    1.47 +#endif
    1.48 +
    1.49 +	K::MemModelAttributes=EMemModelTypeDirect|EMemModelAttrNonExProt|EMemModelAttrKernProt|
    1.50 +							EMemModelAttrWriteProt|EMemModelAttrSvKernProt;
    1.51 +
    1.52 +	__KTRACE_OPT(KBOOT,Kern::Printf("K::MaxMemCopyInOneGo=0x%x",K::MaxMemCopyInOneGo));
    1.53 +	}
    1.54 +
    1.55 +#ifdef __CPU_HAS_CACHE
    1.56 +// Set up virtual addresses used for cache flushing if this is
    1.57 +// done by data read or line allocate
    1.58 +void M::SetupCacheFlushPtr(TInt aCache, SCacheInfo& aInfo)
    1.59 +	{
    1.60 +#if defined(__CPU_CACHE_FLUSH_BY_DATA_READ) || defined(__CPU_CACHE_FLUSH_BY_LINE_ALLOC)
    1.61 +#ifdef __CPU_HAS_ALT_D_CACHE
    1.62 +	if (aCache==KCacheNumAltD)
    1.63 +		{
    1.64 +		aInfo.iFlushPtr=TheSuperPage().iAltDCacheFlushArea;
    1.65 +		aInfo.iFlushMask=TheSuperPage().iAltDCacheFlushWrap;
    1.66 +		}
    1.67 +#endif
    1.68 +	if (aCache==KCacheNumD)
    1.69 +		{
    1.70 +		aInfo.iFlushPtr=TheSuperPage().iDCacheFlushArea;
    1.71 +		aInfo.iFlushMask=TheSuperPage().iDCacheFlushWrap;
    1.72 +		}
    1.73 +#endif
    1.74 +	}
    1.75 +#endif
    1.76 +
    1.77 +#ifdef __SMP__
    1.78 +void M::GetAPBootInfo(TInt aCpu, volatile SAPBootInfo* aInfo)
    1.79 +	{
    1.80 +	volatile SArmAPBootInfo& info = *(volatile SArmAPBootInfo*)aInfo;
    1.81 +	TSubScheduler& ss = SubScheduler();
    1.82 +	TUint32 delta = aCpu*0x2000;
    1.83 +	info.iInitR13Fiq = TLinAddr(ss.i_FiqStackTop) + delta;
    1.84 +	info.iInitR13Irq = TLinAddr(ss.i_IrqStackTop) + delta;
    1.85 +	info.iInitR13Abt = TLinAddr(ss.i_AbtStackTop) + delta;
    1.86 +	info.iInitR13Und = TLinAddr(ss.i_UndStackTop) + delta;
    1.87 +	}
    1.88 +
    1.89 +void M::Init2AP()
    1.90 +	{
    1.91 +	__KTRACE_OPT(KBOOT,Kern::Printf("M::Init2AP()"));
    1.92 +	}
    1.93 +#endif