1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/os/kernelhwsrv/kernel/eka/include/nkern/x86/nk_plat.h	Fri Jun 15 03:10:57 2012 +0200
     1.3 @@ -0,0 +1,101 @@
     1.4 +// Copyright (c) 1998-2009 Nokia Corporation and/or its subsidiary(-ies).
     1.5 +// All rights reserved.
     1.6 +// This component and the accompanying materials are made available
     1.7 +// under the terms of the License "Eclipse Public License v1.0"
     1.8 +// which accompanies this distribution, and is available
     1.9 +// at the URL "http://www.eclipse.org/legal/epl-v10.html".
    1.10 +//
    1.11 +// Initial Contributors:
    1.12 +// Nokia Corporation - initial contribution.
    1.13 +//
    1.14 +// Contributors:
    1.15 +//
    1.16 +// Description:
    1.17 +// e32\include\nkern\x86\nk_plat.h
    1.18 +// 
    1.19 +// WARNING: This file contains some APIs which are internal and are subject
    1.20 +//          to change without notice. Such APIs should therefore not be used
    1.21 +//          outside the Kernel and Hardware Services package.
    1.22 +//
    1.23 +
    1.24 +/**
    1.25 + @file
    1.26 + @internalComponent
    1.27 +*/
    1.28 +
    1.29 +#ifndef __NK_X86_H__
    1.30 +#define __NK_X86_H__
    1.31 +#include <nk_cpu.h>
    1.32 +
    1.33 +#define IRQ_STACK_SIZE	1024
    1.34 +
    1.35 +//#define __SCHEDULER_MACHINE_CODED__
    1.36 +//#define __DFC_MACHINE_CODED__
    1.37 +//#define __MSTIM_MACHINE_CODED__
    1.38 +//#define __PRI_LIST_MACHINE_CODED__
    1.39 +//#define __FAST_SEM_MACHINE_CODED__
    1.40 +//#define __FAST_MUTEX_MACHINE_CODED__
    1.41 +
    1.42 +// TScheduler member data
    1.43 +#define	i_ExcInfo			iExtras[15]		// pointer to exception info for crash debugger
    1.44 +
    1.45 +class TX86RegSet;
    1.46 +class NThread : public NThreadBase
    1.47 +	{
    1.48 +public:
    1.49 +	TInt Create(SNThreadCreateInfo& anInfo, TBool aInitial);
    1.50 +	inline void Stillborn()
    1.51 +		{}
    1.52 +	void GetUserContext(TX86RegSet& aContext);
    1.53 +	void ModifyUsp(TLinAddr aUsp);
    1.54 +public:
    1.55 +	TUint32	i_NThread_Pad1;
    1.56 +	TUint64	iCoprocessorState[64];	// state of FPU, SSE, SSE2
    1.57 +	};
    1.58 +
    1.59 +__ASSERT_COMPILE(!(_FOFF(NThread,iCoprocessorState)&7));
    1.60 +
    1.61 +// Positions of registers on stack, relative to saved SP
    1.62 +struct SThreadStack
    1.63 +	{
    1.64 +	TUint32 iCR0;
    1.65 +	TUint32 iEbx;
    1.66 +	TUint32 iEsi;
    1.67 +	TUint32 iEdi;
    1.68 +	TUint32 iEbp;
    1.69 +	TUint32 iGs;
    1.70 +	TUint32 iFs;
    1.71 +	TUint32 iReschedFlag;
    1.72 +	TUint32 iEip;
    1.73 +	};
    1.74 +
    1.75 +extern "C" {
    1.76 +GLREF_D TUint32 X86_IrqStack[IRQ_STACK_SIZE/4];
    1.77 +GLREF_D TLinAddr X86_IrqHandler;
    1.78 +GLREF_D TInt X86_IrqNestCount;
    1.79 +GLREF_D SCpuIdleHandler CpuIdleHandler;
    1.80 +GLREF_D TBool X86_UseGlobalPTEs;
    1.81 +GLREF_D TUint64 DefaultCoprocessorState[64];
    1.82 +}
    1.83 +
    1.84 +
    1.85 +/** Ensure the ordering of explicit memory writes
    1.86 +
    1.87 +	On x86 this is a no-op
    1.88 +*/
    1.89 +#define	wmb()
    1.90 +#define smp_wmb()
    1.91 +
    1.92 +/** Ensure the ordering of explicit memory accesses
    1.93 +
    1.94 +	On x86 any instruction with the LOCK prefix does this
    1.95 +*/
    1.96 +#ifdef __GCC32__
    1.97 +#define	mb()	__asm__ __volatile__("lock add dword ptr [esp], 0" : : : "memory")
    1.98 +#else
    1.99 +#define	mb()	do { _asm lock add dword ptr [esp], 0 } while (0)
   1.100 +#endif
   1.101 +#define smp_mb()
   1.102 +
   1.103 +// End of file
   1.104 +#endif