1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/os/kernelhwsrv/kernel/eka/include/memmodel/epoc/plat_priv.h Fri Jun 15 03:10:57 2012 +0200
1.3 @@ -0,0 +1,234 @@
1.4 +// Copyright (c) 1998-2009 Nokia Corporation and/or its subsidiary(-ies).
1.5 +// All rights reserved.
1.6 +// This component and the accompanying materials are made available
1.7 +// under the terms of the License "Eclipse Public License v1.0"
1.8 +// which accompanies this distribution, and is available
1.9 +// at the URL "http://www.eclipse.org/legal/epl-v10.html".
1.10 +//
1.11 +// Initial Contributors:
1.12 +// Nokia Corporation - initial contribution.
1.13 +//
1.14 +// Contributors:
1.15 +//
1.16 +// Description:
1.17 +// e32\include\memmodel\epoc\plat_priv.h
1.18 +//
1.19 +// WARNING: This file contains some APIs which are internal and are subject
1.20 +// to change without notice. Such APIs should therefore not be used
1.21 +// outside the Kernel and Hardware Services package.
1.22 +//
1.23 +
1.24 +#ifndef __M32KERN_H__
1.25 +#define __M32KERN_H__
1.26 +#include <kernel/kern_priv.h>
1.27 +#include <platform.h>
1.28 +#include <e32def_private.h>
1.29 +
1.30 +/** Hardware Variant Discriminator
1.31 +
1.32 +@internalTechnology
1.33 +*/
1.34 +class THardwareVariant
1.35 + {
1.36 +public:
1.37 + inline THardwareVariant();
1.38 + inline THardwareVariant(TUint aVariant);
1.39 + inline operator TUint();
1.40 + inline TBool IsIndependent();
1.41 + inline TBool IsCpu();
1.42 + inline TBool IsCompatibleWith(TUint aCpu, TUint aAsic, TUint aVMask);
1.43 +private:
1.44 + inline TUint Layer();
1.45 + inline TUint Parent();
1.46 + inline TUint VMask();
1.47 +private:
1.48 + TUint iVariant;
1.49 + };
1.50 +
1.51 +/**
1.52 +@internalTechnology
1.53 +*/
1.54 +inline THardwareVariant::THardwareVariant()
1.55 + {iVariant=0x01000000;}
1.56 +
1.57 +/**
1.58 +@internalTechnology
1.59 +*/
1.60 +inline THardwareVariant::THardwareVariant(TUint aVariant)
1.61 + {iVariant=aVariant;}
1.62 +
1.63 +/**
1.64 +@internalTechnology
1.65 +*/
1.66 +inline THardwareVariant::operator TUint()
1.67 + {return iVariant;}
1.68 +
1.69 +/**
1.70 +@internalTechnology
1.71 +*/
1.72 +inline TUint THardwareVariant::Layer()
1.73 + {return iVariant>>24;}
1.74 +
1.75 +/**
1.76 +@internalTechnology
1.77 +*/
1.78 +inline TUint THardwareVariant::Parent()
1.79 + {return (iVariant>>16)&0xff;}
1.80 +
1.81 +/**
1.82 +@internalTechnology
1.83 +*/
1.84 +inline TUint THardwareVariant::VMask()
1.85 + {return iVariant&0xffff;}
1.86 +
1.87 +/**
1.88 +@internalTechnology
1.89 +*/
1.90 +inline TBool THardwareVariant::IsIndependent()
1.91 + {return (Layer()<=3);}
1.92 +
1.93 +/**
1.94 +@internalTechnology
1.95 +*/
1.96 +inline TBool THardwareVariant::IsCpu()
1.97 + {return (Parent()==3);}
1.98 +
1.99 +/**
1.100 +@internalTechnology
1.101 +*/
1.102 +inline TBool THardwareVariant::IsCompatibleWith(TUint aCpu, TUint aAsic, TUint aVMask)
1.103 + { return(Layer()<=3 || (Parent()==3 && Layer()==aCpu) ||
1.104 + (Layer()==aAsic && (VMask() & aVMask)!=0) );}
1.105 +
1.106 +
1.107 +/** Functions/Data defined in layer 2 or below of the kernel and not available to layer 1.
1.108 +
1.109 +@internalComponent
1.110 +*/
1.111 +class PP
1.112 + {
1.113 +public:
1.114 + enum TPlatPanic
1.115 + {
1.116 + EInitialSystemTimeInvalid=0,
1.117 + EInvalidStartupReason=1,
1.118 + EIncorrectDllDataAddress=2,
1.119 + ENoDllDataChunk=3,
1.120 + EUnsupportedOldBinary=4,
1.121 + };
1.122 +
1.123 + static void Panic(TPlatPanic aPanic);
1.124 + static void InitSuperPageFromRom(TLinAddr aRomHeader, TLinAddr aSuperPage);
1.125 +public:
1.126 + static TInt RamDriveMaxSize;
1.127 + static TInt RamDriveRange;
1.128 + static TUint32 NanoWaitCal;
1.129 + static DChunk* TheRamDriveChunk;
1.130 + static TLinAddr RamDriveStartAddress;
1.131 + static TInt MaxUserThreadStack;
1.132 + static TInt UserThreadStackGuard;
1.133 + static TInt MaxStackSpacePerProcess;
1.134 + static TInt SupervisorThreadStackGuard;
1.135 + static TUint32 MonitorEntryPoint[3];
1.136 + static TLinAddr RomRootDirAddress;
1.137 +public:
1.138 + };
1.139 +
1.140 +extern "C" {
1.141 +extern TLinAddr RomHeaderAddress;
1.142 +}
1.143 +
1.144 +/********************************************
1.145 + * Code segment
1.146 + ********************************************/
1.147 +
1.148 +/**
1.149 +@internalComponent
1.150 +*/
1.151 +struct SRamCodeInfo
1.152 + {
1.153 + TInt iCodeSize;
1.154 + TInt iTextSize;
1.155 + TLinAddr iCodeRunAddr;
1.156 + TLinAddr iCodeLoadAddr;
1.157 + TInt iDataSize;
1.158 + TInt iBssSize;
1.159 + TLinAddr iDataRunAddr;
1.160 + TLinAddr iDataLoadAddr;
1.161 + TInt iConstOffset; // not used
1.162 + TLinAddr iExportDir;
1.163 + TInt iExportDirCount;
1.164 + TLinAddr iExceptionDescriptor;
1.165 + };
1.166 +
1.167 +
1.168 +class DEpocCodeSeg;
1.169 +
1.170 +/**
1.171 +@internalComponent
1.172 +*/
1.173 +class DEpocCodeSegMemory : public DBase
1.174 + {
1.175 +public:
1.176 + static DEpocCodeSegMemory* New(DEpocCodeSeg* aCodeSeg);
1.177 + TInt Open();
1.178 + TInt Close();
1.179 +protected:
1.180 + DEpocCodeSegMemory(DEpocCodeSeg* aCodeSeg);
1.181 +public:
1.182 + TInt iAccessCount;
1.183 + SRamCodeInfo iRamInfo;
1.184 + DEpocCodeSeg* iCodeSeg;
1.185 + };
1.186 +
1.187 +
1.188 +/**
1.189 +@internalComponent
1.190 +*/
1.191 +class DEpocCodeSeg : public DCodeSeg
1.192 + {
1.193 +public:
1.194 + virtual ~DEpocCodeSeg();
1.195 + void Destruct();
1.196 +public:
1.197 + virtual void Info(TCodeSegCreateInfo& aInfo);
1.198 + virtual TLibraryFunction Lookup(TInt aOrdinal);
1.199 + virtual TInt GetMemoryInfo(TModuleMemoryInfo& aInfo, DProcess* aProcess);
1.200 + virtual TInt DoCreate(TCodeSegCreateInfo& aInfo, DProcess* aProcess);
1.201 + virtual void InitData();
1.202 + virtual TInt Loaded(TCodeSegCreateInfo& aInfo);
1.203 + virtual TInt DoCreateRam(TCodeSegCreateInfo& aInfo, DProcess* aProcess)=0;
1.204 + virtual TInt DoCreateXIP(DProcess* aProcess)=0;
1.205 +public:
1.206 + inline SRamCodeInfo& RamInfo()
1.207 + {return *(SRamCodeInfo*)iInfo;}
1.208 + inline const TRomImageHeader& RomInfo()
1.209 + {return *(const TRomImageHeader*)iInfo;}
1.210 + void GetDataSizeAndBase(TInt& aTotalDataSizeOut, TLinAddr& aDataBaseOut);
1.211 +public:
1.212 + TUint8 iXIP; // TRUE for XIP ROM code
1.213 + const TAny* iInfo; // pointer to TRomImageHeader or SRamCodeInfo
1.214 + DEpocCodeSegMemory* iMemory;
1.215 + TCodeSegLoaderCookieList* iLoaderCookie;
1.216 + };
1.217 +
1.218 +/********************************************
1.219 + * Process control block
1.220 + ********************************************/
1.221 +
1.222 +/**
1.223 +@internalComponent
1.224 +*/
1.225 +class DEpocProcess : public DProcess
1.226 + {
1.227 +public:
1.228 + virtual TInt AttachExistingCodeSeg(TProcessCreateInfo& aInfo);
1.229 + };
1.230 +
1.231 +/**
1.232 +@internalComponent
1.233 +*/
1.234 +inline const TRomHeader& TheRomHeader()
1.235 + {return *((const TRomHeader *)RomHeaderAddress);}
1.236 +
1.237 +#endif