1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/os/kernelhwsrv/kernel/eka/include/memmodel/epoc/mmubase/mmubase.inl	Fri Jun 15 03:10:57 2012 +0200
     1.3 @@ -0,0 +1,96 @@
     1.4 +// Copyright (c) 2006-2009 Nokia Corporation and/or its subsidiary(-ies).
     1.5 +// All rights reserved.
     1.6 +// This component and the accompanying materials are made available
     1.7 +// under the terms of the License "Eclipse Public License v1.0"
     1.8 +// which accompanies this distribution, and is available
     1.9 +// at the URL "http://www.eclipse.org/legal/epl-v10.html".
    1.10 +//
    1.11 +// Initial Contributors:
    1.12 +// Nokia Corporation - initial contribution.
    1.13 +//
    1.14 +// Contributors:
    1.15 +//
    1.16 +// Description:
    1.17 +// e32\include\memmodel\epoc\mmubase\mmubase.inl
    1.18 +// 
    1.19 +//
    1.20 +
    1.21 +#ifndef __MMUBASE_INL__
    1.22 +#define __MMUBASE_INL__
    1.23 +
    1.24 +#include <mmboot.h>
    1.25 +
    1.26 +const TInt KPageInfosPerPageShift = KPageShift-KPageInfoShift;
    1.27 +const TInt KPageInfosPerPage = 1<<KPageInfosPerPageShift;
    1.28 +const TInt KNumPageInfoPagesShift = 32-KPageShift-KPageInfosPerPageShift;
    1.29 +const TInt KNumPageInfoPages = 1<<KNumPageInfoPagesShift;
    1.30 +
    1.31 +inline SPageInfo* SPageInfo::FromPhysAddr(TPhysAddr aAddress)
    1.32 +	{
    1.33 +	return ((SPageInfo*)KPageInfoLinearBase)+(aAddress>>KPageShift);
    1.34 +	}
    1.35 +
    1.36 +inline TPhysAddr SPageInfo::PhysAddr()
    1.37 +	{
    1.38 +	return ((TPhysAddr)this)<<KPageInfosPerPageShift;
    1.39 +	}
    1.40 +
    1.41 +
    1.42 +//
    1.43 +// M class implementations of ram allocator and defrag methods
    1.44 +// Make these inline as they are just memory model independent interface
    1.45 +// for the ram allocator and defrag classes.
    1.46 +//
    1.47 +
    1.48 +inline TInt M::PageShift()
    1.49 +	{
    1.50 +	return KPageShift;
    1.51 +	}
    1.52 +
    1.53 +
    1.54 +inline void M::RamAllocLock()
    1.55 +	{
    1.56 +	MmuBase::Wait();
    1.57 +	}
    1.58 +
    1.59 +
    1.60 +inline void M::RamAllocUnlock()
    1.61 +	{
    1.62 +	MmuBase::Signal();
    1.63 +	}
    1.64 +
    1.65 +
    1.66 +inline void M::RamAllocIsLocked()
    1.67 +	{
    1.68 +#ifdef _DEBUG
    1.69 +	if (!K::Initialising) 
    1.70 +		__ASSERT_MUTEX(MmuBase::RamAllocatorMutex);
    1.71 +#endif
    1.72 +	}
    1.73 +
    1.74 +
    1.75 +inline TUint M::NumberOfFreeDpPages()
    1.76 +	{
    1.77 +	return Mmu::Get().NumberOfFreeDpPages();
    1.78 +	}
    1.79 +
    1.80 +
    1.81 +inline TUint M::NumberOfDirtyDpPages()
    1.82 +	{// This memory model doesn't support data paging so can't get dirty paged pages.
    1.83 +	return 0;
    1.84 +	}
    1.85 +
    1.86 +
    1.87 +inline TInt M::MovePage(TPhysAddr aOld, TPhysAddr& aNew, TUint aBlockZoneId, TBool aBlockRest)
    1.88 +	{
    1.89 +	return Mmu::Get().MovePage(aOld, aNew, aBlockZoneId, aBlockRest);
    1.90 +	}
    1.91 +
    1.92 +
    1.93 +inline TInt M::DiscardPage(TPhysAddr aAddr, TUint aBlockZoneId, TBool aBlockRest)
    1.94 +	{
    1.95 +	return Mmu::Get().DiscardPage(aAddr, aBlockZoneId, aBlockRest);
    1.96 +	}
    1.97 +#endif
    1.98 +
    1.99 +