1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/os/kernelhwsrv/bsptemplate/asspandvariant/template_variant/specific/variant.cia	Fri Jun 15 03:10:57 2012 +0200
     1.3 @@ -0,0 +1,55 @@
     1.4 +// Copyright (c) 1994-2009 Nokia Corporation and/or its subsidiary(-ies).
     1.5 +// All rights reserved.
     1.6 +// This component and the accompanying materials are made available
     1.7 +// under the terms of the License "Eclipse Public License v1.0"
     1.8 +// which accompanies this distribution, and is available
     1.9 +// at the URL "http://www.eclipse.org/legal/epl-v10.html".
    1.10 +//
    1.11 +// Initial Contributors:
    1.12 +// Nokia Corporation - initial contribution.
    1.13 +//
    1.14 +// Contributors:
    1.15 +//
    1.16 +// Description:
    1.17 +// template\template_variant\specific\variant.cia
    1.18 +// 
    1.19 +//
    1.20 +
    1.21 +#include <e32cia.h>
    1.22 +#include "variant.h"
    1.23 +#include "mconf.h"
    1.24 +
    1.25 +/******************************************************************************
    1.26 + * Interrupt handling/dispatch
    1.27 + ******************************************************************************/
    1.28 +__NAKED__ void XIntDispatch(TAny*)
    1.29 +	{
    1.30 +	// Service second-level Variant Interrupts
    1.31 +	// Enter with r0->{Variant int controller base; Handlers;}
    1.32 +	asm("stmfd sp!, {r4,lr} ");
    1.33 +	asm("ldmia r0, {r3,r4} ");										// r3=Variant interrupt controller base, r4->handlers
    1.34 +	asm("0: ");
    1.35 +	asm("ldr r0, [r3, #%a0]" : : "i" ((TInt)KHoIntContEnable));		// r0=bitmask with enabled interrupts
    1.36 +	asm("ldr r1, [r3, #%a0]" : : "i" ((TInt)KHoIntContPending));	// r1=bitmask with pending interrupts
    1.37 +	asm("mov r2, #31 ");											// int id
    1.38 +	asm("and r0, r0, r1 ");
    1.39 +	asm("bics r0, r0, #0xf8000000 ");								// mask unused bits (only 26 2nd-level ints defined)
    1.40 +	asm("ldmeqfd sp!, {r4,pc} ");									// if no 2nd level interrupts pending, exit
    1.41 +	asm("cmp r0, #0x00010000 ");
    1.42 +	asm("movcc r0, r0, lsl #16 ");
    1.43 +	asm("subcc r2, r2, #16 ");
    1.44 +	asm("cmp r0, #0x01000000 ");
    1.45 +	asm("movcc r0, r0, lsl #8 ");
    1.46 +	asm("subcc r2, r2, #8 ");
    1.47 +	asm("cmp r0, #0x10000000 ");
    1.48 +	asm("movcc r0, r0, lsl #4 ");
    1.49 +	asm("subcc r2, r2, #4 ");
    1.50 +	asm("cmp r0, #0x40000000 ");
    1.51 +	asm("movcc r0, r0, lsl #2 ");
    1.52 +	asm("subcc r2, r2, #2 ");
    1.53 +	asm("cmp r0, #0x80000000 ");
    1.54 +	asm("subcc r2, r2, #1 ");										// r2=bit no. of MS 1
    1.55 +	asm("add r0, r4, r2, lsl #3 ");									// r0->handler for this interrupt
    1.56 +	asm("adr lr, 0b ");												// look again after calling handler
    1.57 +	asm("ldmia r0, {r0,pc} ");										// jump to handler
    1.58 +	}