os/kernelhwsrv/bsptemplate/asspandvariant/template_assp/register.cpp
changeset 0 bde4ae8d615e
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/os/kernelhwsrv/bsptemplate/asspandvariant/template_assp/register.cpp	Fri Jun 15 03:10:57 2012 +0200
     1.3 @@ -0,0 +1,107 @@
     1.4 +// Copyright (c) 1994-2009 Nokia Corporation and/or its subsidiary(-ies).
     1.5 +// All rights reserved.
     1.6 +// This component and the accompanying materials are made available
     1.7 +// under the terms of the License "Eclipse Public License v1.0"
     1.8 +// which accompanies this distribution, and is available
     1.9 +// at the URL "http://www.eclipse.org/legal/epl-v10.html".
    1.10 +//
    1.11 +// Initial Contributors:
    1.12 +// Nokia Corporation - initial contribution.
    1.13 +//
    1.14 +// Contributors:
    1.15 +//
    1.16 +// Description:
    1.17 +// naviengine_assp\assp.cpp
    1.18 +// 
    1.19 +//
    1.20 +
    1.21 +#include <assp.h>
    1.22 +
    1.23 +#ifdef __SMP__
    1.24 +TSpinLock AsspLock(TSpinLock::EOrderGenericIrqLow1);
    1.25 +#endif
    1.26 +
    1.27 +///////////////////////////////////////////////////////////////////////////////
    1.28 +//
    1.29 +// MHA - Modular Hardware Adaption
    1.30 +//
    1.31 +// Register Access
    1.32 +//
    1.33 +///////////////////////////////////////////////////////////////////////////////
    1.34 +
    1.35 +
    1.36 +///////////////////////////////////////////////////////////////////////////////
    1.37 +// We need spin locks around read, modify, write operations because another CPU
    1.38 +// may access the same memory in between operations and potentially cause
    1.39 +// memory corruption.
    1.40 +///////////////////////////////////////////////////////////////////////////////
    1.41 +EXPORT_C void AsspRegister::Modify8(TLinAddr aAddr, TUint8 aClearMask, TUint8 aSetMask)
    1.42 +	{
    1.43 +	TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
    1.44 +	TUint8  value = *(volatile TUint8  *)aAddr;
    1.45 +	value &= ~aClearMask;
    1.46 +	value |= aSetMask;
    1.47 +	*(volatile TUint8  *)aAddr = value;
    1.48 +	__SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
    1.49 +	}
    1.50 +
    1.51 +EXPORT_C void AsspRegister::Modify16(TLinAddr aAddr, TUint16 aClearMask, TUint16 aSetMask)
    1.52 +	{
    1.53 +	TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
    1.54 +	TUint16 value = *(volatile TUint16 *)aAddr;
    1.55 +	value &= ~aClearMask;
    1.56 +	value |= aSetMask;
    1.57 +	*(volatile TUint16 *)aAddr = value;
    1.58 +	__SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
    1.59 +	}
    1.60 +
    1.61 +EXPORT_C void AsspRegister::Modify32(TLinAddr aAddr, TUint32 aClearMask, TUint32 aSetMask)
    1.62 +	{
    1.63 +	TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
    1.64 +	TUint32 value = *(volatile TUint32 *)aAddr;
    1.65 +	value &= ~aClearMask;
    1.66 +	value |= aSetMask;
    1.67 +	*(volatile TUint32 *)aAddr = value;
    1.68 +	__SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
    1.69 +	}
    1.70 +
    1.71 +///////////////////////////////////////////////////////////////////////////////
    1.72 +// 64 bit operations may be more complex than 8/16/32 bit operations, depending
    1.73 +// upon hardware support for 64 bit accesses.
    1.74 +//
    1.75 +// For example, one platform required an assembly language function to prevent
    1.76 +// the compliler optimising the accesses into 2 x 32 bit accesses and causing a
    1.77 +// bus error.
    1.78 +//
    1.79 +// Spinlocks are required for non-atomic operations and are therefore
    1.80 +// recommended for 64 bit accesses on current platforms.
    1.81 +///////////////////////////////////////////////////////////////////////////////
    1.82 +extern TUint64 DoRead64(TLinAddr aAddr);
    1.83 +
    1.84 +EXPORT_C TUint64 AsspRegister::Read64(TLinAddr aAddr)
    1.85 +	{
    1.86 +	TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
    1.87 +	TUint64 value = DoRead64(aAddr);
    1.88 +	__SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
    1.89 +	return value;
    1.90 +	}
    1.91 +
    1.92 +extern void DoWrite64(TLinAddr aAddr, TUint64 aValue);
    1.93 +
    1.94 +EXPORT_C void AsspRegister::Write64(TLinAddr aAddr, TUint64 aValue)
    1.95 +	{
    1.96 +	TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
    1.97 +	DoWrite64(aAddr, aValue);
    1.98 +	__SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
    1.99 +	}
   1.100 +
   1.101 +EXPORT_C void AsspRegister::Modify64(TLinAddr aAddr, TUint64 aClearMask, TUint64 aSetMask)
   1.102 +	{
   1.103 +	TUint irq = __SPIN_LOCK_IRQSAVE(AsspLock);
   1.104 +	TUint64 value = DoRead64(aAddr);
   1.105 +	value &= ~aClearMask;
   1.106 +	value |= aSetMask;
   1.107 +	DoWrite64(aAddr, value);
   1.108 +	__SPIN_UNLOCK_IRQRESTORE(AsspLock,irq);
   1.109 +	}
   1.110 +