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// Copyright (c) 1998-2009 Nokia Corporation and/or its subsidiary(-ies).
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// All rights reserved.
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// This component and the accompanying materials are made available
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// under the terms of the License "Eclipse Public License v1.0"
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// which accompanies this distribution, and is available
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// at the URL "http://www.eclipse.org/legal/epl-v10.html".
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//
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// Initial Contributors:
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// Nokia Corporation - initial contribution.
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//
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// Contributors:
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//
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// Description:
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// template\template_assp\interrupts.cia
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// Template ASSP interrupt control and dispatch
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//
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//
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#include <template_assp_priv.h>
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__NAKED__ void TemplateInterrupt::IrqDispatch()
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{
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// IRQ dispatcher
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// Enter with r0-r3, r12 and return address on IRQ stack
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// Must preserve r4-r11
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// for the moment, use bit number as priority
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asm("stmfd sp!, {r4-r6,lr} ");
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asm("ldr r4, __KTemplateIntCtrlBase ");
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asm("ldr r5, __Handlers ");
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asm("dispatch_irq: ");
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asm("ldr r12, [r4, #%a0]" : : "i" ((TInt)KHoInterruptsIrqPending)); // r12=IRQ pending register
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asm("cmp r12, #0 ");
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asm("ldmeqfd sp!, {r4-r6,pc} "); // no more pending, so finish
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asm("mov r3, #31 ");
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asm("cmp r12, #0x00010000 ");
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asm("movcc r12, r12, lsl #16 ");
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asm("subcc r3, r3, #16 ");
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asm("cmp r12, #0x01000000 ");
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asm("movcc r12, r12, lsl #8 ");
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asm("subcc r3, r3, #8 ");
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asm("cmp r12, #0x10000000 ");
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asm("movcc r12, r12, lsl #4 ");
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asm("subcc r3, r3, #4 ");
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asm("cmp r12, #0x40000000 ");
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asm("movcc r12, r12, lsl #2 ");
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asm("subcc r3, r3, #2 ");
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asm("cmp r12, #0x80000000 ");
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asm("subcc r3, r3, #1 "); // r3=bit no. of MS 1
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asm("add r0, r5, r3, lsl #3 "); // r0=address of SInterruptHandler
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asm("adr lr, dispatch_irq "); // return to dispatch_irq
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asm("ldmia r0, {r0,pc} "); // (*iIsr)(iPtr);
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}
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__NAKED__ void TemplateInterrupt::FiqDispatch()
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{
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// FIQ dispatcher
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// Enter with return address on FIQ stack
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// We may use r8-r12, but must preserve other registers
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// for the moment, use bit number as priority
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// NOTE: STACK MISALIGNED ON ENTRY (1 WORD PUSHED)
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asm("stmfd sp!, {r0-r3,lr} ");
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asm("ldr r8, __KTemplateIntCtrlBase ");
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asm("ldr r9, __Handlers ");
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asm("dispatch_fiq: ");
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asm("ldr r12, [r4, #%a0]" : : "i" ((TInt)KHoInterruptsFiqPending)); // r12=FIQ pending register
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asm("cmp r12, #0 ");
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asm("ldmeqfd sp!, {r0-r3,pc} "); // no more pending, so finish
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asm("mov r3, #31 ");
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asm("cmp r12, #0x00010000 ");
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asm("movcc r12, r12, lsl #16 ");
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asm("subcc r3, r3, #16 ");
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asm("cmp r12, #0x01000000 ");
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asm("movcc r12, r12, lsl #8 ");
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asm("subcc r3, r3, #8 ");
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asm("cmp r12, #0x10000000 ");
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asm("movcc r12, r12, lsl #4 ");
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asm("subcc r3, r3, #4 ");
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asm("cmp r12, #0x40000000 ");
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asm("movcc r12, r12, lsl #2 ");
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asm("subcc r3, r3, #2 ");
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asm("cmp r12, #0x80000000 ");
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asm("subcc r3, r3, #1 "); // r3=bit no. of MS 1
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asm("add r0, r9, r3, lsl #3 "); // r0=address of SInterruptHandler
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asm("adr lr, dispatch_fiq "); // return to dispatch_fiq
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asm("ldmia r0, {r0,pc} "); // (*iIsr)(iPtr);
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asm("__KTemplateIntCtrlBase: ");
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asm(".word %a0" : : "i" ((TInt)KHwBaseInterrupts));
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asm("__Handlers: ");
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asm(".word %a0" : : "i" ((TInt)&TemplateInterrupt::Handlers[0]));
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}
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