|
sl@0
|
1 |
// Copyright (c) 2007-2009 Nokia Corporation and/or its subsidiary(-ies).
|
|
sl@0
|
2 |
// All rights reserved.
|
|
sl@0
|
3 |
// This component and the accompanying materials are made available
|
|
sl@0
|
4 |
// under the terms of the License "Eclipse Public License v1.0"
|
|
sl@0
|
5 |
// which accompanies this distribution, and is available
|
|
sl@0
|
6 |
// at the URL "http://www.eclipse.org/legal/epl-v10.html".
|
|
sl@0
|
7 |
//
|
|
sl@0
|
8 |
// Initial Contributors:
|
|
sl@0
|
9 |
// Nokia Corporation - initial contribution.
|
|
sl@0
|
10 |
//
|
|
sl@0
|
11 |
// Contributors:
|
|
sl@0
|
12 |
//
|
|
sl@0
|
13 |
// Description:
|
|
sl@0
|
14 |
// e32test\nkernsa\nirqx.cpp
|
|
sl@0
|
15 |
//
|
|
sl@0
|
16 |
//
|
|
sl@0
|
17 |
|
|
sl@0
|
18 |
#include <nk_irq.h>
|
|
sl@0
|
19 |
|
|
sl@0
|
20 |
#ifdef __X86__
|
|
sl@0
|
21 |
#include <apic.h>
|
|
sl@0
|
22 |
#endif
|
|
sl@0
|
23 |
|
|
sl@0
|
24 |
class NIrqXTest : public NIrqX
|
|
sl@0
|
25 |
{
|
|
sl@0
|
26 |
public:
|
|
sl@0
|
27 |
NIrqXTest();
|
|
sl@0
|
28 |
void Kick();
|
|
sl@0
|
29 |
void Set(TBool aLevel);
|
|
sl@0
|
30 |
public:
|
|
sl@0
|
31 |
static void DoEoi(NIrq* aIrq);
|
|
sl@0
|
32 |
static void DoEnable(NIrq* aIrq);
|
|
sl@0
|
33 |
static void DoDisable(NIrq* aIrq);
|
|
sl@0
|
34 |
static void DoSetCpu(NIrq* aIrq, TUint32 aMask);
|
|
sl@0
|
35 |
static void DoInit(NIrq* aIrq);
|
|
sl@0
|
36 |
static TBool DoPending(NIrq* aIrq);
|
|
sl@0
|
37 |
static void DoWait(NIrq* aIrq);
|
|
sl@0
|
38 |
public:
|
|
sl@0
|
39 |
TSpinLock iLock;
|
|
sl@0
|
40 |
NIrq* iIrq;
|
|
sl@0
|
41 |
TUint32 iCpuMask;
|
|
sl@0
|
42 |
TUint8 iEnabled;
|
|
sl@0
|
43 |
TUint8 iPending;
|
|
sl@0
|
44 |
TUint8 iLevel;
|
|
sl@0
|
45 |
};
|
|
sl@0
|
46 |
|
|
sl@0
|
47 |
NIrqXTest::NIrqXTest()
|
|
sl@0
|
48 |
{
|
|
sl@0
|
49 |
iIrq = 0;
|
|
sl@0
|
50 |
iCpuMask = 0x1;
|
|
sl@0
|
51 |
iEnabled = 0;
|
|
sl@0
|
52 |
iPending = 0;
|
|
sl@0
|
53 |
iLevel = 0;
|
|
sl@0
|
54 |
}
|
|
sl@0
|
55 |
|
|
sl@0
|
56 |
void NIrqXTest::Set(TBool aLevel)
|
|
sl@0
|
57 |
{
|
|
sl@0
|
58 |
TBool active = FALSE;
|
|
sl@0
|
59 |
TInt irq = __SPIN_LOCK_IRQSAVE(iLock);
|
|
sl@0
|
60 |
TUint32 f = iIrq->iStaticFlags;
|
|
sl@0
|
61 |
if (f & NIrq::ELevel)
|
|
sl@0
|
62 |
{
|
|
sl@0
|
63 |
if (f & NIrq::EPolarity)
|
|
sl@0
|
64 |
{
|
|
sl@0
|
65 |
active = aLevel;
|
|
sl@0
|
66 |
}
|
|
sl@0
|
67 |
else
|
|
sl@0
|
68 |
{
|
|
sl@0
|
69 |
active = !aLevel;
|
|
sl@0
|
70 |
}
|
|
sl@0
|
71 |
}
|
|
sl@0
|
72 |
else
|
|
sl@0
|
73 |
{
|
|
sl@0
|
74 |
if (f & NIrq::EPolarity)
|
|
sl@0
|
75 |
{
|
|
sl@0
|
76 |
active = aLevel && !iLevel;
|
|
sl@0
|
77 |
}
|
|
sl@0
|
78 |
else
|
|
sl@0
|
79 |
{
|
|
sl@0
|
80 |
active = !aLevel && iLevel;
|
|
sl@0
|
81 |
}
|
|
sl@0
|
82 |
}
|
|
sl@0
|
83 |
iLevel = (TUint8)(aLevel ? 1 : 0);
|
|
sl@0
|
84 |
if (active && iEnabled)
|
|
sl@0
|
85 |
Kick();
|
|
sl@0
|
86 |
__SPIN_UNLOCK_IRQRESTORE(iLock,irq);
|
|
sl@0
|
87 |
}
|
|
sl@0
|
88 |
|
|
sl@0
|
89 |
#if defined (__X86__)
|
|
sl@0
|
90 |
__NAKED__ void NIrqXTest::Kick()
|
|
sl@0
|
91 |
{
|
|
sl@0
|
92 |
_asm mov al, 1
|
|
sl@0
|
93 |
_asm lock xchg al, [ecx]NIrqXTest.iPending
|
|
sl@0
|
94 |
_asm cmp al, 0
|
|
sl@0
|
95 |
_asm jne short kick0
|
|
sl@0
|
96 |
_asm mov eax, [ecx]NIrqXTest.iCpuMask
|
|
sl@0
|
97 |
_asm shl eax, 24
|
|
sl@0
|
98 |
_asm jz short kick0 // no CPUs, so nothing to do
|
|
sl@0
|
99 |
_asm mov ds:[X86_LOCAL_APIC_BASE + X86_LOCAL_APIC_OFFSET_ICRH], eax
|
|
sl@0
|
100 |
_asm mov eax, [ecx]NIrqXTest.iIrq
|
|
sl@0
|
101 |
_asm mov eax, [eax]NIrq.iVector
|
|
sl@0
|
102 |
_asm or eax, 0x4800
|
|
sl@0
|
103 |
_asm mov ds:[X86_LOCAL_APIC_BASE + X86_LOCAL_APIC_OFFSET_ICRL], eax
|
|
sl@0
|
104 |
_asm kick0:
|
|
sl@0
|
105 |
_asm ret
|
|
sl@0
|
106 |
}
|
|
sl@0
|
107 |
#endif
|
|
sl@0
|
108 |
|
|
sl@0
|
109 |
void NIrqXTest::DoEoi(NIrq* aIrq)
|
|
sl@0
|
110 |
{
|
|
sl@0
|
111 |
NIrqXTest* pX = (NIrqXTest*)iX;
|
|
sl@0
|
112 |
TInt irq = __SPIN_LOCK_IRQSAVE(pX->iLock);
|
|
sl@0
|
113 |
if (pX->iPending)
|
|
sl@0
|
114 |
{
|
|
sl@0
|
115 |
pX->iPending = 0;
|
|
sl@0
|
116 |
TUint32 f = aIrq->iStaticFlags;
|
|
sl@0
|
117 |
if (f & NIrq::ELevel)
|
|
sl@0
|
118 |
{
|
|
sl@0
|
119 |
TUint active_level = (f & NIrq::EPolarity) ? 1 : 0;
|
|
sl@0
|
120 |
if (pX->iLevel==active_level && pX->iEnabled)
|
|
sl@0
|
121 |
pX->Kick();
|
|
sl@0
|
122 |
}
|
|
sl@0
|
123 |
}
|
|
sl@0
|
124 |
__SPIN_UNLOCK_IRQRESTORE(pX->iLock,irq);
|
|
sl@0
|
125 |
}
|
|
sl@0
|
126 |
|
|
sl@0
|
127 |
void NIrqXTest::DoEnable(NIrq* aIrq)
|
|
sl@0
|
128 |
{
|
|
sl@0
|
129 |
}
|
|
sl@0
|
130 |
|
|
sl@0
|
131 |
void NIrqXTest::DoDisable(NIrq* aIrq)
|
|
sl@0
|
132 |
{
|
|
sl@0
|
133 |
}
|
|
sl@0
|
134 |
|
|
sl@0
|
135 |
void NIrqXTest::DoSetCpu(NIrq* aIrq, TUint32 aMask)
|
|
sl@0
|
136 |
{
|
|
sl@0
|
137 |
}
|
|
sl@0
|
138 |
|
|
sl@0
|
139 |
void NIrqXTest::DoInit(NIrq* aIrq)
|
|
sl@0
|
140 |
{
|
|
sl@0
|
141 |
iIrq = aIrq;
|
|
sl@0
|
142 |
}
|
|
sl@0
|
143 |
|
|
sl@0
|
144 |
TBool NIrqXTest::DoPending(NIrq* aIrq)
|
|
sl@0
|
145 |
{
|
|
sl@0
|
146 |
}
|
|
sl@0
|
147 |
|
|
sl@0
|
148 |
void NIrqXTest::DoWait(NIrq* aIrq)
|
|
sl@0
|
149 |
{
|
|
sl@0
|
150 |
}
|
|
sl@0
|
151 |
|