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// Copyright (c) 2008-2009 Nokia Corporation and/or its subsidiary(-ies).
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// All rights reserved.
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// This component and the accompanying materials are made available
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// under the terms of the License "Eclipse Public License v1.0"
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// which accompanies this distribution, and is available
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// at the URL "http://www.eclipse.org/legal/epl-v10.html".
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//
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// Initial Contributors:
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// Nokia Corporation - initial contribution.
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//
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// Contributors:
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//
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// Description:
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// e32test/iic/iic_psl/I2c.cpp
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//
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#include "i2c.h"
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#ifdef IIC_INSTRUMENTATION_MACRO
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#include <drivers/iic_trace.h>
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#endif
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#if defined(MASTER_MODE) && !defined(SLAVE_MODE)
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const TInt KChannelTypeArray[NUM_CHANNELS] = {DIicBusChannel::EMaster, DIicBusChannel::EMaster, DIicBusChannel::EMaster};
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#elif defined(MASTER_MODE) && defined(SLAVE_MODE)
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const TInt KChannelTypeArray[NUM_CHANNELS] = {DIicBusChannel::EMaster, DIicBusChannel::ESlave, DIicBusChannel::EMasterSlave};
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#else
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const TInt KChannelTypeArray[NUM_CHANNELS] = {DIicBusChannel::ESlave, DIicBusChannel::ESlave, DIicBusChannel::ESlave};
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#endif
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#define CHANNEL_TYPE(n) (KChannelTypeArray[n])
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#define CHANNEL_DUPLEX(n) (DIicBusChannel::EHalfDuplex)
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#ifdef STANDALONE_CHANNEL
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_LIT(KPddNameI2c,"i2c_ctrless.pdd");
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#else
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_LIT(KPddNameI2c,"i2c.pdd");
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#endif
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#ifndef STANDALONE_CHANNEL
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LOCAL_C TInt8 AssignChanNum()
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{
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static TInt8 iBaseChanNum = KI2cChannelNumBase;
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I2C_PRINT(("I2C AssignChanNum - on entry, iBaseChanNum = 0x%x\n",iBaseChanNum));
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return iBaseChanNum++; // Arbitrary, for illustration
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}
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#endif/*STANDALONE_CHANNEL*/
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#ifdef SLAVE_MODE
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LOCAL_C TInt16 AssignSlaveChanId()
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{
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static TInt16 iBaseSlaveChanId = KI2cSlaveChannelIdBase;
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I2C_PRINT(("I2C AssignSlaveChanId - on entry, iBaseSlaveChanId = 0x%x\n",iBaseSlaveChanId));
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return iBaseSlaveChanId++; // Arbitrary, for illustration
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}
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#endif/*SLAVE_MODE*/
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NONSHARABLE_CLASS(DSimulatedI2cDevice) : public DPhysicalDevice
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{
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// Class to faciliate loading of the IIC classes
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public:
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class TCaps
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{
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public:
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TVersion iVersion;
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};
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public:
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DSimulatedI2cDevice();
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virtual TInt Install();
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virtual TInt Create(DBase*& aChannel, TInt aUnit, const TDesC8* anInfo, const TVersion& aVer);
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virtual TInt Validate(TInt aUnit, const TDesC8* anInfo, const TVersion& aVer);
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virtual void GetCaps(TDes8& aDes) const;
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inline static TVersion VersionRequired();
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};
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TVersion DSimulatedI2cDevice::VersionRequired()
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{
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I2C_PRINT(("DSimulatedI2cDevice::VersionRequired\n"));
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return TVersion(KIicClientMajorVersionNumber,KIicClientMinorVersionNumber,KIicClientBuildVersionNumber);
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}
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/** Factory class constructor */
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DSimulatedI2cDevice::DSimulatedI2cDevice()
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{
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I2C_PRINT(("DSimulatedI2cDevice::DSimulatedI2cDevice\n"));
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iVersion = DSimulatedI2cDevice::VersionRequired();
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}
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TInt DSimulatedI2cDevice::Install()
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{
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I2C_PRINT(("DSimulatedI2cDevice::Install\n"));
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return(SetName(&KPddNameI2c));
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}
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/** Called by the kernel's device driver framework to create a Physical Channel. */
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TInt DSimulatedI2cDevice::Create(DBase*& /*aChannel*/, TInt /*aUint*/, const TDesC8* /*anInfo*/, const TVersion& /*aVer*/)
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{
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I2C_PRINT(("DSimulatedI2cDevice::Create\n"));
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return KErrNone;
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}
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/** Called by the kernel's device driver framework to check if this PDD is suitable for use with a Logical Channel.*/
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TInt DSimulatedI2cDevice::Validate(TInt /*aUnit*/, const TDesC8* /*anInfo*/, const TVersion& aVer)
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{
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I2C_PRINT(("DSimulatedI2cDevice::Validate\n"));
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if (!Kern::QueryVersionSupported(DSimulatedI2cDevice::VersionRequired(),aVer))
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return(KErrNotSupported);
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return KErrNone;
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}
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/** Return the driver capabilities */
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void DSimulatedI2cDevice::GetCaps(TDes8& aDes) const
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{
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I2C_PRINT(("DSimulatedI2cDevice::GetCaps\n"));
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// Create a capabilities object
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TCaps caps;
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caps.iVersion = iVersion;
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// Zero the buffer
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TInt maxLen = aDes.MaxLength();
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aDes.FillZ(maxLen);
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// Copy capabilities
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TInt size=sizeof(caps);
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if(size>maxLen)
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size=maxLen;
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aDes.Copy((TUint8*)&caps,size);
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}
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// supported channels for this implementation
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static DIicBusChannel* ChannelPtrArray[NUM_CHANNELS];
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//DECLARE_EXTENSION_WITH_PRIORITY(BUS_IMPLMENTATION_PRIORITY)
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DECLARE_STANDARD_PDD() // I2c test driver to be explicitly loaded as an LDD, not kernel extension
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{
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#ifndef STANDALONE_CHANNEL
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DIicBusChannel* chan=NULL;
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for(TInt i=0; i<NUM_CHANNELS; i++)
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{
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I2C_PRINT(("\n"));
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#if defined(MASTER_MODE)
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if(CHANNEL_TYPE(i) == (DIicBusChannel::EMaster))
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{
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chan=new DSimulatedIicBusChannelMasterI2c(BUS_TYPE,CHANNEL_DUPLEX(i));
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if(!chan)
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return NULL;
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I2C_PRINT(("I2C chan created at 0x%x\n",chan));
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if(((DSimulatedIicBusChannelMasterI2c*)chan)->Create()!=KErrNone)
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{
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delete chan;
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return NULL;
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}
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}
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#endif
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#if defined(MASTER_MODE) && defined(SLAVE_MODE)
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if(CHANNEL_TYPE(i) == DIicBusChannel::EMasterSlave)
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{
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DIicBusChannel* chanM=new DSimulatedIicBusChannelMasterI2c(BUS_TYPE,CHANNEL_DUPLEX(i));
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if(!chanM)
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return NULL;
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DIicBusChannel* chanS=new DSimulatedIicBusChannelSlaveI2c(BUS_TYPE,CHANNEL_DUPLEX(i));
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if(!chanS)
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{
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delete chanM;
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return NULL;
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}
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// For MasterSlave channel, the channel number for both the Master and Slave channels must be the same
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TInt8 msChanNum = ((DSimulatedIicBusChannelMasterI2c*)chanM)->GetChanNum();
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((DSimulatedIicBusChannelSlaveI2c*)chanS)->SetChanNum(msChanNum);
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chan=new DSimulatedIicBusChannelMasterSlaveI2c(BUS_TYPE,CHANNEL_DUPLEX(i),(DSimulatedIicBusChannelMasterI2c*)chanM,(DSimulatedIicBusChannelSlaveI2c*)chanS); // Generic implementation
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if(!chan)
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{
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delete chanM;
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delete chanS;
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return NULL;
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}
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I2C_PRINT(("I2C chan created at 0x%x\n",chan));
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if(((DIicBusChannelMasterSlave*)chan)->DoCreate()!=KErrNone)
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{
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delete chanM;
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delete chanS;
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delete chan;
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return NULL;
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}
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}
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#endif
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#if defined(SLAVE_MODE)
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if(CHANNEL_TYPE(i) == (DIicBusChannel::ESlave))
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{
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chan=new DSimulatedIicBusChannelSlaveI2c(BUS_TYPE,CHANNEL_DUPLEX(i));
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if(!chan)
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return NULL;
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I2C_PRINT(("I2C chan created at 0x%x\n",chan));
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if(((DSimulatedIicBusChannelSlaveI2c*)chan)->Create()!=KErrNone)
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{
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delete chan;
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return NULL;
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}
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}
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#endif
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#if !defined(MASTER_MODE) && !defined(SLAVE_MODE)
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#error I2C mode not defined as Master, Slave nor Master-Slave
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#endif
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if(chan == NULL)
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{
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I2C_PRINT(("\n\nI2C: Channel of type (%d) not created for index %d\n\n",CHANNEL_TYPE(i),i));
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return NULL;
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}
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ChannelPtrArray[i]=chan;
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}
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I2C_PRINT(("\nI2C PDD, channel creation loop done- about to invoke RegisterChannels\n\n"));
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#ifdef IIC_INSTRUMENTATION_MACRO
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IIC_REGISTERCHANS_START_PSL_TRACE;
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#endif
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TInt r=DIicBusController::RegisterChannels(ChannelPtrArray,NUM_CHANNELS);
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#ifdef IIC_INSTRUMENTATION_MACRO
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IIC_REGISTERCHANS_END_PSL_TRACE;
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#endif
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I2C_PRINT(("\nI2C - returned from RegisterChannels with r=%d\n",r));
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if(r!=KErrNone)
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{
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delete chan;
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return NULL;
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}
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#endif
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return new DSimulatedI2cDevice;
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}
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#ifdef MASTER_MODE
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#ifdef STANDALONE_CHANNEL
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EXPORT_C
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#endif
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DSimulatedIicBusChannelMasterI2c::DSimulatedIicBusChannelMasterI2c(const TBusType aBusType, const TChannelDuplex aChanDuplex)
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: DIicBusChannelMaster(aBusType,aChanDuplex)
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{
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I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::DSimulatedIicBusChannelMasterI2c, aBusType=%d,aChanDuplex=%d\n",aBusType,aChanDuplex));
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#ifndef STANDALONE_CHANNEL
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iChannelNumber = AssignChanNum();
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#endif
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I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::DSimulatedIicBusChannelMasterI2c, iChannelNumber=%d\n",iChannelNumber));
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}
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TInt DSimulatedIicBusChannelMasterI2c::DoCreate()
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{
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I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::DoCreate\n"));
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TInt r=Init(); // PIL Base class initialisation
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r=Kern::DynamicDfcQCreate(iDynamicDfcQ,KI2cThreadPriority,KI2cThreadName);
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if(r == KErrNone)
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SetDfcQ((TDfcQue*)iDynamicDfcQ);
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DSimulatedIicBusChannelMasterI2c::SetRequestDelayed(this,EFalse);
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return r;
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}
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TInt DSimulatedIicBusChannelMasterI2c::CheckHdr(TDes8* aHdr)
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{
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I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::CheckHdr\n"));
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TConfigI2cBufV01* i2cBuf = (TConfigI2cBufV01*)aHdr;
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TConfigI2cV01* i2cPtr = &((*i2cBuf)());
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// Check that the values for address type, clock speed, user operation and endianness are recognised
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if((i2cPtr->iAddrType < 0) || (i2cPtr->iAddrType > EI2cAddr10Bit))
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{
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I2C_PRINT(("ERROR: DSimulatedIicBusChannelMasterI2c::CheckHdr unrecognised address type identifier %d\n",i2cPtr->iAddrType));
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return KErrArgument;
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}
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if(i2cPtr->iClkSpeedHz < 0)
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{
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I2C_PRINT(("ERROR: DSimulatedIicBusChannelMasterI2c::CheckHdr negative clock speed specified %d\n",i2cPtr->iClkSpeedHz));
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return KErrArgument;
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}
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if((i2cPtr->iEndianness < 0) || (i2cPtr->iEndianness > ELittleEndian))
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{
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I2C_PRINT(("ERROR: DSimulatedIicBusChannelMasterI2c::CheckHdr unrecognised endianness identifier %d\n",i2cPtr->iEndianness));
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return KErrArgument;
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}
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// Values for the timeout period are arbitrary - can only check it is not a negative value
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if(i2cPtr->iTimeoutPeriod < 0)
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{
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I2C_PRINT(("ERROR: DSimulatedIicBusChannelMasterI2c::CheckHdr negative timeout period %d\n",i2cPtr->iTimeoutPeriod));
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return KErrArgument;
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}
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I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::CheckHdr address type = %d\n",i2cPtr->iAddrType));
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I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::CheckHdr clock speed ID = %d\n",i2cPtr->iClkSpeedHz));
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I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::CheckHdr iEndianness ID = %d\n",i2cPtr->iEndianness));
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I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::CheckHdr iTimeoutPeriod = %d\n",i2cPtr->iTimeoutPeriod));
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return KErrNone;
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}
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// Gateway function for PSL implementation, invoked for DFC processing
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TInt DSimulatedIicBusChannelMasterI2c::DoRequest(TIicBusTransaction* aTransaction)
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{
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|
296 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::DoRequest invoked with aTransaction=0x%x\n",aTransaction));
|
sl@0
|
297 |
TInt r = KErrNone;
|
sl@0
|
298 |
|
sl@0
|
299 |
#ifdef IIC_INSTRUMENTATION_MACRO
|
sl@0
|
300 |
IIC_MPROCESSTRANS_START_PSL_TRACE;
|
sl@0
|
301 |
#endif
|
sl@0
|
302 |
|
sl@0
|
303 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::ProcessTrans aTransaction->iHeader=0x%x\n",GetTransactionHeader(aTransaction)));
|
sl@0
|
304 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::ProcessTrans aTransaction->iHalfDuplexTrans=0x%x\n",GetTransHalfDuplexTferPtr(aTransaction)));
|
sl@0
|
305 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::ProcessTrans aTransaction->iFullDuplexTrans=0x%x\n",GetTransFullDuplexTferPtr(aTransaction)));
|
sl@0
|
306 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::ProcessTrans aTransaction->iCallback=0x%x\n",GetTransCallback(aTransaction)));
|
sl@0
|
307 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::ProcessTrans aTransaction->iFlags=0x%x\n",GetTransFlags(aTransaction)));
|
sl@0
|
308 |
|
sl@0
|
309 |
I2C_PRINT(("\nDSimulatedIicBusChannelMasterI2c::DoRequest, iHeader info \n"));
|
sl@0
|
310 |
TDes8* bufPtr = GetTransactionHeader(aTransaction);
|
sl@0
|
311 |
if(bufPtr == NULL)
|
sl@0
|
312 |
{
|
sl@0
|
313 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::DoRequest ERROR - NULL header\n"));
|
sl@0
|
314 |
return KErrCorrupt;
|
sl@0
|
315 |
}
|
sl@0
|
316 |
TConfigI2cV01 *buf = (TConfigI2cV01 *)(bufPtr->Ptr());
|
sl@0
|
317 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::DoRequest, header address type=0x%x\n",buf->iAddrType));
|
sl@0
|
318 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::DoRequest, header clock speed=0x%x\n",buf->iClkSpeedHz));
|
sl@0
|
319 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::DoRequest, header endianness=0x%x\n",buf->iEndianness));
|
sl@0
|
320 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::DoRequest, header timeout period=0x%x\n",buf->iTimeoutPeriod));
|
sl@0
|
321 |
(void)buf; // Silence compiler when I2C_PRINT not used
|
sl@0
|
322 |
|
sl@0
|
323 |
TInt aTime=1000000/NKern::TickPeriod();
|
sl@0
|
324 |
r = StartSlaveTimeOutTimer(aTime);
|
sl@0
|
325 |
I2C_PRINT(("\nDSimulatedIicBusChannelMasterI2c::ProcessTrans, iHalfDuplexTrans info \n"));
|
sl@0
|
326 |
TIicBusTransfer* halfDuplexPtr=GetTransHalfDuplexTferPtr(aTransaction);
|
sl@0
|
327 |
while(halfDuplexPtr != NULL)
|
sl@0
|
328 |
{
|
sl@0
|
329 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::ProcessTrans transfer type=0x%x\n",GetTferType(halfDuplexPtr)));
|
sl@0
|
330 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::ProcessTrans granularity=0x%x\n",GetTferBufGranularity(halfDuplexPtr)));
|
sl@0
|
331 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::ProcessTrans transfer buffer=0x%x\n",GetTferBuffer(halfDuplexPtr)));
|
sl@0
|
332 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::ProcessTrans next transfer =0x%x\n",GetTferNextTfer(halfDuplexPtr)));
|
sl@0
|
333 |
halfDuplexPtr=GetTferNextTfer(halfDuplexPtr);
|
sl@0
|
334 |
}
|
sl@0
|
335 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::ProcessTrans - End of iHalfDuplexTrans info"));
|
sl@0
|
336 |
|
sl@0
|
337 |
while(IsRequestDelayed(this))
|
sl@0
|
338 |
{
|
sl@0
|
339 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::ProcessTrans - starting Sleep...\n"));
|
sl@0
|
340 |
NKern::Sleep(1000); // 1000 is arbitrary
|
sl@0
|
341 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::ProcessTrans - completed Sleep, check if still delayed\n"));
|
sl@0
|
342 |
};
|
sl@0
|
343 |
|
sl@0
|
344 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::ProcessTrans - exiting\n"));
|
sl@0
|
345 |
|
sl@0
|
346 |
return r;
|
sl@0
|
347 |
}
|
sl@0
|
348 |
|
sl@0
|
349 |
|
sl@0
|
350 |
TBool DSimulatedIicBusChannelMasterI2c::IsRequestDelayed(DSimulatedIicBusChannelMasterI2c* aChan)
|
sl@0
|
351 |
{
|
sl@0
|
352 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::IsRequestDelayed invoked for aChan=0x%x\n",aChan));
|
sl@0
|
353 |
return aChan->iReqDelayed;
|
sl@0
|
354 |
}
|
sl@0
|
355 |
|
sl@0
|
356 |
void DSimulatedIicBusChannelMasterI2c::SetRequestDelayed(DSimulatedIicBusChannelMasterI2c* aChan,TBool aDelay)
|
sl@0
|
357 |
{
|
sl@0
|
358 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::SetRequestDelayed invoked for aChan=0x%x, with aDelay=0x%d\n",aChan,aDelay));
|
sl@0
|
359 |
aChan->iReqDelayed=aDelay;
|
sl@0
|
360 |
}
|
sl@0
|
361 |
|
sl@0
|
362 |
TInt DSimulatedIicBusChannelMasterI2c::HandleSlaveTimeout()
|
sl@0
|
363 |
{
|
sl@0
|
364 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::HandleSlaveTimeout invoked for this=0x%x\n",this));
|
sl@0
|
365 |
return KErrTimedOut;
|
sl@0
|
366 |
}
|
sl@0
|
367 |
|
sl@0
|
368 |
TInt DSimulatedIicBusChannelMasterI2c::StaticExtension(TUint aFunction, TAny* aParam1, TAny* aParam2)
|
sl@0
|
369 |
{
|
sl@0
|
370 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::StaticExtension\n"));
|
sl@0
|
371 |
TInt r = KErrNone;
|
sl@0
|
372 |
#ifdef IIC_INSTRUMENTATION_MACRO
|
sl@0
|
373 |
IIC_MSTATEXT_START_PSL_TRACE;
|
sl@0
|
374 |
#endif
|
sl@0
|
375 |
(void)aParam1;
|
sl@0
|
376 |
(void)aParam2;
|
sl@0
|
377 |
|
sl@0
|
378 |
// Test values of aFunction were shifted left one place by the (test) client driver
|
sl@0
|
379 |
// Return to its original value.
|
sl@0
|
380 |
if(aFunction>KTestControlIoPilOffset)
|
sl@0
|
381 |
aFunction >>= 1;
|
sl@0
|
382 |
switch(aFunction)
|
sl@0
|
383 |
{
|
sl@0
|
384 |
case(RBusDevIicClient::ECtlIoDumpChan):
|
sl@0
|
385 |
{
|
sl@0
|
386 |
#ifdef _DEBUG
|
sl@0
|
387 |
DumpChannel();
|
sl@0
|
388 |
#endif
|
sl@0
|
389 |
break;
|
sl@0
|
390 |
}
|
sl@0
|
391 |
case(RBusDevIicClient::ECtlIoBlockReqCompletion):
|
sl@0
|
392 |
{
|
sl@0
|
393 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::Blocking request completion\n"));
|
sl@0
|
394 |
SetRequestDelayed(this, ETrue);
|
sl@0
|
395 |
break;
|
sl@0
|
396 |
}
|
sl@0
|
397 |
case(RBusDevIicClient::ECtlIoUnblockReqCompletion):
|
sl@0
|
398 |
{
|
sl@0
|
399 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c::Unlocking request completion\n"));
|
sl@0
|
400 |
SetRequestDelayed(this, EFalse);
|
sl@0
|
401 |
break;
|
sl@0
|
402 |
}
|
sl@0
|
403 |
case(RBusDevIicClient::ECtlIoDeRegChan):
|
sl@0
|
404 |
{
|
sl@0
|
405 |
#ifndef STANDALONE_CHANNEL
|
sl@0
|
406 |
#ifdef IIC_INSTRUMENTATION_MACRO
|
sl@0
|
407 |
IIC_DEREGISTERCHAN_START_PSL_TRACE;
|
sl@0
|
408 |
#endif
|
sl@0
|
409 |
I2C_PRINT(("DSimulatedIicBusChannelMasterI2c: deregister channel\n"));
|
sl@0
|
410 |
r=DIicBusController::DeRegisterChannel(this);
|
sl@0
|
411 |
|
sl@0
|
412 |
#ifdef IIC_INSTRUMENTATION_MACRO
|
sl@0
|
413 |
IIC_DEREGISTERCHAN_END_PSL_TRACE;
|
sl@0
|
414 |
#endif/*IIC_INSTRUMENTATION_MACRO*/
|
sl@0
|
415 |
|
sl@0
|
416 |
#else/*STANDALONE_CHANNEL*/
|
sl@0
|
417 |
r = KErrNotSupported;
|
sl@0
|
418 |
#endif/*STANDALONE_CHANNEL*/
|
sl@0
|
419 |
break;
|
sl@0
|
420 |
}
|
sl@0
|
421 |
default:
|
sl@0
|
422 |
{
|
sl@0
|
423 |
Kern::Printf("aFunction %d is not recognised \n",aFunction);
|
sl@0
|
424 |
r=KErrNotSupported;
|
sl@0
|
425 |
}
|
sl@0
|
426 |
}
|
sl@0
|
427 |
|
sl@0
|
428 |
#ifdef IIC_INSTRUMENTATION_MACRO
|
sl@0
|
429 |
IIC_MSTATEXT_END_PSL_TRACE;
|
sl@0
|
430 |
#endif
|
sl@0
|
431 |
return r;
|
sl@0
|
432 |
}
|
sl@0
|
433 |
|
sl@0
|
434 |
//#ifdef MASTER_MODE
|
sl@0
|
435 |
#endif
|
sl@0
|
436 |
|
sl@0
|
437 |
#ifdef SLAVE_MODE
|
sl@0
|
438 |
|
sl@0
|
439 |
void DSimulatedIicBusChannelSlaveI2c::SlaveAsyncSimCallback(TAny* aPtr)
|
sl@0
|
440 |
{
|
sl@0
|
441 |
// To support simulating an asynchronous capture operation
|
sl@0
|
442 |
// NOTE: this will be invoked in the context of DfcThread1
|
sl@0
|
443 |
I2C_PRINT(("SlaveAsyncSimCallback\n"));
|
sl@0
|
444 |
DSimulatedIicBusChannelSlaveI2c* channel = (DSimulatedIicBusChannelSlaveI2c*)aPtr;
|
sl@0
|
445 |
TInt r=KErrNone;// Just simulate successful capture
|
sl@0
|
446 |
#ifdef IIC_INSTRUMENTATION_MACRO
|
sl@0
|
447 |
IIC_SCAPTCHANASYNC_END_PSL_TRACE;
|
sl@0
|
448 |
#endif
|
sl@0
|
449 |
channel->ChanCaptureCb(r);
|
sl@0
|
450 |
}
|
sl@0
|
451 |
|
sl@0
|
452 |
#ifdef STANDALONE_CHANNEL
|
sl@0
|
453 |
EXPORT_C
|
sl@0
|
454 |
#endif
|
sl@0
|
455 |
DSimulatedIicBusChannelSlaveI2c::DSimulatedIicBusChannelSlaveI2c(const DIicBusChannel::TBusType aBusType, const DIicBusChannel::TChannelDuplex aChanDuplex)
|
sl@0
|
456 |
: DIicBusChannelSlave(aBusType,aChanDuplex,0), // 0 to be ignored by base class
|
sl@0
|
457 |
iBlockedTrigger(0),iBlockNotification(EFalse),
|
sl@0
|
458 |
iSlaveTimer(DSimulatedIicBusChannelSlaveI2c::SlaveAsyncSimCallback,this)
|
sl@0
|
459 |
{
|
sl@0
|
460 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c::DSimulatedIicBusChannelSlaveI2c, aBusType=%d,aChanDuplex=%d\n",aBusType,aChanDuplex));
|
sl@0
|
461 |
#ifndef STANDALONE_CHANNEL
|
sl@0
|
462 |
iChannelNumber = AssignChanNum();
|
sl@0
|
463 |
#endif
|
sl@0
|
464 |
iChannelId = AssignSlaveChanId();
|
sl@0
|
465 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c::DSimulatedIicBusChannelSlaveI2c, iChannelNumber=%d, iChannelId=0x%x\n",iChannelNumber,iChannelId));
|
sl@0
|
466 |
}
|
sl@0
|
467 |
|
sl@0
|
468 |
DSimulatedIicBusChannelSlaveI2c::~DSimulatedIicBusChannelSlaveI2c()
|
sl@0
|
469 |
{
|
sl@0
|
470 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c::~DSimulatedIicBusChannelSlaveI2c\n"));
|
sl@0
|
471 |
}
|
sl@0
|
472 |
|
sl@0
|
473 |
TInt DSimulatedIicBusChannelSlaveI2c::DoCreate()
|
sl@0
|
474 |
{
|
sl@0
|
475 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c::DoCreate\n"));
|
sl@0
|
476 |
TInt r=Init(); // PIL Base class initialisation
|
sl@0
|
477 |
return r;
|
sl@0
|
478 |
}
|
sl@0
|
479 |
|
sl@0
|
480 |
|
sl@0
|
481 |
TInt DSimulatedIicBusChannelSlaveI2c::CaptureChannelPsl(TBool aAsynch)
|
sl@0
|
482 |
{
|
sl@0
|
483 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c::CaptureChannelPsl\n"));
|
sl@0
|
484 |
TInt r = KErrNone;
|
sl@0
|
485 |
if(aAsynch)
|
sl@0
|
486 |
{
|
sl@0
|
487 |
#ifdef IIC_INSTRUMENTATION_MACRO
|
sl@0
|
488 |
IIC_SCAPTCHANASYNC_START_PSL_TRACE;
|
sl@0
|
489 |
#endif
|
sl@0
|
490 |
// To simulate an asynchronous capture operation, just set a timer to expire
|
sl@0
|
491 |
iSlaveTimer.OneShot(1000, ETrue); // Arbitrary timeout - expiry executes callback in context of DfcThread1
|
sl@0
|
492 |
}
|
sl@0
|
493 |
else
|
sl@0
|
494 |
{
|
sl@0
|
495 |
#ifdef IIC_INSTRUMENTATION_MACRO
|
sl@0
|
496 |
IIC_SCAPTCHANSYNC_START_PSL_TRACE;
|
sl@0
|
497 |
#endif
|
sl@0
|
498 |
// PSL processing would happen here ...
|
sl@0
|
499 |
// Expected to include implementation of the header configuration information
|
sl@0
|
500 |
|
sl@0
|
501 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c::CaptureChannelPsl (synchronous) ... no real processing to do \n"));
|
sl@0
|
502 |
|
sl@0
|
503 |
#ifdef IIC_INSTRUMENTATION_MACRO
|
sl@0
|
504 |
IIC_SCAPTCHANSYNC_END_PSL_TRACE;
|
sl@0
|
505 |
#endif
|
sl@0
|
506 |
}
|
sl@0
|
507 |
|
sl@0
|
508 |
return r;
|
sl@0
|
509 |
}
|
sl@0
|
510 |
|
sl@0
|
511 |
TInt DSimulatedIicBusChannelSlaveI2c::ReleaseChannelPsl()
|
sl@0
|
512 |
{
|
sl@0
|
513 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c::ReleaseChannelPsl\n"));
|
sl@0
|
514 |
#ifdef IIC_INSTRUMENTATION_MACRO
|
sl@0
|
515 |
IIC_SRELCHAN_START_PSL_TRACE;
|
sl@0
|
516 |
#endif
|
sl@0
|
517 |
TInt r = KErrNone;
|
sl@0
|
518 |
|
sl@0
|
519 |
// PSL-specific processing would happen here ...
|
sl@0
|
520 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c::ReleaseChannelPsl ... no real processing to do \n"));
|
sl@0
|
521 |
|
sl@0
|
522 |
#ifdef IIC_INSTRUMENTATION_MACRO
|
sl@0
|
523 |
IIC_SRELCHAN_END_PSL_TRACE;
|
sl@0
|
524 |
#endif
|
sl@0
|
525 |
|
sl@0
|
526 |
return r;
|
sl@0
|
527 |
}
|
sl@0
|
528 |
|
sl@0
|
529 |
|
sl@0
|
530 |
TInt DSimulatedIicBusChannelSlaveI2c::PrepareTrigger(TInt aTrigger)
|
sl@0
|
531 |
{
|
sl@0
|
532 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c::PrepareTrigger\n"));
|
sl@0
|
533 |
#ifdef IIC_INSTRUMENTATION_MACRO
|
sl@0
|
534 |
// IIC_SNOTIFTRIG_START_PSL;
|
sl@0
|
535 |
#endif
|
sl@0
|
536 |
TInt r=KErrNotSupported;
|
sl@0
|
537 |
if(aTrigger&EReceive)
|
sl@0
|
538 |
{
|
sl@0
|
539 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c::PrepareTrigger - prepare hardware for Rx\n"));
|
sl@0
|
540 |
r=KErrNone;
|
sl@0
|
541 |
}
|
sl@0
|
542 |
if(aTrigger&ETransmit)
|
sl@0
|
543 |
{
|
sl@0
|
544 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c::PrepareTrigger - prepare hardware for Tx\n"));
|
sl@0
|
545 |
r=KErrNone;
|
sl@0
|
546 |
}
|
sl@0
|
547 |
// Check for any additional triggers and make the necessary preparation
|
sl@0
|
548 |
// ... do nothing in simulated PSL
|
sl@0
|
549 |
r=KErrNone;
|
sl@0
|
550 |
|
sl@0
|
551 |
#ifdef IIC_INSTRUMENTATION_MACRO
|
sl@0
|
552 |
// IIC_SNOTIFTRIG_END_PSL;
|
sl@0
|
553 |
#endif
|
sl@0
|
554 |
return r;
|
sl@0
|
555 |
}
|
sl@0
|
556 |
|
sl@0
|
557 |
TInt DSimulatedIicBusChannelSlaveI2c::CheckHdr(TDes8* /*aHdr*/)
|
sl@0
|
558 |
{
|
sl@0
|
559 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c::CheckHdr\n"));
|
sl@0
|
560 |
return KErrNone;
|
sl@0
|
561 |
}
|
sl@0
|
562 |
|
sl@0
|
563 |
TInt DSimulatedIicBusChannelSlaveI2c::DoRequest(TInt aOperation)
|
sl@0
|
564 |
{
|
sl@0
|
565 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c::DoRequest\n"));
|
sl@0
|
566 |
TInt r = KErrNone;
|
sl@0
|
567 |
|
sl@0
|
568 |
switch(aOperation)
|
sl@0
|
569 |
{
|
sl@0
|
570 |
case(ESyncConfigPwrUp):
|
sl@0
|
571 |
{
|
sl@0
|
572 |
r=CaptureChannelPsl(EFalse);
|
sl@0
|
573 |
break;
|
sl@0
|
574 |
};
|
sl@0
|
575 |
case(EAsyncConfigPwrUp):
|
sl@0
|
576 |
{
|
sl@0
|
577 |
r=CaptureChannelPsl(ETrue);
|
sl@0
|
578 |
break;
|
sl@0
|
579 |
};
|
sl@0
|
580 |
case(EPowerDown):
|
sl@0
|
581 |
{
|
sl@0
|
582 |
r=ReleaseChannelPsl();
|
sl@0
|
583 |
break;
|
sl@0
|
584 |
};
|
sl@0
|
585 |
case(EAbort):
|
sl@0
|
586 |
{
|
sl@0
|
587 |
break;
|
sl@0
|
588 |
};
|
sl@0
|
589 |
default:
|
sl@0
|
590 |
{
|
sl@0
|
591 |
// The remaining operations are to instigate an Rx, Tx or just prepare for
|
sl@0
|
592 |
// overrun/underrun/bus error notifications.
|
sl@0
|
593 |
// Handle all these, and any unsupported operation in the following function
|
sl@0
|
594 |
r=PrepareTrigger(aOperation);
|
sl@0
|
595 |
break;
|
sl@0
|
596 |
};
|
sl@0
|
597 |
}
|
sl@0
|
598 |
return r;
|
sl@0
|
599 |
}
|
sl@0
|
600 |
|
sl@0
|
601 |
void DSimulatedIicBusChannelSlaveI2c::ProcessData(TInt aTrigger, TIicBusSlaveCallback* aCb)
|
sl@0
|
602 |
{
|
sl@0
|
603 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c::ProcessData\n"));
|
sl@0
|
604 |
// fills in iReturn, iRxWords and/or iTxWords
|
sl@0
|
605 |
//
|
sl@0
|
606 |
if(aTrigger & ERxAllBytes)
|
sl@0
|
607 |
{
|
sl@0
|
608 |
aCb->SetRxWords(iNumWordsWereRx);
|
sl@0
|
609 |
if(iRxTxUnderOverRun & ERxUnderrun)
|
sl@0
|
610 |
{
|
sl@0
|
611 |
aTrigger|=ERxUnderrun;
|
sl@0
|
612 |
iRxTxUnderOverRun&= ~ERxUnderrun;
|
sl@0
|
613 |
}
|
sl@0
|
614 |
if(iRxTxUnderOverRun & ERxOverrun)
|
sl@0
|
615 |
{
|
sl@0
|
616 |
aTrigger|=ERxOverrun;
|
sl@0
|
617 |
iRxTxUnderOverRun&= ~ERxOverrun;
|
sl@0
|
618 |
}
|
sl@0
|
619 |
}
|
sl@0
|
620 |
if(aTrigger & ETxAllBytes)
|
sl@0
|
621 |
{
|
sl@0
|
622 |
aCb->SetTxWords(iNumWordsWereTx);
|
sl@0
|
623 |
if(iRxTxUnderOverRun & ETxUnderrun)
|
sl@0
|
624 |
{
|
sl@0
|
625 |
aTrigger|=ETxUnderrun;
|
sl@0
|
626 |
iRxTxUnderOverRun&= ~ETxUnderrun;
|
sl@0
|
627 |
}
|
sl@0
|
628 |
if(iRxTxUnderOverRun & ETxOverrun)
|
sl@0
|
629 |
{
|
sl@0
|
630 |
aTrigger|=ETxOverrun;
|
sl@0
|
631 |
iRxTxUnderOverRun&= ~ETxOverrun;
|
sl@0
|
632 |
}
|
sl@0
|
633 |
}
|
sl@0
|
634 |
|
sl@0
|
635 |
aCb->SetTrigger(aTrigger);
|
sl@0
|
636 |
}
|
sl@0
|
637 |
|
sl@0
|
638 |
TInt DSimulatedIicBusChannelSlaveI2c::StaticExtension(TUint aFunction, TAny* aParam1, TAny* aParam2)
|
sl@0
|
639 |
{
|
sl@0
|
640 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c::StaticExtension\n"));
|
sl@0
|
641 |
#ifdef IIC_INSTRUMENTATION_MACRO
|
sl@0
|
642 |
IIC_SSTATEXT_START_PSL_TRACE;
|
sl@0
|
643 |
#endif
|
sl@0
|
644 |
// Test values of aFunction were shifted left one place by the (test) client driver
|
sl@0
|
645 |
// and for Slave values the two msb were cleared
|
sl@0
|
646 |
// Return to its original value.
|
sl@0
|
647 |
if(aFunction>KTestControlIoPilOffset)
|
sl@0
|
648 |
{
|
sl@0
|
649 |
aFunction |= 0xC0000000;
|
sl@0
|
650 |
aFunction >>= 1;
|
sl@0
|
651 |
}
|
sl@0
|
652 |
TInt r = KErrNone;
|
sl@0
|
653 |
switch(aFunction)
|
sl@0
|
654 |
{
|
sl@0
|
655 |
case(RBusDevIicClient::ECtlIoDumpChan):
|
sl@0
|
656 |
{
|
sl@0
|
657 |
#ifdef _DEBUG
|
sl@0
|
658 |
DumpChannel();
|
sl@0
|
659 |
#endif
|
sl@0
|
660 |
break;
|
sl@0
|
661 |
}
|
sl@0
|
662 |
case(RBusDevIicClient::ECtlIoDeRegChan):
|
sl@0
|
663 |
{
|
sl@0
|
664 |
#ifndef STANDALONE_CHANNEL
|
sl@0
|
665 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c: deregister channel\n"));
|
sl@0
|
666 |
// DIicBusController::DeRegisterChannel just removes the channel from the array of channels available
|
sl@0
|
667 |
r=DIicBusController::DeRegisterChannel(this);
|
sl@0
|
668 |
#else
|
sl@0
|
669 |
r = KErrNotSupported;
|
sl@0
|
670 |
#endif
|
sl@0
|
671 |
break;
|
sl@0
|
672 |
}
|
sl@0
|
673 |
|
sl@0
|
674 |
case(RBusDevIicClient::ECtrlIoRxWords):
|
sl@0
|
675 |
{
|
sl@0
|
676 |
// Simulate receipt of a number of bytes
|
sl@0
|
677 |
// aParam1 represents the ChannelId
|
sl@0
|
678 |
// aParam2 specifies the number of bytes
|
sl@0
|
679 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c: ECtrlIoRxWords, channelId=0x%x, numBytes=0x%x\n",aParam1,aParam2));
|
sl@0
|
680 |
|
sl@0
|
681 |
// Load the buffer with simulated data
|
sl@0
|
682 |
if(iRxBuf == NULL)
|
sl@0
|
683 |
{
|
sl@0
|
684 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c: ECtrlIoRxWords, ERROR, iRxBuf == NULL\n"));
|
sl@0
|
685 |
r=KErrGeneral;
|
sl@0
|
686 |
break;
|
sl@0
|
687 |
}
|
sl@0
|
688 |
// Check for overrun-underrun conditions
|
sl@0
|
689 |
TInt trigger=ERxAllBytes;
|
sl@0
|
690 |
iNumWordsWereRx=(TInt8)((TInt)aParam2);
|
sl@0
|
691 |
iDeltaWordsToRx = (TInt8)(iNumWordsWereRx - iNumRxWords);
|
sl@0
|
692 |
if(iDeltaWordsToRx>0)
|
sl@0
|
693 |
{
|
sl@0
|
694 |
iNumWordsWereRx=iNumRxWords;
|
sl@0
|
695 |
iRxTxUnderOverRun |= ERxOverrun;
|
sl@0
|
696 |
}
|
sl@0
|
697 |
if(iDeltaWordsToRx<0)
|
sl@0
|
698 |
iRxTxUnderOverRun |= ERxUnderrun;
|
sl@0
|
699 |
|
sl@0
|
700 |
TInt8* ptr=(TInt8*)(iRxBuf+iRxOffset);
|
sl@0
|
701 |
TInt8 startVal=0x10;
|
sl@0
|
702 |
for(TInt8 numWords=0; numWords<iNumWordsWereRx; numWords++,startVal++)
|
sl@0
|
703 |
{
|
sl@0
|
704 |
for(TInt wordByte=0; wordByte<iRxGranularity; wordByte++,ptr++)
|
sl@0
|
705 |
{
|
sl@0
|
706 |
*ptr=startVal;
|
sl@0
|
707 |
}
|
sl@0
|
708 |
}
|
sl@0
|
709 |
if(iBlockNotification == EFalse)
|
sl@0
|
710 |
{
|
sl@0
|
711 |
//
|
sl@0
|
712 |
// Invoke DIicBusChannelSlave::NotifyClient - this will invoke ProcessData and invoke the client callback
|
sl@0
|
713 |
NotifyClient(trigger);
|
sl@0
|
714 |
}
|
sl@0
|
715 |
else
|
sl@0
|
716 |
{
|
sl@0
|
717 |
// Save the trigger value to notify when prompted.
|
sl@0
|
718 |
iBlockedTrigger=trigger;
|
sl@0
|
719 |
}
|
sl@0
|
720 |
break;
|
sl@0
|
721 |
|
sl@0
|
722 |
}
|
sl@0
|
723 |
|
sl@0
|
724 |
case(RBusDevIicClient::ECtrlIoUnblockNotification):
|
sl@0
|
725 |
{
|
sl@0
|
726 |
iBlockNotification=EFalse;
|
sl@0
|
727 |
NotifyClient(iBlockedTrigger);
|
sl@0
|
728 |
iBlockedTrigger=0;
|
sl@0
|
729 |
break;
|
sl@0
|
730 |
}
|
sl@0
|
731 |
|
sl@0
|
732 |
case(RBusDevIicClient::ECtrlIoBlockNotification):
|
sl@0
|
733 |
{
|
sl@0
|
734 |
iBlockNotification=ETrue;
|
sl@0
|
735 |
break;
|
sl@0
|
736 |
}
|
sl@0
|
737 |
|
sl@0
|
738 |
case(RBusDevIicClient::ECtrlIoTxWords):
|
sl@0
|
739 |
{
|
sl@0
|
740 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c: ECtrlIoTxWords, aParam1=0x%x, aParam2=0x%x\n",aParam1,aParam2));
|
sl@0
|
741 |
// Simulate transmission of a number of bytes
|
sl@0
|
742 |
// aParam1 represents the ChannelId
|
sl@0
|
743 |
// aParam2 specifies the number of bytes
|
sl@0
|
744 |
// Load the buffer with simulated data
|
sl@0
|
745 |
if(iTxBuf == NULL)
|
sl@0
|
746 |
{
|
sl@0
|
747 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c: ECtrlIoTxWords, ERROR, iTxBuf==NULL\n"));
|
sl@0
|
748 |
r=KErrGeneral;
|
sl@0
|
749 |
break;
|
sl@0
|
750 |
}
|
sl@0
|
751 |
// Check for overrun-underrun conditions
|
sl@0
|
752 |
TInt trigger=ETxAllBytes;
|
sl@0
|
753 |
iNumWordsWereTx=(TInt8)((TInt)aParam2);
|
sl@0
|
754 |
iDeltaWordsToTx = (TInt8)(iNumWordsWereTx - iNumTxWords);
|
sl@0
|
755 |
if(iDeltaWordsToTx>0)
|
sl@0
|
756 |
{
|
sl@0
|
757 |
iNumWordsWereTx=iNumTxWords;
|
sl@0
|
758 |
iRxTxUnderOverRun |= ETxUnderrun;
|
sl@0
|
759 |
}
|
sl@0
|
760 |
if(iDeltaWordsToTx<0)
|
sl@0
|
761 |
iRxTxUnderOverRun |= ETxOverrun;
|
sl@0
|
762 |
|
sl@0
|
763 |
// Initialise the check buffer
|
sl@0
|
764 |
if(iTxCheckBuf!=NULL)
|
sl@0
|
765 |
delete iTxCheckBuf;
|
sl@0
|
766 |
// iTxCheckBuf is a member of class DSimulatedIicBusChannelSlaveI2c, which
|
sl@0
|
767 |
// is created here, and deleted not in ~DSimulatedIicBusChannelSlaveI2c()
|
sl@0
|
768 |
// but from client side. This is because in t_iic,
|
sl@0
|
769 |
// we put a memory leak checking macro __KHEAP_MARKEND before
|
sl@0
|
770 |
// the pdd gets unloaded which will call ~DSimulatedIicBusChannelSlaveI2c().
|
sl@0
|
771 |
// If we delete iTxCheckBuf in ~DSimulatedIicBusChannelSlaveI2c(),
|
sl@0
|
772 |
// we will get a memory leak panic in __KHEAP_MARKEND.
|
sl@0
|
773 |
// To support the test code, we moved iTxCheckBuf deletion to the client side.
|
sl@0
|
774 |
iTxCheckBuf = new TInt8[iNumTxWords*iTxGranularity];
|
sl@0
|
775 |
memset(iTxCheckBuf,0,(iNumTxWords*iTxGranularity));
|
sl@0
|
776 |
|
sl@0
|
777 |
TInt8* srcPtr=(TInt8*)(iTxBuf+iTxOffset);
|
sl@0
|
778 |
TInt8* dstPtr=iTxCheckBuf;
|
sl@0
|
779 |
for(TInt8 numWords=0; numWords<iNumWordsWereTx; numWords++)
|
sl@0
|
780 |
{
|
sl@0
|
781 |
for(TInt wordByte=0; wordByte<iTxGranularity; wordByte++)
|
sl@0
|
782 |
*dstPtr++=*srcPtr++;
|
sl@0
|
783 |
}
|
sl@0
|
784 |
if(iBlockNotification == EFalse)
|
sl@0
|
785 |
{
|
sl@0
|
786 |
//
|
sl@0
|
787 |
// Invoke DIicBusChannelSlave::NotifyClient - this will invoke ProcessData and invoke the client callback
|
sl@0
|
788 |
NotifyClient(trigger);
|
sl@0
|
789 |
}
|
sl@0
|
790 |
else
|
sl@0
|
791 |
{
|
sl@0
|
792 |
// Save the trigger value to notify when prompted.
|
sl@0
|
793 |
iBlockedTrigger=trigger;
|
sl@0
|
794 |
}
|
sl@0
|
795 |
break;
|
sl@0
|
796 |
}
|
sl@0
|
797 |
|
sl@0
|
798 |
case(RBusDevIicClient::ECtrlIoRxTxWords):
|
sl@0
|
799 |
{
|
sl@0
|
800 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c: ECtrlIoRxTxWords, aParam1=0x%x, aParam2=0x%x\n",aParam1,aParam2));
|
sl@0
|
801 |
// Simulate transmission of a number of bytes
|
sl@0
|
802 |
// aParam1 represents the ChannelId
|
sl@0
|
803 |
// aParam2 represents a pointer to the two numbers of bytes
|
sl@0
|
804 |
// Check the buffers are available
|
sl@0
|
805 |
if(iTxBuf == NULL)
|
sl@0
|
806 |
{
|
sl@0
|
807 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c: ECtrlIoRxTxWords, ERROR, iTxBuf==NULL\n"));
|
sl@0
|
808 |
r=KErrGeneral;
|
sl@0
|
809 |
break;
|
sl@0
|
810 |
}
|
sl@0
|
811 |
if(iRxBuf == NULL)
|
sl@0
|
812 |
{
|
sl@0
|
813 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c: ECtrlIoRxTxWords, ERROR, iRxBuf==NULL\n"));
|
sl@0
|
814 |
r=KErrGeneral;
|
sl@0
|
815 |
break;
|
sl@0
|
816 |
}
|
sl@0
|
817 |
// Check for overrun-underrun conditions
|
sl@0
|
818 |
TInt trigger=ETxAllBytes|ERxAllBytes;
|
sl@0
|
819 |
iNumWordsWereRx=(TInt8)(*(TInt*)aParam2);
|
sl@0
|
820 |
TInt* tempPtr=((TInt*)(aParam2));
|
sl@0
|
821 |
iNumWordsWereTx=(TInt8)(*(++tempPtr));
|
sl@0
|
822 |
|
sl@0
|
823 |
iDeltaWordsToTx = (TInt8)(iNumWordsWereTx - iNumTxWords);
|
sl@0
|
824 |
if(iDeltaWordsToTx>0)
|
sl@0
|
825 |
{
|
sl@0
|
826 |
iNumWordsWereTx=iNumTxWords;
|
sl@0
|
827 |
iRxTxUnderOverRun |= ETxUnderrun;
|
sl@0
|
828 |
}
|
sl@0
|
829 |
if(iDeltaWordsToTx<0)
|
sl@0
|
830 |
iRxTxUnderOverRun |= ETxOverrun;
|
sl@0
|
831 |
|
sl@0
|
832 |
|
sl@0
|
833 |
iDeltaWordsToRx = (TInt8)(iNumWordsWereRx - iNumRxWords);
|
sl@0
|
834 |
if(iDeltaWordsToRx>0)
|
sl@0
|
835 |
{
|
sl@0
|
836 |
iNumWordsWereRx=iNumRxWords;
|
sl@0
|
837 |
iRxTxUnderOverRun |= ERxOverrun;
|
sl@0
|
838 |
}
|
sl@0
|
839 |
if(iDeltaWordsToRx<0)
|
sl@0
|
840 |
iRxTxUnderOverRun |= ERxUnderrun;
|
sl@0
|
841 |
|
sl@0
|
842 |
|
sl@0
|
843 |
// Initialise the buffers
|
sl@0
|
844 |
if(iTxCheckBuf!=NULL)
|
sl@0
|
845 |
delete iTxCheckBuf;
|
sl@0
|
846 |
iTxCheckBuf = new TInt8[iNumTxWords*iTxGranularity];
|
sl@0
|
847 |
memset(iTxCheckBuf,0,(iNumTxWords*iTxGranularity));
|
sl@0
|
848 |
|
sl@0
|
849 |
TInt8* srcPtr=(TInt8*)(iTxBuf+iTxOffset);
|
sl@0
|
850 |
TInt8* dstPtr=iTxCheckBuf;
|
sl@0
|
851 |
TInt8 numWords=0;
|
sl@0
|
852 |
for(numWords=0; numWords<iNumWordsWereTx; numWords++)
|
sl@0
|
853 |
{
|
sl@0
|
854 |
for(TInt wordByte=0; wordByte<iTxGranularity; wordByte++)
|
sl@0
|
855 |
*dstPtr++=*srcPtr++;
|
sl@0
|
856 |
}
|
sl@0
|
857 |
|
sl@0
|
858 |
TInt8* ptr=(TInt8*)(iRxBuf+iRxOffset);
|
sl@0
|
859 |
TInt8 startVal=0x10;
|
sl@0
|
860 |
for(numWords=0; numWords<iNumWordsWereRx; numWords++,startVal++)
|
sl@0
|
861 |
{
|
sl@0
|
862 |
for(TInt wordByte=0; wordByte<iRxGranularity; wordByte++,ptr++)
|
sl@0
|
863 |
{
|
sl@0
|
864 |
*ptr=startVal;
|
sl@0
|
865 |
}
|
sl@0
|
866 |
}
|
sl@0
|
867 |
|
sl@0
|
868 |
if(iBlockNotification == EFalse)
|
sl@0
|
869 |
{
|
sl@0
|
870 |
//
|
sl@0
|
871 |
// Invoke DIicBusChannelSlave::NotifyClient - this will invoke ProcessData and invoke the client callback
|
sl@0
|
872 |
NotifyClient(trigger);
|
sl@0
|
873 |
}
|
sl@0
|
874 |
else
|
sl@0
|
875 |
{
|
sl@0
|
876 |
// Save the trigger value to notify when prompted.
|
sl@0
|
877 |
iBlockedTrigger=trigger;
|
sl@0
|
878 |
}
|
sl@0
|
879 |
break;
|
sl@0
|
880 |
}
|
sl@0
|
881 |
|
sl@0
|
882 |
case(RBusDevIicClient::ECtrlIoTxChkBuf):
|
sl@0
|
883 |
{
|
sl@0
|
884 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c: ECtrlIoTxChkBuf, aParam1=0x%x, aParam2=0x%x\n",aParam1,aParam2));
|
sl@0
|
885 |
// Return the address of iTxCheckBuf to the address pointed to by a1
|
sl@0
|
886 |
// Both the simulated bus channel and the slave client are resident in the client process
|
sl@0
|
887 |
// so the client can use the pointer value for direct access
|
sl@0
|
888 |
TInt8** ptr = (TInt8**)aParam1;
|
sl@0
|
889 |
*ptr=iTxCheckBuf;
|
sl@0
|
890 |
break;
|
sl@0
|
891 |
}
|
sl@0
|
892 |
|
sl@0
|
893 |
case(RBusDevIicClient::ECtlIoBusError):
|
sl@0
|
894 |
{
|
sl@0
|
895 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c: ECtlIoBusError\n"));
|
sl@0
|
896 |
NotifyClient(EGeneralBusError);
|
sl@0
|
897 |
break;
|
sl@0
|
898 |
}
|
sl@0
|
899 |
|
sl@0
|
900 |
case(RBusDevIicClient::ECtrlIoUpdTimeout):
|
sl@0
|
901 |
{
|
sl@0
|
902 |
// For this test, do the following for the Master and Client timeout values:
|
sl@0
|
903 |
// (1) Read the current timeout value and check that it is set to the default
|
sl@0
|
904 |
// (2) Check setting to a neagtive value fails
|
sl@0
|
905 |
// (3) Set it to a new, different value
|
sl@0
|
906 |
// (4) Read it back to check success
|
sl@0
|
907 |
// (5) Return to the original value, and readback to confirm
|
sl@0
|
908 |
I2C_PRINT(("DSimulatedIicBusChannelSlaveI2c ECtrlIoUpdTimeout \n"));
|
sl@0
|
909 |
|
sl@0
|
910 |
TInt timeout = 0;
|
sl@0
|
911 |
TInt r=KErrNone;
|
sl@0
|
912 |
// Master timeout
|
sl@0
|
913 |
timeout=GetMasterWaitTime();
|
sl@0
|
914 |
if(timeout!=KSlaveDefMWaitTime)
|
sl@0
|
915 |
{
|
sl@0
|
916 |
I2C_PRINT(("ERROR: Initial Master Wait time != KSlaveDefMWaitTime (=%d) \n",timeout));
|
sl@0
|
917 |
return KErrGeneral;
|
sl@0
|
918 |
}
|
sl@0
|
919 |
r=SetMasterWaitTime(-1);
|
sl@0
|
920 |
if(r!=KErrArgument)
|
sl@0
|
921 |
{
|
sl@0
|
922 |
I2C_PRINT(("ERROR: Attempt to set negative Master wait time not rejected\n"));
|
sl@0
|
923 |
return KErrGeneral;
|
sl@0
|
924 |
}
|
sl@0
|
925 |
r=SetMasterWaitTime(KSlaveDefCWaitTime);
|
sl@0
|
926 |
if(r!=KErrNone)
|
sl@0
|
927 |
{
|
sl@0
|
928 |
I2C_PRINT(("ERROR: Attempt to set new valid Master wait time (%d) rejected\n",KSlaveDefCWaitTime));
|
sl@0
|
929 |
return KErrGeneral;
|
sl@0
|
930 |
}
|
sl@0
|
931 |
timeout=GetMasterWaitTime();
|
sl@0
|
932 |
if(timeout!=KSlaveDefCWaitTime)
|
sl@0
|
933 |
{
|
sl@0
|
934 |
I2C_PRINT(("ERROR: Master Wait time read back has unexpected value (=%d) \n",timeout));
|
sl@0
|
935 |
return KErrGeneral;
|
sl@0
|
936 |
}
|
sl@0
|
937 |
r=SetMasterWaitTime(KSlaveDefMWaitTime);
|
sl@0
|
938 |
if(r!=KErrNone)
|
sl@0
|
939 |
{
|
sl@0
|
940 |
I2C_PRINT(("ERROR: Attempt to set reset Master wait time (%d) rejected\n",KSlaveDefMWaitTime));
|
sl@0
|
941 |
return KErrGeneral;
|
sl@0
|
942 |
}
|
sl@0
|
943 |
timeout=GetMasterWaitTime();
|
sl@0
|
944 |
if(timeout!=KSlaveDefMWaitTime)
|
sl@0
|
945 |
{
|
sl@0
|
946 |
I2C_PRINT(("ERROR: Master Wait time read back of reset time has unexpected value (=%d) \n",timeout));
|
sl@0
|
947 |
return KErrGeneral;
|
sl@0
|
948 |
}
|
sl@0
|
949 |
// Client timeout
|
sl@0
|
950 |
timeout=GetClientWaitTime();
|
sl@0
|
951 |
if(timeout!=KSlaveDefCWaitTime)
|
sl@0
|
952 |
{
|
sl@0
|
953 |
I2C_PRINT(("ERROR: Initial Client Wait time != KSlaveDefCWaitTime (=%d) \n",timeout));
|
sl@0
|
954 |
return KErrGeneral;
|
sl@0
|
955 |
}
|
sl@0
|
956 |
r=SetClientWaitTime(-1);
|
sl@0
|
957 |
if(r!=KErrArgument)
|
sl@0
|
958 |
{
|
sl@0
|
959 |
I2C_PRINT(("ERROR: Attempt to set negative Client wait time not rejected\n"));
|
sl@0
|
960 |
return KErrGeneral;
|
sl@0
|
961 |
}
|
sl@0
|
962 |
r=SetClientWaitTime(KSlaveDefMWaitTime+1);
|
sl@0
|
963 |
if(r!=KErrNone)
|
sl@0
|
964 |
{
|
sl@0
|
965 |
I2C_PRINT(("ERROR: Attempt to set new valid Client wait time (%d) rejected\n",KSlaveDefMWaitTime));
|
sl@0
|
966 |
return KErrGeneral;
|
sl@0
|
967 |
}
|
sl@0
|
968 |
timeout=GetClientWaitTime();
|
sl@0
|
969 |
if(timeout!=KSlaveDefMWaitTime+1)
|
sl@0
|
970 |
{
|
sl@0
|
971 |
I2C_PRINT(("ERROR: Client Wait time read back has unexpected value (=%d) \n",timeout));
|
sl@0
|
972 |
return KErrGeneral;
|
sl@0
|
973 |
}
|
sl@0
|
974 |
r=SetClientWaitTime(KSlaveDefCWaitTime);
|
sl@0
|
975 |
if(r!=KErrNone)
|
sl@0
|
976 |
{
|
sl@0
|
977 |
I2C_PRINT(("ERROR: Attempt to set reset Client wait time (%d) rejected\n",KSlaveDefCWaitTime));
|
sl@0
|
978 |
return KErrGeneral;
|
sl@0
|
979 |
}
|
sl@0
|
980 |
timeout=GetClientWaitTime();
|
sl@0
|
981 |
if(timeout!=KSlaveDefCWaitTime)
|
sl@0
|
982 |
{
|
sl@0
|
983 |
I2C_PRINT(("ERROR: Client Wait time read back of reset time has unexpected value (=%d) \n",timeout));
|
sl@0
|
984 |
return KErrGeneral;
|
sl@0
|
985 |
}
|
sl@0
|
986 |
break;
|
sl@0
|
987 |
}
|
sl@0
|
988 |
|
sl@0
|
989 |
default:
|
sl@0
|
990 |
{
|
sl@0
|
991 |
Kern::Printf("aFunction %d is not recognised \n",aFunction);
|
sl@0
|
992 |
r=KErrNotSupported;
|
sl@0
|
993 |
}
|
sl@0
|
994 |
}
|
sl@0
|
995 |
#ifdef IIC_INSTRUMENTATION_MACRO
|
sl@0
|
996 |
IIC_SSTATEXT_END_PSL_TRACE;
|
sl@0
|
997 |
#endif
|
sl@0
|
998 |
return r;
|
sl@0
|
999 |
}
|
sl@0
|
1000 |
|
sl@0
|
1001 |
|
sl@0
|
1002 |
|
sl@0
|
1003 |
//#ifdef MASTER_MODE
|
sl@0
|
1004 |
#endif
|
sl@0
|
1005 |
|
sl@0
|
1006 |
#if defined(MASTER_MODE) && defined(SLAVE_MODE)
|
sl@0
|
1007 |
#ifdef STANDALONE_CHANNEL
|
sl@0
|
1008 |
EXPORT_C
|
sl@0
|
1009 |
#endif
|
sl@0
|
1010 |
DSimulatedIicBusChannelMasterSlaveI2c::DSimulatedIicBusChannelMasterSlaveI2c(TBusType /*aBusType*/, TChannelDuplex aChanDuplex, DSimulatedIicBusChannelMasterI2c* aMasterChan, DSimulatedIicBusChannelSlaveI2c* aSlaveChan)
|
sl@0
|
1011 |
: DIicBusChannelMasterSlave(EI2c, aChanDuplex, aMasterChan, aSlaveChan)
|
sl@0
|
1012 |
{}
|
sl@0
|
1013 |
|
sl@0
|
1014 |
TInt DSimulatedIicBusChannelMasterSlaveI2c::StaticExtension(TUint aFunction, TAny* /*aParam1*/, TAny* /*aParam2*/)
|
sl@0
|
1015 |
{
|
sl@0
|
1016 |
I2C_PRINT(("DSimulatedIicBusChannelMasterSlaveI2c::StaticExtension, aFunction=0x%x\n",aFunction));
|
sl@0
|
1017 |
TInt r = KErrNone;
|
sl@0
|
1018 |
|
sl@0
|
1019 |
// Test values of aFunction were shifted left one place by the (test) client driver
|
sl@0
|
1020 |
// Return to its original value.
|
sl@0
|
1021 |
if(aFunction>KTestControlIoPilOffset)
|
sl@0
|
1022 |
aFunction >>= 1;
|
sl@0
|
1023 |
switch(aFunction)
|
sl@0
|
1024 |
{
|
sl@0
|
1025 |
case(RBusDevIicClient::ECtlIoDumpChan):
|
sl@0
|
1026 |
{
|
sl@0
|
1027 |
#ifdef _DEBUG
|
sl@0
|
1028 |
DumpChannel();
|
sl@0
|
1029 |
#endif
|
sl@0
|
1030 |
break;
|
sl@0
|
1031 |
}
|
sl@0
|
1032 |
case(RBusDevIicClient::ECtlIoDeRegChan):
|
sl@0
|
1033 |
{
|
sl@0
|
1034 |
I2C_PRINT(("DSimulatedIicBusChannelMasterSlaveI2c: deregister channel\n"));
|
sl@0
|
1035 |
#ifndef STANDALONE_CHANNEL
|
sl@0
|
1036 |
r=DIicBusController::DeRegisterChannel(this);
|
sl@0
|
1037 |
#else
|
sl@0
|
1038 |
return KErrNotSupported;
|
sl@0
|
1039 |
#endif
|
sl@0
|
1040 |
break;
|
sl@0
|
1041 |
}
|
sl@0
|
1042 |
case(RBusDevIicClient::ECtlIoBlockReqCompletion):
|
sl@0
|
1043 |
{
|
sl@0
|
1044 |
I2C_PRINT(("DSimulatedIicBusChannelMasterSlaveI2c::Blocking request completion\n"));
|
sl@0
|
1045 |
((DSimulatedIicBusChannelMasterI2c*)iMasterChannel)->SetRequestDelayed(((DSimulatedIicBusChannelMasterI2c*)iMasterChannel), ETrue);
|
sl@0
|
1046 |
break;
|
sl@0
|
1047 |
}
|
sl@0
|
1048 |
case(RBusDevIicClient::ECtlIoUnblockReqCompletion):
|
sl@0
|
1049 |
{
|
sl@0
|
1050 |
I2C_PRINT(("DSimulatedIicBusChannelMasterSlaveI2c::Unlocking request completion\n"));
|
sl@0
|
1051 |
((DSimulatedIicBusChannelMasterI2c*)iMasterChannel)->SetRequestDelayed(((DSimulatedIicBusChannelMasterI2c*)iMasterChannel), EFalse);
|
sl@0
|
1052 |
break;
|
sl@0
|
1053 |
}
|
sl@0
|
1054 |
default:
|
sl@0
|
1055 |
{
|
sl@0
|
1056 |
Kern::Printf("aFunction %d is not recognised \n",aFunction);
|
sl@0
|
1057 |
r=KErrNotSupported;
|
sl@0
|
1058 |
}
|
sl@0
|
1059 |
}
|
sl@0
|
1060 |
return r;
|
sl@0
|
1061 |
}
|
sl@0
|
1062 |
|
sl@0
|
1063 |
|
sl@0
|
1064 |
//#if defined(MASTER_MODE) && defined(SLAVE_MODE)
|
sl@0
|
1065 |
#endif
|
sl@0
|
1066 |
|
sl@0
|
1067 |
|
sl@0
|
1068 |
|