// Copyright (c) 1997-2009 Nokia Corporation and/or its subsidiary(-ies).

// All rights reserved.

// This component and the accompanying materials are made available

// under the terms of the License "Eclipse Public License v1.0"

// which accompanies this distribution, and is available

// at the URL "http://www.eclipse.org/legal/epl-v10.html".

//

// Initial Contributors:

// Nokia Corporation - initial contribution.

//

// Contributors:

//

// Description:

// e32\nkern\arm\ncsched.cia

// 

//

// NThreadBase member data

#define __INCLUDE_NTHREADBASE_DEFINES__

// TDfc member data

#define __INCLUDE_TDFC_DEFINES__

#include <e32cia.h>

#include <arm.h>

#include "highrestimer.h"

#include "nkern.h"

#include "emievents.h"

#if defined(MONITOR_THREAD_CPU_TIME) && !defined(HAS_HIGH_RES_TIMER)

#error MONITOR_THREAD_CPU_TIME is defined, but high res timer is not supported

#endif

#ifdef _DEBUG

#define ASM_KILL_LINK(rp,rs)	asm("mov "#rs", #0xdf ");\

								asm("orr "#rs", "#rs", "#rs", lsl #8 ");\

								asm("orr "#rs", "#rs", "#rs", lsl #16 ");\

								asm("str "#rs", ["#rp"] ");\

								asm("str "#rs", ["#rp", #4] ");

#else

#define ASM_KILL_LINK(rp,rs)

#endif

#define ALIGN_STACK_START			\

	asm("mov r12, sp");				\

	asm("tst sp, #4");				\

	asm("subeq sp, sp, #4");		\

	asm("str r12, [sp,#-4]!")

#define ALIGN_STACK_END				\

	asm("ldr sp, [sp]")

#ifdef __CPU_HAS_VFP

#ifdef __CPU_HAS_COPROCESSOR_ACCESS_REG

#define	FPEXC_REG	10

#define	FPEXC_REG3	4

#else

#define	FPEXC_REG	11

#define	FPEXC_REG3	10

#endif

#endif

//////////////////////////////////////////////////////////////////////////////

//	Macros to define which standard ARM registers are used to save 

//	required co-processor registers on a reschedule.

//	They rely on the fact that the compiler will concatenate adjacent strings

//	so "r" "9" "," "r" "10" "," will be converted in the assembler file to:

//		r9,r10

/////////////////////////////////////////////////////////////////////////////

#ifdef __CPU_HAS_CP15_THREAD_ID_REG

#define TID_SP_REG(reg)		"r"#reg","

#else

#define TID_SP_REG(reg)

#endif //__CPU_HAS_CP15_THREAD_ID_REG

#ifdef __CPU_HAS_VFP

#define FPEXC_SP_REG(reg) 	"r"#reg","

#else

#define FPEXC_SP_REG(reg)

#endif //__CPU_HAS_VFP

#ifdef __CPU_HAS_COPROCESSOR_ACCESS_REG

#define CAR_SP_REG(reg)		"r"#reg","

#else

#define CAR_SP_REG(reg)

#endif //__CPU_HAS_COPROCESSOR_ACCESS_REG

#ifdef __CPU_ARM_USE_DOMAINS

#define DACR_SP_REG(reg)	"r"#reg","

#else

#define DACR_SP_REG(reg)

#endif //__CPU_ARM_USE_DOMAINS

#ifdef __CPU_SUPPORT_THUMB2EE

#define THUMB2EE_SP_REG(reg)	"r"#reg","

#else 

#define THUMB2EE_SP_REG(reg)

#endif  // __CPU_SUPPORT_THUMB2EE

//	NOTE THIS WILL PRODUCE A WARNING IF REGISTERS ARE NOT IN ASCENDING ORDER

#define EXTRA_STACK_LIST(thumb2ee, tid, fpexc, car, dacr)\

THUMB2EE_SP_REG(thumb2ee) TID_SP_REG(tid) FPEXC_SP_REG(fpexc) CAR_SP_REG(car) DACR_SP_REG(dacr)

//////////////////////////////////////////////////////////////////////////////

//#define __DEBUG_BAD_ADDR

extern "C" void PanicFastSemaphoreWait();

#ifdef __DFC_MACHINE_CODED__

__ASSERT_COMPILE(_FOFF(TDfcQue,iPresent) == 0);	

__ASSERT_COMPILE(_FOFF(TDfc,iNext) == 0);

__ASSERT_COMPILE(_FOFF(TDfc,iPrev) == 4);

__ASSERT_COMPILE(_FOFF(TDfc,iPriority) % 4 == 0);	

__ASSERT_COMPILE(_FOFF(TDfc,iOnFinalQ) == _FOFF(TDfc,iPriority) + 2);	

__ASSERT_COMPILE(_FOFF(TDfc,iQueued) == _FOFF(TDfc,iOnFinalQ) + 1);	

__NAKED__ void TDfcQue::ThreadFunction(TAny* /*aDfcQ*/)

	{

	asm("ldr r11, __TheScheduler2 ");

	asm("mov r4, r0 ");					// r4=aDfcQ

	asm("ldr r10, [r11, #%a0]" : : "i" _FOFF(TScheduler,iCurrentThread));

	asm("mov r7, #0 ");

	asm("mov r9, #1 ");

	SET_INTS_1(r5, MODE_SVC, INTS_ALL_ON);

	SET_INTS_1(r6, MODE_SVC, INTS_ALL_OFF);

	asm("dfc_thrd_fn_check_queue: ");

	SET_INTS_2(r5, MODE_SVC, INTS_ALL_ON);	// enable interrupts

	asm("dfc_thrd_fn_check_queue2: ");

	asm("str r9, [r11, #%a0]" : : "i" _FOFF(TScheduler,iKernCSLocked));	// lock the kernel

	asm("ldr r3, [r4, #%a0]" : : "i" _FOFF(TDfcQue,iPresent));			// r3=aDfcQ->iPresent

	asm("add lr, r4, #%a0" : :  "i" _FOFF(TDfcQue,iQueue));				// lr=address of priority 0 queue

#ifdef __CPU_ARM_HAS_CLZ

	CLZ(12,3);							// r12=31-MSB(r3), 32 if r3=0

	asm("rsbs r12, r12, #31 ");			// r12=ms bit number set, -1 if queue empty

	asm("bmi dfc_thrd_fn_wait ");		// if empty, wait for next request

#else

	asm("movs r2, r3 ");				// check if queue empty

	asm("beq dfc_thrd_fn_wait ");		// if empty, wait for next request

	asm("mov r12, #7 ");

	asm("cmp r2, #0x10 ");

	asm("movcc r2, r2, lsl #4 ");

	asm("subcc r12, r12, #4 ");

	asm("cmp r2, #0x40 ");

	asm("movcc r2, r2, lsl #2 ");

	asm("subcc r12, r12, #2 ");

	asm("cmp r2, #0x80 ");

	asm("subcc r12, r12, #1 ");			// r12=ms bit number set

#endif

	asm("ldr r8, [lr, r12, lsl #2]! ");	// lr=address of highest priority non-empty queue, r8=address of first DFC

	asm("ldmia r8, {r0-r1} ");			// r0=first->next, r1=first->prev

	asm("cmp r0, r8 ");					// check if this is the only one at this priority

	asm("strne r0, [r1, #0] ");			// if not, prev->next=next

	asm("strne r1, [r0, #4] ");			// and next->prev=prev

	asm("streq r7, [lr] ");				// if this was only one, set head pointer for this priority to NULL

	asm("strne r0, [lr] ");				// else set head pointer to first->next

	ASM_KILL_LINK(r8,r1);

	asm("strh r7, [r8, #%a0]" : : "i" _FOFF(TDfc, iOnFinalQ));			// iOnFinalQ=iQueued=FALSE - can't touch link pointers after this

	asm("biceq r3, r3, r9, lsl r12 ");	// if no more at this priority clear bit in iPresent

	asm("streq r3, [r4, #%a0]" : : "i" _FOFF(TDfcQue,iPresent));

	SET_INTS_2(r6, MODE_SVC, INTS_ALL_OFF);	// interrupts off

	asm("ldr r3, [r11, #%a0]" : : "i" _FOFF(TScheduler,iRescheduleNeededFlag));	// check if reschedule required

	asm("cmp r3, #0 ");

	asm("streq r7, [r11, #%a0]" : : "i" _FOFF(TScheduler,iKernCSLocked));	// if no reschedule required unlock the kernel

	asm("blne  " CSM_ZN10TScheduler10RescheduleEv);	// if reschedule required, do it

	SET_INTS_2(r5, MODE_SVC, INTS_ALL_ON);	// restore interrupts

	asm("ldr r1, [r8, #%a0]" : : "i" _FOFF(TDfc, iFunction));			// r1=function address

	asm("adr lr, dfc_thrd_fn_check_queue2 ");							// set up return address

	asm("ldr r0, [r8, #%a0]" : : "i" _FOFF(TDfc, iPtr));				// r0=DFC argument

	__JUMP(,r1);						// call DFC

	asm("dfc_thrd_fn_wait: ");

	asm("mov r0, #%a0" : : "i" ((TInt)NThreadBase::EWaitDfc));

	asm("strb r0, [r10, #%a0]" : : "i" _FOFF(NThreadBase,iNState));

	asm("strb r9, [r11, #%a0]" : : "i" _FOFF(TScheduler,iRescheduleNeededFlag));

	asm("mov r0, r11 ");

	asm("mov r1, r10 ");

	asm("bl unready ");

	asm("adr lr, dfc_thrd_fn_check_queue ");	// set up return address

	asm("b  " CSM_ZN10TScheduler10RescheduleEv);

	asm("__TheScheduler2: ");

	asm(".word TheScheduler ");

	}

/** Cancels an IDFC or DFC.

	This function does nothing if the IDFC or DFC is not queued.

	@return	TRUE	if the DFC was actually dequeued by this call. In that case

					it is guaranteed that the DFC will not execute until it is

					queued again.

			FALSE	if the DFC was not queued on entry to the call, or was in

					the process of being executed or cancelled. In this case

					it is possible that the DFC executes after this call

					returns.

	@post	However in either case it is safe to delete the DFC object on

			return from this call provided only that the DFC function does not

			refer to the DFC object itself.

	@pre IDFC or thread context. Do not call from ISRs.

	@pre If the DFC function accesses the DFC object itself, the user must ensure that

	     Cancel() cannot be called while the DFC function is running.

 */

__NAKED__ EXPORT_C TBool TDfc::Cancel()

	{

	ASM_CHECK_PRECONDITIONS(MASK_NOT_ISR);

	asm("ldr r1, __TheScheduler2 ");

	asm("ldr r3, [r1, #%a0]" : : "i" _FOFF(TScheduler,iKernCSLocked));

	asm("add r3, r3, #1 ");

	asm("str r3, [r1, #%a0]" : : "i" _FOFF(TScheduler,iKernCSLocked));	// lock the kernel

	asm("ldr r2, [r0, #%a0]" : : "i" _FOFF(TDfc,iPriority));			// r2=priority/flags

	SET_INTS_1(r12, MODE_SVC, INTS_ALL_OFF);

	asm("tst r2, #0xff000000 ");		// test queued flag

	asm("moveq r0, #0 ");				// if not queued, return FALSE

	asm("beq 0f ");

	SET_INTS_2(r12, MODE_SVC, INTS_ALL_OFF);	// otherwise disable interrupts while we dequeue

	asm("ldmia r0, {r3,r12} ");			// r3=next, r12=prev

	SET_INTS_1(r1, MODE_SVC, INTS_ALL_ON);

	asm("str r3, [r12, #0] ");			// prev->next=next

	asm("str r12, [r3, #4] ");			// next->prev=prev

	SET_INTS_2(r1, MODE_SVC, INTS_ALL_ON);	// reenable interrupts

	asm("tst r2, #0x00ff0000 ");		// check iOnFinalQ

	asm("beq 1f ");						// if FALSE, finish up

	asm("ldr r1, [r0, #%a0]" : : "i" _FOFF(TDfc,iDfcQ));				// r1=iDfcQ

	asm("and r2, r2, #0xff ");			// r2=iPriority

	asm("subs r12, r3, r0 ");			// check if queue is now empty, r12=0 if it is

	asm("beq 2f ");						// branch if now empty

	asm("add r1, r1, r2, lsl #2 ");		// r1=&iDfcQ->iQueue[iPriority]-_FOFF(TDfcQue.iPriority)

	asm("ldr r12, [r1, #%a0]" : : "i" _FOFF(TDfcQue,iQueue));			// r12=iDfcQ->iQueue[iPriority]

	asm("cmp r12, r0 ");				// is this one first?

	asm("streq r3, [r1, #%a0]" : : "i" _FOFF(TDfcQue,iQueue));			// if so, iQueue[pri]=next

	asm("b 1f ");

	asm("2: ");		// r0=this, r1=iDfcQ, r2=priority, r3=next, r12=0

	asm("ldr r3, [r1], #%a0" : : "i" _FOFF(TDfcQue,iQueue));			// r3=iDfcQ->iPresent, r1=&iDfcQ->iQueue[0]

	asm("str r12, [r1, r2, lsl #2] ");	// iDfcQ->iQueue[iPriority]=NULL

	asm("mov r12, #1 ");

	asm("bic r3, r3, r12, lsl r2 ");	// clear present bit

	asm("str r3, [r1, #-%a0]" : : "i" _FOFF(TDfcQue,iQueue));

	asm("1: ");

	ASM_KILL_LINK(r0,r1);

	asm("mov r3, #0 ");

	asm("strh r3, [r0, #%a0]" : : "i" _FOFF(TDfc,iOnFinalQ));			// iOnFinalQ=iQueued=FALSE - must be done last

	// R0=this != 0 here

	asm("0: ");

	asm("stmfd sp!, {r0,lr} ");

	asm("bl  " CSM_ZN5NKern6UnlockEv);			// unlock the kernel

	__POPRET("r0,");

	}

#endif

#ifdef __FAST_SEM_MACHINE_CODED__

/** Waits on a fast semaphore.

    Decrements the signal count for the semaphore and

	removes the calling thread from the ready-list if the sempahore becomes

	unsignalled. Only the thread that owns a fast semaphore can wait on it.

	Note that this function does not block, it merely updates the NThread state,

	rescheduling will only occur when the kernel is unlocked. Generally threads

	would use NKern::FSWait() which manipulates the kernel lock for you.

	@pre The calling thread must own the semaphore.

	@pre Kernel must be locked.

	@pre No fast mutex can be held.

	@post Kernel is locked.

	@see NFastSemaphore::Signal()

	@see NKern::FSWait()

	@see NKern::Unlock()

 */

EXPORT_C __NAKED__ void NFastSemaphore::Wait()

	{

	ASM_CHECK_PRECONDITIONS(MASK_KERNEL_LOCKED|MASK_NOT_ISR|MASK_NOT_IDFC|MASK_NO_FAST_MUTEX);

	asm("mov r2, r0 ");

	asm("ldr r0, __TheScheduler ");

	asm("ldr r1, [r2, #%a0]" : : "i" _FOFF(NFastSemaphore,iOwningThread));	// r1=owning thread

	asm("ldr r3, [r0, #%a0]" : : "i" _FOFF(TScheduler,iCurrentThread));		// r3=current thread

	asm("cmp r1, r3 ");

	asm("bne PanicFastSemaphoreWait ");		// if wrong thread, fault

	// wait on a NFastSemaphore pointed to by r2

	// enter with r0=&TheScheduler, r1=the current thread, already validated

	asm("ldr r3, [r2, #%a0]" : : "i" _FOFF(NFastSemaphore,iCount));

	asm("mov r12, #%a0" : : "i" (NThread::EWaitFastSemaphore));

	asm("subs r3, r3, #1 ");

	asm("str r3, [r2, #%a0]" : : "i" _FOFF(NFastSemaphore,iCount));	// decrement iCount

	__JUMP(ge,lr);							// if result>=0, finished

	asm("str r2, [r1, #%a0]" : : "i" _FOFF(NThread,iWaitObj));

	asm("strb r12, [r1, #%a0]" : : "i" _FOFF(NThread,iNState));

	asm("mov r3, #1 ");

	asm("strb r3, [r0, #%a0]" : : "i" _FOFF(TScheduler,iRescheduleNeededFlag));

	// remove thread from ready list

	asm("b unready ");

	}

/** Waits for a signal on the current thread's I/O semaphore.

 @pre   No fast mutex can be held.

 @pre   Kernel must be unlocked.

 @pre	Call in a thread context.

 @pre	Interrupts must be enabled.

 */

EXPORT_C __NAKED__ void NKern::WaitForAnyRequest()

	{

	ASM_CHECK_PRECONDITIONS(MASK_INTERRUPTS_ENABLED|MASK_KERNEL_UNLOCKED|MASK_NOT_ISR|MASK_NOT_IDFC|MASK_NO_FAST_MUTEX);

	asm("ldr r0, __TheScheduler ");

	asm("str lr, [sp, #-4]! ");				// save lr

	asm("ldr r1, [r0, #%a0]" : : "i" _FOFF(TScheduler,iCurrentThread));

	asm("bl wait_for_any_request2 ");

	SET_INTS(r0, MODE_SVC, INTS_ALL_ON);	// turn interrupts back on

	asm("ldr pc, [sp], #4 ");

	// Special case handler for Exec::WaitForAnyRequest() for efficiency reasons

	// Called from __ArmVectorSwi with R11=&TheScheduler, R1=current thread

	// Returns with interrupts disabled

	asm(".global wait_for_any_request ");

	asm("wait_for_any_request: ");

	ASM_DEBUG0(WaitForAnyRequest);

	asm("mov r0, r11 ");

	asm("wait_for_any_request2: ");

	SET_INTS_1(r2, MODE_SVC, INTS_ALL_OFF);

#ifdef _DEBUG

	asm("ldr r3, [r0, #%a0]" : : "i" _FOFF(TScheduler,iKernCSLocked));

	asm("cmp r3, #0 ");

	asm("movne r12, #0xd8000001 ");			// FAULT - calling Exec::WaitForAnyRequest() with the kernel locked is silly

	asm("strne r12, [r12] ");

#endif

	SET_INTS_2(r2, MODE_SVC, INTS_ALL_OFF);	// turn off interrupts

	asm("ldr r2, [r1, #%a0]" : : "i" _FOFF(NThread,iRequestSemaphore.iCount));

	asm("mov r3, #1 ");

	SET_INTS_1(r12, MODE_SVC, INTS_ALL_ON);

	asm("subs r2, r2, #1 ");

	asm("str r2, [r1, #%a0]" : : "i" _FOFF(NThread,iRequestSemaphore.iCount));	// decrement iCount

	__JUMP(ge,lr);							// if result non-negative, finished

	asm("str r3, [r0, #%a0]" : : "i" _FOFF(TScheduler,iKernCSLocked));	// lock the kernel

	SET_INTS_2(r12, MODE_SVC, INTS_ALL_ON);	// reenable interrupts

	asm("strb r3, [r0, #%a0]" : : "i" _FOFF(TScheduler,iRescheduleNeededFlag));

	// r2 points to NFastSemaphore

	asm("add r2, r1, #%a0" : : "i" _FOFF(NThread,iRequestSemaphore));

	asm("str lr, [sp, #-4]! ");

	asm("str r2, [r1, #%a0]" : : "i" _FOFF(NThread,iWaitObj));

	asm("mov r3, #%a0" : : "i" (NThread::EWaitFastSemaphore));

	asm("strb r3, [r1, #%a0]" : : "i" _FOFF(NThread,iNState));	// mark thread waiting on semaphore

	asm("bl unready ");						// remove thread from ready list - DOESN'T CLOBBER R0

	asm("bl  " CSM_ZN10TScheduler10RescheduleEv);		// Reschedule

	asm("ldr lr, [sp], #4 ");

	asm("mov r3, #%a0 " : : "i" (NThread::EContextWFARCallback));

	asm("b callUserModeCallbacks ");		// exit and call callbacks

	}

/** Signals a fast semaphore multiple times.

	@pre Kernel must be locked.

	@pre Call either in a thread or an IDFC context.

	@post Kernel is locked.

	@internalComponent	

 */

EXPORT_C __NAKED__ void NFastSemaphore::SignalN(TInt /*aCount*/)

	{

	ASM_CHECK_PRECONDITIONS(MASK_KERNEL_LOCKED|MASK_NOT_ISR);

	asm("req_sem_signaln: ");

	asm("ldr r2, [r0, #%a0]" : : "i" _FOFF(NFastSemaphore,iCount));

	asm("adds r2, r2, r1 ");

	asm("str r2, [r0, #%a0]" : : "i" _FOFF(NFastSemaphore,iCount));

	__JUMP(cc,lr);							// if count did not cross 0 nothing more to do

	asm("ldr r0, [r0, #%a0]" : : "i" _FOFF(NFastSemaphore,iOwningThread));

	asm("mov r1, #0 ");

	asm("str r1, [r0, #%a0]" : : "i" _FOFF(NThread,iWaitObj));

	asm("b check_suspend_then_ready ");

	}

/** @internalComponent */

__NAKED__ void NFastSemaphore::WaitCancel()

	{

	asm("ldr r3, [r0, #%a0]" : : "i" _FOFF(NFastSemaphore,iOwningThread));

	asm("mov r1, #0 ");

	asm("str r1, [r0, #%a0]" : : "i" _FOFF(NFastSemaphore,iCount));

	asm("str r1, [r3, #%a0]" : : "i" _FOFF(NThread,iWaitObj));

	asm("mov r0, r3 ");

	asm("b check_suspend_then_ready ");

	}

/** Resets a fast semaphore.

	@pre Kernel must be locked.

	@pre Call either in a thread or an IDFC context.

	@post Kernel is locked.

	@internalComponent	

 */

EXPORT_C __NAKED__ void NFastSemaphore::Reset()

	{

	ASM_CHECK_PRECONDITIONS(MASK_KERNEL_LOCKED|MASK_NOT_ISR);

	asm("ldr r2, [r0, #%a0]" : : "i" _FOFF(NFastSemaphore,iCount));

	asm("mov r1, #0 ");

	asm("str r1, [r0, #%a0]" : : "i" _FOFF(NFastSemaphore,iCount));

	asm("cmp r2, #0 ");

	__JUMP(ge,lr);					// if count was not negative, nothing to do

	asm("ldr r0, [r0, #%a0]" : : "i" _FOFF(NFastSemaphore,iOwningThread));

	asm("mov r1, #0 ");

	asm("str r1, [r0, #%a0]" : : "i" _FOFF(NThread,iWaitObj));

	asm("b check_suspend_then_ready ");

	}

#endif

#ifdef __SCHEDULER_MACHINE_CODED__

__ASSERT_COMPILE(_FOFF(SDblQueLink,iNext) == 0);

__ASSERT_COMPILE(_FOFF(SDblQueLink,iPrev) == 4);

__ASSERT_COMPILE(_FOFF(TScheduler,iPresent) == 0);

__ASSERT_COMPILE(_FOFF(NFastSemaphore,iCount) == 0);

__ASSERT_COMPILE(_FOFF(NFastSemaphore,iOwningThread) == 4);

__ASSERT_COMPILE(_FOFF(TDfc,iPtr) == _FOFF(TDfc,iPriority) + 4);

__ASSERT_COMPILE(_FOFF(TDfc,iFunction) == _FOFF(TDfc,iPtr) + 4);

__NAKED__ void TScheduler::Remove(NThreadBase* /*aThread*/)

//

// Remove a thread from the ready list

//

	{

	asm("unready: ");

#ifdef _DEBUG

	asm("ldr r2, [r1, #%a0]" : : "i" _FOFF(NThread,iHeldFastMutex));

	asm("mov r12, #0xd8000003 ");

	asm("cmp r2, #0 ");

	asm("strne r12, [r12] ");				// crash if fast mutex held

#endif

	asm("ldr r12, [r1, #%a0]" : : "i" _FOFF(NThread,iTimeslice));

	asm("ldmia r1, {r2,r3} ");				// r2=next, r3=prev

	asm("str r12, [r1, #%a0]" : : "i" _FOFF(NThread,iTime));	// fresh timeslice for next time

	asm("pri_list_remove: ");

	ASM_KILL_LINK(r1,r12);

	asm("subs r12, r1, r2 ");				// check if more threads at this priority, r12=0 if not

	asm("bne unready_1 ");					// branch if there are more at same priority

	asm("ldrb r2, [r1, #%a0]" : : "i" _FOFF(NThread, iPriority));	// r2=thread priority

	asm("add r1, r0, #%a0" : : "i" _FOFF(TScheduler, iQueue));		// r1->iQueue[0]

	asm("str r12, [r1, r2, lsl #2] ");		// iQueue[priority]=NULL

	asm("ldrb r1, [r0, r2, lsr #3] ");		// r1=relevant byte in present mask

	asm("and r3, r2, #7 ");					// r3=priority & 7

	asm("mov r12, #1 ");

	asm("bic r1, r1, r12, lsl r3 ");		// clear bit in present mask

	asm("strb r1, [r0, r2, lsr #3] ");		// update relevant byte in present mask

	__JUMP(,lr);

	asm("unready_1: ");						// get here if there are other threads at same priority

	asm("ldrb r12, [r1, #%a0]" : : "i" _FOFF(NThread, iPriority));	// r12=thread priority

	asm("add r0, r0, #%a0" : : "i" _FOFF(TScheduler, iQueue));		// r0=&iQueue[0]

	asm("str r3, [r2, #4] ");				// next->prev=prev

	asm("ldr r12, [r0, r12, lsl #2]! ");	// r12=iQueue[priority], r0=&iQueue[priority]

	asm("str r2, [r3, #0] ");				// and prev->next=next

	asm("cmp r12, r1 ");					// if aThread was first...

	asm("streq r2, [r0, #0] ");				// iQueue[priority]=aThread->next

	__JUMP(,lr);							// finished

	}

/** Removes an item from a priority list.

	@param aLink A pointer to the item - this must not be NULL.

 */

EXPORT_C __NAKED__ void TPriListBase::Remove(TPriListLink* /*aLink*/)

	{

	asm("ldmia r1, {r2,r3} ");				// r2=aLink->iNext, r3=aLink->iPrev

	asm("b pri_list_remove ");

	}

/** Signals a fast semaphore.

    Increments the signal count of a fast semaphore by

	one and releases any waiting thread if the semphore becomes signalled.

	Note that a reschedule will not occur before this function returns, this will

	only take place when the kernel is unlocked. Generally threads

	would use NKern::FSSignal() which manipulates the kernel lock for you.

	@pre Kernel must be locked.

    @pre Call either in a thread or an IDFC context.

	@post Kernel is locked.

	@see NFastSemaphore::Wait()

	@see NKern::FSSignal()

	@see NKern::Unlock()

 */

EXPORT_C __NAKED__ void NFastSemaphore::Signal()

	{

	ASM_CHECK_PRECONDITIONS(MASK_KERNEL_LOCKED|MASK_NOT_ISR);

	asm("req_sem_signal: ");

	asm("ldmia r0, {r1,r2} ");				// r1=iCount, r2=iOwningThread

	asm("mov r3, #0 ");

	asm("adds r1, r1, #1 ");

	asm("str r1, [r0, #%a0]" : : "i" _FOFF(NFastSemaphore,iCount));

	__JUMP(gt,lr);							// if count after incrementing is >0, nothing more to do

	asm("mov r0, r2 ");

	asm("str r3, [r0, #%a0]" : : "i" _FOFF(NThread,iWaitObj));

	// fall through to NThreadBase::CheckSuspendThenReady()

	}

/** Makes a nanothread ready provided that it is not explicitly suspended.

	For use by RTOS personality layers.

	@pre	Kernel must be locked.

	@pre	Call either in a thread or an IDFC context.

	@post	Kernel is locked.

 */

EXPORT_C __NAKED__ void NThreadBase::CheckSuspendThenReady()

	{

	ASM_CHECK_PRECONDITIONS(MASK_KERNEL_LOCKED|MASK_NOT_ISR);

	asm("check_suspend_then_ready: ");

	asm("ldr r1, [r0, #%a0]" : : "i" _FOFF(NThread,iSuspendCount));

	asm("mov r2, #%a0" : : "i" (NThread::ESuspended));

	asm("cmp r1, #0 ");

	asm("bne mark_thread_suspended ");		// branch out if suspend count nonzero

	// fall through to NThreadBase::Ready()

	}

/** Makes a nanothread ready.

	For use by RTOS personality layers.

	@pre	Kernel must be locked.

	@pre	Call either in a thread or an IDFC context.

	@pre	The calling thread must not be explicitly suspended.

	@post	Kernel is locked.

 */

EXPORT_C __NAKED__ void NThreadBase::Ready()

	{

// on release builds just fall through to DoReady

#ifdef _DEBUG

	ASM_CHECK_PRECONDITIONS(MASK_NOT_ISR|MASK_KERNEL_LOCKED);

	asm("ldr r1, [r0, #%a0]" : : "i" _FOFF(NThreadBase,iSuspendCount));

	asm("cmp r1, #0 ");

	asm("beq 1f ");

	ASM_CHECK_PRECONDITIONS(MASK_ALWAYS_FAIL);

	asm("1: ");

	asm("stmfd sp!, {r0,lr} ");

	asm("mov r0, #%a0" : : "i" ((TInt)KCRAZYSCHEDDELAY));

	asm("bl " CSM_Z9KDebugNumi );

	asm("cmp r0, #0 ");						// Z=1 => no delayed scheduler

	asm("ldmfd sp!, {r0,lr} ");

	asm("ldr r1, __TheScheduler ");

	asm("ldrb r2, [r0, #%a0]" : : "i" _FOFF(NThread,iPriority));	// r2=priority of aThread

	asm("beq DoReadyInner ");				// delayed scheduler is disabled

	asm("ldr r12, __TheTimerQ ");

	asm("cmp r2, #0 ");

	asm("ldr r12, [r12, #%a0]" : : "i" _FOFF(NTimerQ,iMsCount));

	asm("cmpne r12, #0 ");					// tick hasn't happened yet or this is priority 0

	asm("beq DoReadyInner ");				// so ready it as usual

	asm("ldrb r2, [r0, #%a0]" : : "i" _FOFF(NThread,i_ThrdAttr));

	asm("tst r2, #%a0 " : : "i" ((TInt)KThreadAttDelayed));

	__JUMP(ne,lr);							// thread is already on the delayed queue

	asm("ldr r3, [r1, #%a0]" : : "i" _FOFF(TScheduler,iDelayedQ));

	asm("ldr r12, [r3, #4] ");				// r12->last thread

	asm("str r0, [r3, #4] ");				// first->prev=this

	asm("str r0, [r12, #0] ");				// old last->next=this

	asm("stmia r0, {r3,r12} ");				// this->next=first, this->prev=old last

	asm("orr r2, r2, #%a0 " : : "i" ((TInt)KThreadAttDelayed));

	asm("strb r2, [r0, #%a0]" : : "i" _FOFF(NThread,i_ThrdAttr));

	__JUMP(,lr);

	asm("__TheTimerQ: ");

	asm(".word TheTimerQ ");

	asm("__SuperPageAddress: ");

	asm(".word SuperPageAddress ");

#endif

// on release builds just fall through to DoReady

	}

__NAKED__ void NThreadBase::DoReady()

	{

	asm("ldr r1, __TheScheduler ");

	asm("ldrb r2, [r0, #%a0]" : : "i" _FOFF(NThread,iPriority));	// r2=priority of aThread

	asm("DoReadyInner: ");

	asm("mov r3, #%a0" : : "i" (NThread::EReady));

	asm("strb r3, [r0, #%a0]" : : "i" _FOFF(NThread,iNState));

	asm("ldmia r1!, {r3,r12} ");			// r3=present mask low, r12=present mask high, r1=&iQueue[0]

	asm("cmp r2, #31 ");

	asm("bhi 1f ");

	asm("cmp r12, #0 ");

	asm("mov r12, r3 ");

	asm("mov r3, #1 ");

	asm("bne 2f ");							// branch if high word set, so this has lower priority

	asm("cmp r3, r12, lsr r2 ");			// see if new thread may cause reschedule (CS if so, EQ if equal priority)

	asm("beq 3f ");							// branch if equality case (no need to update bitmask)

	asm("strhib r3, [r1, #%a0]" : : "i" (_FOFF(TScheduler,iRescheduleNeededFlag)-8)); // set reschedule flag if necessary

	asm("2: ");

	asm("tst r12, r3, lsl r2 ");			// test bit in present mask

	asm("orreq r12, r12, r3, lsl r2 ");		// if clear, set it ...

	asm("ldrne r3, [r1, r2, lsl #2] ");		// if not alone, r3->first thread on queue

	asm("streq r12, [r1, #-8] ");			// ... and update present mask low word

	asm("bne 4f ");							// branch if not alone (don't need to touch bitmask)

	asm("6: ");	// get here if thread is alone at this priority

	asm("str r0, [r1, r2, lsl #2] ");		// thread is alone at this priority, so point queue to it

	asm("str r0, [r0, #0] ");				// next=prev=this

	asm("str r0, [r0, #4] ");

	__JUMP(,lr);							// NOTE: R0=this != 0

	asm("5: "); // get here if this thread has joint highest priority >= 32

	asm("add r2, r2, #32 ");				// restore thread priority

	asm("3: ");	// get here if this thread has joint highest priority < 32

	asm("ldr r3, [r1, r2, lsl #2] ");		// r3->first thread on queue

	asm("ldr r12, [r3, #%a0]" : : "i" _FOFF(NThreadBase,iTime));	// r12=first thread->time remaining

	asm("subs r12, r12, #1 ");				// timeslice expired? if so, r12=-1 and C=0 else C=1

	asm("strccb r12, [r1, #%a0]" : : "i" (_FOFF(TScheduler,iRescheduleNeededFlag)-8)); // set reschedule flag if necessary

	asm("4: ");	// get here when adding to non-empty queue; r1->queue, r3->first thread on queue

	asm("ldr r12, [r3, #4] ");				// r12->last thread

	asm("str r0, [r3, #4] ");				// first->prev=this

	asm("str r0, [r12, #0] ");				// old last->next=this

	asm("stmia r0, {r3,r12} ");				// this->next=first, this->prev=old last

	__JUMP(,lr);							// NOTE: R0=this != 0

	asm("1: ");	// get here if this thread priority > 31

	asm("and r2, r2, #31 ");

	asm("mov r3, #1 ");

	asm("cmp r3, r12, lsr r2 ");			// see if new thread may cause reschedule (CS if so, EQ if equal priority)

	asm("beq 5b ");							// branch if equality case (no need to update bitmask)

	asm("strhib r3, [r1, #%a0]" : : "i" (_FOFF(TScheduler,iRescheduleNeededFlag)-8)); // set reschedule flag if necessary

	asm("tst r12, r3, lsl r2 ");			// test bit in present mask

	asm("orreq r12, r12, r3, lsl r2 ");		// if clear, set it ...

	asm("add r2, r2, #32 ");

	asm("streq r12, [r1, #-4] ");			// ... and update present mask high word

	asm("beq 6b ");							// branch if alone

	asm("ldr r3, [r1, r2, lsl #2] ");		// if not alone, r3->first thread on queue

	asm("b 4b ");							// branch if not alone (don't need to touch bitmask)

	asm("mark_thread_suspended: ");			// continuation of CheckSuspendThenReady in unusual case

	asm("strb r2, [r0, #%a0]" : : "i" _FOFF(NThread,iNState));	// set state to suspended

	__JUMP(,lr);							// NOTE: R0=this != 0

	}

__NAKED__ void TScheduler::QueueDfcs()

	{

	// move DFCs from pending queue to their final queues

	// enter with interrupts off and kernel locked

	// leave with interrupts off and kernel locked

	// NOTE: WE MUST NOT CLOBBER R0 OR R2!

	// NOTE: STACK ALIGNMENT UNKNOWN ON ENTRY

	SET_INTS(r1, MODE_SVC, INTS_ALL_ON);	// enable interrupts

#ifdef __CPU_ARM_HAS_CPS

	asm("mov r1, #1 ");						// (not necessary on ARMV5 as SET_INTS above leaves r1 == 0x13)

#endif

	asm("strb r1, [r0, #%a0]" : : "i" _FOFF(TScheduler,iInIDFC));

	asm("stmfd sp!, {r2,r5,r11,lr} ");		// save registers

#ifdef BTRACE_CPU_USAGE

	asm("ldrb r1, [r0,#%a0]" : : "i" _FOFF(TScheduler,iCpuUsageFilter));

	asm("add r5, r0, #%a0" : : "i" _FOFF(TScheduler,iDfcs));

	asm("mov r11, sp ");					// r11 points to saved registers

	asm("cmp r1, #0");

	asm("blne idfc_start_trace");

#else

	asm("add r5, r0, #%a0" : : "i" _FOFF(TScheduler,iDfcs));

	asm("mov r11, sp ");					// r11 points to saved registers

#endif

	asm("queue_dfcs_1: ");

	SET_INTS(r0, MODE_SVC, INTS_ALL_OFF);	// disable interrupts

	asm("ldr r0, [r5, #0] ");				// r0 points to first pending DFC

	SET_INTS_1(r1, MODE_SVC, INTS_ALL_ON);

	asm("subs r2, r0, r5 ");				// check if queue empty

	asm("ldrne r3, [r0, #0] ");				// r3 points to next DFC

	asm("beq queue_dfcs_0 ");				// if so, exit

	asm("str r3, [r5, #0] ");				// next one is now first

	asm("str r5, [r3, #4] ");				// next->prev=queue head

	SET_INTS_2(r1, MODE_SVC, INTS_ALL_ON);	// enable interrupts

	asm("ldrb r12, [r0, #%a0]" : : "i" _FOFF(TDfc,iPriority));			// r12=iPriority

	asm("adr lr, queue_dfcs_1 ");			// return to queue_dfcs_1

	asm("cmp r12, #%a0" : : "i" ((TInt)KNumDfcPriorities));	// check for immediate DFC

	asm("bcs do_immediate_dfc ");

	// enqueue the DFC and signal the DFC thread

	asm("ldr r2, [r0, #%a0]" : : "i" _FOFF(TDfc,iDfcQ));				// r2=iDfcQ

	asm("mov r3, #1 ");

	asm("dfc_enque_1: ");

	asm("ldr r1, [r2], #%a0" : : "i" _FOFF(TDfcQue,iQueue));			// r1=present mask, r2 points to first queue

	asm("strb r3, [r0, #%a0]" : : "i" _FOFF(TDfc,iOnFinalQ));			// set flag to show DFC on final queue

	asm("tst r1, r3, lsl r12 ");			// test bit in present mask

	asm("ldrne r1, [r2, r12, lsl #2] ");	// if not originally empty, r1->first

	asm("orreq r1, r1, r3, lsl r12 ");		// if bit clear, set it

	asm("streq r1, [r2, #%a0]" : : "i" (_FOFF(TDfcQue,iPresent)-_FOFF(TDfcQue,iQueue)));	// if bit originally clear update present mask

	asm("ldrne r3, [r1, #4] ");				// if not originally empty, r3->last

	asm("streq r0, [r2, r12, lsl #2] ");	// if queue originally empty, iQueue[p]=this

	asm("streq r0, [r0, #0] ");				// this->next=this

	asm("ldr r2, [r2, #%a0]" : : "i" (_FOFF(TDfcQue,iThread)-_FOFF(TDfcQue,iQueue)));	// r2=iDfcQ->iThread

	asm("stmneia r0, {r1,r3} ");			// this->next=first, this->prev=last

	asm("streq r0, [r0, #4] ");				// this->prev=this

	asm("ldrb r12, [r2, #%a0]" : : "i" _FOFF(NThreadBase,iNState));	// r2=thread NState

	asm("strne r0, [r1, #4] ");				// first->prev=this

	asm("strne r0, [r3, #0] ");				// last->next=this

	asm("cmp r12, #%a0" : : "i" ((TInt)NThreadBase::EWaitDfc));		// check for EWaitDfc

	asm("mov r0, r2 ");						// r0->thread

	asm("beq check_suspend_then_ready ");	// if it is, release thread

	__JUMP(,lr);							// else we are finished - NOTE R0=thread ptr != 0

	asm("queue_dfcs_0: ");

#ifdef BTRACE_CPU_USAGE

	asm("ldrb r1, [r5, #%a0]" : : "i" (_FOFF(TScheduler,iCpuUsageFilter)-_FOFF(TScheduler,iDfcs)));

	asm("strb r2, [r5, #%a0]" : : "i" (_FOFF(TScheduler,iDfcPendingFlag)-_FOFF(TScheduler,iDfcs)));

	asm("strb r2, [r5, #%a0]" : : "i" (_FOFF(TScheduler,iInIDFC)-_FOFF(TScheduler,iDfcs)));

	asm("cmp r1, #0");

	asm("blne idfc_end_trace");

#else

	asm("strb r2, [r0, #%a0]" : : "i" (_FOFF(TScheduler,iDfcPendingFlag)-_FOFF(TScheduler,iDfcs)));

	asm("strb r2, [r0, #%a0]" : : "i" (_FOFF(TScheduler,iInIDFC)-_FOFF(TScheduler,iDfcs)));

#endif

	asm("sub r0, r5, #%a0" : : "i" _FOFF(TScheduler,iDfcs));	// restore r0

	asm("mov sp, r11 ");					// retrieve stack pointer before alignment

	asm("ldmfd sp!, {r2,r5,r11,pc} ");

	asm("do_immediate_dfc: ");

	ASM_KILL_LINK(r0,r1);

	asm("mov r1, #0x000000ff ");			// pri=0xff (IDFC), spare1=0 (unused), spare2=0 (iOnFinalQ), spare3=0 (iQueued)

	asm("str r1, [r0, #%a0]!" : : "i" _FOFF(TDfc,iPriority));	// dfc->iQueued=FALSE, r0->iPriority

	asm("ldmib r0, {r0,r1} ");				// r0 = DFC parameter, r1 = DFC function pointer

	asm("bic sp, sp, #4 ");					// align stack

	__JUMP(,r1);							// call DFC, return to queue_dfcs_1

#ifdef BTRACE_CPU_USAGE

	asm("idfc_start_trace_header:");

	asm(".word %a0" : : "i" ((TInt)(4<<BTrace::ESizeIndex) + (BTrace::ECpuUsage<<BTrace::ECategoryIndex*8) + (BTrace::EIDFCStart<<BTrace::ESubCategoryIndex*8)) );

	asm("idfc_end_trace_header:");

	asm(".word %a0" : : "i" ((TInt)(4<<BTrace::ESizeIndex) + (BTrace::ECpuUsage<<BTrace::ECategoryIndex*8) + (BTrace::EIDFCEnd<<BTrace::ESubCategoryIndex*8)) );

	asm("idfc_start_trace:");

	asm("ldr r1, [r0,#%a0]" : : "i" _FOFF(TScheduler,iBTraceHandler));

	asm("ldr r0, idfc_start_trace_header" );

	__JUMP(,r1);

	asm("idfc_end_trace:");

	asm("ldr r0, idfc_end_trace_header" );

	asm("ldr pc, [r5,#%a0]" : : "i" (_FOFF(TScheduler,iBTraceHandler)-_FOFF(TScheduler,iDfcs)));

#endif

	}

#endif

#ifdef __DFC_MACHINE_CODED__

/** Queues an IDFC or a DFC from an ISR.

	This function is the only way to queue an IDFC and is the only way to queue

	a DFC from an ISR. To queue a DFC from an IDFC or a thread either Enque()

	or DoEnque() should be used.

	This function does nothing if the IDFC/DFC is already queued.

	@pre Call only from ISR, IDFC or thread with the kernel locked.

	@pre Do not call from thread with the kernel unlocked.

	@return	TRUE if DFC was actually queued by this call

			FALSE if DFC was already queued on entry so this call did nothing

	@see TDfc::DoEnque()

	@see TDfc::Enque()

 */

__NAKED__ EXPORT_C TBool TDfc::Add()

	{

	ASM_CHECK_PRECONDITIONS(MASK_NO_RESCHED);

#ifdef _DEBUG

	asm("ldrb r2, [r0, #%a0]" : : "i" _FOFF(TDfc,iPriority));

	asm("ldr r1, [r0, #%a0]" : : "i" _FOFF(TDfc,iDfcQ));

	asm("cmp r2, #%a0" : : "i" ((TInt)KNumDfcPriorities));

	asm("bhs 1f ");

	asm("cmp r1, #0 ");

	asm("bne 1f ");

	ASM_CHECK_PRECONDITIONS(MASK_ALWAYS_FAIL);

	asm("1: ");

#endif

	// Fall through to TDfc::RawAdd() ...

	}

/** Queue an IDFC or a DFC.

	This function is identical to TDfc::Add() but no checks are performed for correct usage,

	and it contains no instrumentation code.

	@return	TRUE if DFC was actually queued by this call

			FALSE if DFC was already queued on entry so this call did nothing

	@see TDfc::DoEnque()

	@see TDfc::Enque()

	@see TDfc::Add()

*/

__NAKED__ EXPORT_C TBool TDfc::RawAdd()

	{

#if defined(__CPU_ARM_HAS_LDREX_STREX_V6K)

/* Optimize with LDREXB/STREXB */

	asm("add r2, r0, #%a0" : : "i" _FOFF(TDfc, iQueued));	// r2=&iQueued's byte offset 

	asm("mov r12, #1 ");									// r12=TRUE

	asm("tryagain:	");

	LDREXB(3,2);								// r3 = already iQueued

	STREXB(1,12,2); 							// Try setting iQueued = TRUE 

	asm("teq   r1, #0 ");						// Exclusive write succeeded?

	asm("bne   tryagain ");						// No - retry until it does 

#elif defined(__CPU_ARM_HAS_LDREX_STREX)

/* Implement with LDREX/STREX and shifts */

#define IQUEUED_WORD (_FOFF(TDfc, iQueued) & ~3)				// offset of word containing iQueued

#define IQUEUED_SHIFT ((_FOFF(TDfc, iQueued) & 3) * 8)			// bit position of byte within word

	asm("add r2, r0, #%a0" : : "i" IQUEUED_WORD);				// r2=&iQueued's word

	asm("tryagain:	");

	LDREX(3, 2);

	asm("bic   r12, r3, #%a0" : : "i" ((TInt)0xff<<IQUEUED_SHIFT));	// clear the bits to write to

	asm("orr   r12, r12, #%a0" : : "i" ((TInt)0x01<<IQUEUED_SHIFT));	// &iQueued = TRUE;

	STREX(1, 12, 2);

	asm("teq   r1, #0 ");

	asm("bne   tryagain ");

	asm("and r3, r3, #%a0" : : "i" ((TInt)0xff<<IQUEUED_SHIFT));		// mask out unwanted bits

#else

	asm("mov r12, #1 ");										// r12=TRUE

	asm("add r2, r0, #%a0" : : "i" _FOFF(TDfc, iQueued));		// r2=&iQueued

	asm("swpb r3, r12, [r2] ");									// ATOMIC {r3=iQueued; iQueued=TRUE}

#endif

	asm("ldr r1, __PendingDfcQueue ");		// r1 points to DFC pending queue

	asm("cmp r3, #0 ");						// check if already queued

	asm("addeq r3, r1, #4 ");				// if not r3=&TheScheduler.iDfcs.iPrev ...

	asm("streq r1, [r0, #0] ");				// ...iNext=&TheScheduler.iDfcs ...

#ifdef __CPU_ARM_HAS_LDREX_STREX

	asm("movne r0, #0 ");

	asm("bne dontswap ");									// easier this way

	asm("try2:	");

	LDREX(2, 3);							// read

	STREX(12, 0, 3);						// write

	asm("teq   r12, #0 ");					// success? also restore eq

	asm("bne   try2 ");						// no!

	asm("mov   r12, #1");

#else

	asm("swpeq r2, r0, [r3] ");				// ...ATOMIC {r2=last; last=this} ...

#endif

	asm("streqb r12, [r1, #%a0]" : : "i" (_FOFF(TScheduler,iDfcPendingFlag)-_FOFF(TScheduler,iDfcs)));

	asm("streq r0, [r2, #0] ");				// ...old last->iNext=this ...

	asm("streq r2, [r0, #4]	");				// ...iPrev=old last

	// NOTE: R0=this != 0

	asm("dontswap: ");

	__JUMP(,lr);

	asm("__PendingDfcQueue: ");

	asm(".word %a0" : : "i" ((TInt)&TheScheduler.iDfcs));

	}

/** Queues a DFC (not an IDFC) from an IDFC or thread with preemption disabled.

	This function is the preferred way to queue a DFC from an IDFC. It should not

	be used to queue an IDFC - use TDfc::Add() for this.

	This function does nothing if the DFC is already queued.

	@pre Call only from IDFC or thread with the kernel locked.

	@pre Do not call from ISR or thread with the kernel unlocked.

	@return	TRUE if DFC was actually queued by this call

			FALSE if DFC was already queued on entry so this call did nothing

	@see TDfc::Add()

	@see TDfc::Enque()

 */

__NAKED__ EXPORT_C TBool TDfc::DoEnque()

	{

	ASM_CHECK_PRECONDITIONS(MASK_NOT_ISR|MASK_NO_RESCHED);

#ifdef _DEBUG

	asm("ldr r1, [r0, #%a0]" : : "i" _FOFF(TDfc,iDfcQ));

	asm("cmp r1, #0 ");

	asm("bne 1f ");

	ASM_CHECK_PRECONDITIONS(MASK_ALWAYS_FAIL);

	asm("1: ");

#endif

#if defined(__CPU_ARM_HAS_LDREX_STREX_V6K)

	asm("add r2, r0, #%a0" : : "i" _FOFF(TDfc, iQueued));	// r2=&iQueued's byte offset 

	asm("mov r3, #1 ");

	asm("tryagain8:	");

				LDREXB(1, 2); 				// r1 = iQueued	

				STREXB(12, 3, 2); 			// Try setting iQueued = True	

	asm("		teq   r12, #1 ");			// worked?

	asm("		beq   tryagain8 ");			// nope

											// r3 = 1, r1 = old iQueued

#elif defined(__CPU_ARM_HAS_LDREX_STREX)

	asm("		add   r0, r0, #8 ");		// align address (struct always aligned)

	asm("tryagain8:	");

				LDREX(2, 0);						// do the load/store half

	asm("		bic   r12, r2, #0xff000000 ");		// knock out unwanted bits

	asm("		orr   r12, r12, #0x01000000 ");		// 'looking' value

				STREX(1, 12, 0);				// write looking value

	asm("		teq   r1, #1 ");				// worked?

	asm("		beq   tryagain8 ");				// nope

	asm("		mov   r1, r2, lsr #24 ");		// extract previous value byte

	asm("		sub   r0, r0, #8 ");			// restore base pointer

	asm("		mov   r3, #1 ");				// dfc_enque_1 expects r3 = 1

#else

	asm("add r12, r0, #11 ");				// r12=&iQueued

	asm("mov r3, #1 ");

	asm("swpb r1, r3, [r12] ");				// ATOMIC {r1=iQueued; iQueued=TRUE}

#endif

	asm("ldrb r12, [r0, #8] ");				// r12=iPriority

	asm("ldr r2, [r0, #20] ");				// r2=iDfcQ

	asm("cmp r1, #0 ");						// check if queued

	asm("beq dfc_enque_1 ");				// if not, queue it and return with R0 nonzero

	asm("mov r0, #0 ");

	__JUMP(,lr);

	}

#endif 

#ifdef __FAST_MUTEX_MACHINE_CODED__

__ASSERT_COMPILE(_FOFF(NFastMutex,iHoldingThread) == 0);

/** Releases a previously acquired fast mutex.

	Generally threads would use NKern::FMSignal() which manipulates the kernel lock

	for you.

	@pre The calling thread must hold the mutex.

	@pre Kernel must be locked.

	@post Kernel is locked.

	@see NFastMutex::Wait()

	@see NKern::FMSignal()

*/

EXPORT_C __NAKED__ void NFastMutex::Signal()

	{

	// NOTE: STACK ALIGNMENT UNKNOWN ON ENTRY

	ASM_DEBUG1(FMSignal,r0);

	asm("ldr r2, __TheScheduler ");

#ifdef BTRACE_FAST_MUTEX

	asm("ldrb r1, [r2,#%a0]" : : "i" _FOFF(TScheduler,iFastMutexFilter));

	asm("cmp r1, #0");

	asm("bne fastmutex_signal_trace");

	asm("no_fastmutex_signal_trace:");

#endif

	asm("mov r12, #0 ");

	asm("str r12, [r0], #%a0" : : "i" _FOFF(NFastMutex,iWaiting));		// iHoldingThread=NULL, r0->iWaiting

	asm("ldr r1, [r2, #%a0]" : : "i" _FOFF(TScheduler,iCurrentThread));	// r1=iCurrentThread

	asm("ldr r3, [r0] ");				// r3=iWaiting

	asm("str r12, [r0] ");				// iWaiting=FALSE

	asm("str r12, [r1, #%a0]" : : "i" _FOFF(NThread,iHeldFastMutex));	// current thread->iHeldFastMutex=NULL

	asm("cmp r3, #0 ");					// check waiting flag

	asm("bne 2f ");

	asm("1: ");

	__JUMP(,lr);						// if clear, finished

	asm("2: ");

	asm("ldr r12, [r1, #%a0]" : : "i" _FOFF(NThread,iCsFunction));