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// Copyright (c) 1996-2009 Nokia Corporation and/or its subsidiary(-ies).
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// All rights reserved.
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// This component and the accompanying materials are made available
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// under the terms of the License "Eclipse Public License v1.0"
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// which accompanies this distribution, and is available
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// at the URL "http://www.eclipse.org/legal/epl-v10.html".
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//
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// Initial Contributors:
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// Nokia Corporation - initial contribution.
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//
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// Contributors:
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//
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// Description:
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//
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#include "arm_mem.h"
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#include "../mmu/mm.h"
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// Set up virtual addresses used for cache flushing if this is
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// done by data read or line allocate
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void M::SetupCacheFlushPtr(TInt aCache, SCacheInfo& aInfo)
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{
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}
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#ifdef __SMP__
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extern DMemoryObject* ExceptionStacks;
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void M::GetAPBootInfo(TInt aCpu, volatile SAPBootInfo* aInfo)
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{
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SArmAPBootInfo* b = (SArmAPBootInfo*)aInfo;
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TInt i;
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for (i=1; i<=7; i+=2)
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{
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TUint ix = (TUint)(aCpu*8+i);
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TInt r = MM::MemoryAlloc(ExceptionStacks, ix, 1);
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__NK_ASSERT_ALWAYS(r==KErrNone);
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TLinAddr addr = KExcptStacksLinearBase + (ix<<KPageShift);
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TLinAddr top = addr + KPageSize;
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TUint8 fill = 0xdd;
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switch (i)
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{
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case 1: b->iInitR13Irq = top; fill=0xaa; break;
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case 3: b->iInitR13Fiq = top; fill=0xbb; break;
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case 5: b->iInitR13Und = top; break;
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case 7: top-=sizeof(SFullArmRegSet); b->iInitR13Abt = top; memclr((TAny*)top,sizeof(SFullArmRegSet)); break;
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default: __NK_ASSERT_ALWAYS(0); break;
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}
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memset((TAny*)addr, fill, top-addr);
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}
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}
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void M::Init2AP()
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{
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__KTRACE_OPT(KBOOT,Kern::Printf("M::Init2AP()"));
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DThread& t = Kern::CurrentThread();
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SubScheduler().iAddressSpace = t.iOwningProcess;
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t.iNThread.SetAddressSpace(t.iOwningProcess);
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t.iNThread.SetAttributes(KThreadAttAddressSpace);
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}
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#endif
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