os/kernelhwsrv/kernel/eka/klib/arm/cumem.cia
author sl
Tue, 10 Jun 2014 14:32:02 +0200
changeset 1 260cb5ec6c19
permissions -rw-r--r--
Update contrib.
sl@0
     1
// Copyright (c) 1997-2009 Nokia Corporation and/or its subsidiary(-ies).
sl@0
     2
// All rights reserved.
sl@0
     3
// This component and the accompanying materials are made available
sl@0
     4
// under the terms of the License "Eclipse Public License v1.0"
sl@0
     5
// which accompanies this distribution, and is available
sl@0
     6
// at the URL "http://www.eclipse.org/legal/epl-v10.html".
sl@0
     7
//
sl@0
     8
// Initial Contributors:
sl@0
     9
// Nokia Corporation - initial contribution.
sl@0
    10
//
sl@0
    11
// Contributors:
sl@0
    12
//
sl@0
    13
// Description:
sl@0
    14
// e32\klib\arm\cumem.cia
sl@0
    15
// 
sl@0
    16
//
sl@0
    17
sl@0
    18
#include <kernel/klib.h>
sl@0
    19
#include <e32cia.h>
sl@0
    20
#include <arm.h>
sl@0
    21
#if defined(__REPLACE_GENERIC_UTILS)
sl@0
    22
#include "replacement_utils.h"
sl@0
    23
#endif
sl@0
    24
sl@0
    25
extern "C" {
sl@0
    26
sl@0
    27
#ifdef _DEBUG
sl@0
    28
#define CUMEM_FAULT(cc, reason) asm("mov"#cc" r0, #%a0 " : : "i" (reason)); \
sl@0
    29
                                asm("b"#cc" " CSM_ZN2KL5PanicENS_13TKernLibPanicE)	
sl@0
    30
#endif
sl@0
    31
sl@0
    32
sl@0
    33
__NAKED__ void kumemget_no_paging_assert(TAny* /*aKernAddr*/, const TAny* /*aAddr*/, TInt /*aLength*/)
sl@0
    34
	{
sl@0
    35
	asm("mrs r3, spsr ");			// r3=spsr_svc
sl@0
    36
	asm("tst r3, #0x0f ");			// test for user mode
sl@0
    37
	asm("bne memcpy ");				// if not, just do memcpy
sl@0
    38
#ifndef USE_REPLACEMENT_UMEMGET
sl@0
    39
	asm("b umemget_no_paging_assert");
sl@0
    40
#else
sl@0
    41
	asm("b umemget");
sl@0
    42
#endif
sl@0
    43
	}
sl@0
    44
sl@0
    45
sl@0
    46
#ifndef USE_REPLACEMENT_UMEMGET
sl@0
    47
	
sl@0
    48
#ifdef __CPU_ARMV6
sl@0
    49
// Conditional returns are not predicted on ARMv6
sl@0
    50
__NAKED__ void dummy_umemget32_exit()
sl@0
    51
	{
sl@0
    52
	asm("_umemget32_exit: ");
sl@0
    53
	asm("ldmfd sp!, {r4, pc} ");	
sl@0
    54
	}
sl@0
    55
#define UMEMGET32_EXIT(cc)	asm("b"#cc" _umemget32_exit")
sl@0
    56
#else
sl@0
    57
#define UMEMGET32_EXIT(cc)	asm("ldm"#cc"fd sp!, {r4, pc}")
sl@0
    58
#endif
sl@0
    59
sl@0
    60
	
sl@0
    61
EXPORT_C __NAKED__ void kumemget32(TAny* /*aKernAddr*/, const TAny* /*aAddr*/, TInt /*aLength*/)
sl@0
    62
	{
sl@0
    63
	asm("mrs r3, spsr ");			// r3=spsr_svc
sl@0
    64
	asm("tst r3, #0x0f ");			// test for user mode
sl@0
    65
	asm("bne wordmove ");			// if not, just do wordmove
sl@0
    66
	// otherwise fall through to umemget32
sl@0
    67
	}
sl@0
    68
sl@0
    69
sl@0
    70
EXPORT_C __NAKED__ void umemget32(TAny* /*aKernAddr*/, const TAny* /*aUserAddr*/, TInt /*aLength*/)
sl@0
    71
	{
sl@0
    72
	ASM_ASSERT_PAGING_SAFE
sl@0
    73
sl@0
    74
#ifdef __USER_MEMORY_GUARDS_ENABLED__
sl@0
    75
	// Wrap the workings of this function in an internal call, so we can save/restore UMG state
sl@0
    76
	asm("stmfd sp!, {r11, lr} ");
sl@0
    77
	asm("subs r12, r2, #1");
sl@0
    78
	asm("ldrhsb r11, [r0]");				// test access to first byte of kernel memory
sl@0
    79
	asm("ldrhsb r11, [r0,r12]");			// test access to last byte of kernel memory
sl@0
    80
	USER_MEMORY_GUARD_OFF(,r11,r12);		// leaves UMG mode in r11
sl@0
    81
	asm("bl 0f");							// call to label below
sl@0
    82
	USER_MEMORY_GUARD_RESTORE(r11,r12);
sl@0
    83
	asm("ldmfd sp!, {r11, pc} ");	
sl@0
    84
sl@0
    85
	asm("0:");
sl@0
    86
#endif
sl@0
    87
sl@0
    88
#ifdef _DEBUG
sl@0
    89
	asm("tst r2, #3 ");						// check length is a whole number of words
sl@0
    90
	CUMEM_FAULT(ne, KL::EWordMoveLengthNotMultipleOf4);
sl@0
    91
#endif
sl@0
    92
sl@0
    93
	PLD(1);
sl@0
    94
	asm("_umemget_word_aligned: ");	
sl@0
    95
	asm("stmfd sp!, {r4, lr} ");
sl@0
    96
	asm("subs ip, r2, #32 ");
sl@0
    97
	asm("blo _umemget32_small_copy ");
sl@0
    98
	PLD_ioff(1, 32);
sl@0
    99
	asm("beq _umemget32_32_byte_case ");	// 32 byte case is common - don't bother to align
sl@0
   100
sl@0
   101
	asm("rsb lr, r0, #32 ");				// align destination: 0 - 28 byte copy
sl@0
   102
	asm("movs lr, lr, lsl #27 ");
sl@0
   103
	asm("beq _umemget32_large_copy ");
sl@0
   104
	asm("sub r2, r2, lr, lsr #27 ");
sl@0
   105
	asm("msr cpsr_f, lr ");					// put length bits 4, 3, 2 into N, Z, C
sl@0
   106
	asm("ldrmit r3, [r1], #4 ");
sl@0
   107
	asm("ldrmit r4, [r1], #4 ");
sl@0
   108
	asm("ldrmit ip, [r1], #4 ");
sl@0
   109
	asm("ldrmit lr, [r1], #4 ");
sl@0
   110
	asm("stmmiia r0!, {r3, r4, ip, lr} ");
sl@0
   111
	asm("ldreqt r3, [r1], #4 ");
sl@0
   112
	asm("ldreqt r4, [r1], #4 ");
sl@0
   113
	asm("ldrcst ip, [r1], #4 ");
sl@0
   114
	asm("stmeqia r0!, {r3, r4} ");
sl@0
   115
	asm("strcs ip, [r0], #4 ");
sl@0
   116
	asm("subs ip, r2, #32 ");
sl@0
   117
	asm("blo _umemget32_small_copy ");
sl@0
   118
sl@0
   119
	asm("_umemget32_large_copy: ");			// copy 32 byte blocks
sl@0
   120
	PLD_ioff(1, 64);
sl@0
   121
	asm("_umemget32_32_byte_case: ");
sl@0
   122
	asm("ldrt r2, [r1], #4 ");
sl@0
   123
	asm("ldrt r3, [r1], #4 ");
sl@0
   124
	asm("ldrt r4, [r1], #4 ");
sl@0
   125
	asm("ldrt lr, [r1], #4 ");
sl@0
   126
	asm("subs ip, ip, #32 ");
sl@0
   127
	asm("stmia r0!, {r2, r3, r4, lr} ");
sl@0
   128
	asm("ldrt r2, [r1], #4 ");
sl@0
   129
	asm("ldrt r3, [r1], #4 ");
sl@0
   130
	asm("ldrt r4, [r1], #4 ");
sl@0
   131
	asm("ldrt lr, [r1], #4 ");
sl@0
   132
	asm("stmia r0!, {r2, r3, r4, lr} ");
sl@0
   133
	asm("bhs _umemget32_large_copy ");
sl@0
   134
		
sl@0
   135
	asm("_umemget32_small_copy: ");			// 0 - 31 byte copy, length in ip bits 0-4
sl@0
   136
	asm("movs r2, ip, lsl #27 ");
sl@0
   137
	UMEMGET32_EXIT(eq);
sl@0
   138
	asm("msr cpsr_f, r2 ");					// put length bits 4, 3, 2 into N, Z, C
sl@0
   139
	asm("ldrmit r3, [r1], #4 ");
sl@0
   140
	asm("ldrmit r4, [r1], #4 ");
sl@0
   141
	asm("ldrmit ip, [r1], #4 ");
sl@0
   142
	asm("ldrmit lr, [r1], #4 ");
sl@0
   143
	asm("stmmiia r0!, {r3, r4, ip, lr} ");
sl@0
   144
	asm("ldreqt r3, [r1], #4 ");
sl@0
   145
	asm("ldreqt r4, [r1], #4 ");
sl@0
   146
	asm("ldrcst ip, [r1], #4 ");
sl@0
   147
	asm("stmeqia r0!, {r3, r4} ");
sl@0
   148
	asm("strcs ip, [r0], #4 ");	
sl@0
   149
	asm("movs r2, r2, lsl #3 ");
sl@0
   150
	UMEMGET32_EXIT(eq);
sl@0
   151
	asm("msr cpsr_f, r2 ");					// put length bits 1, 0 into N, Z	
sl@0
   152
	asm("ldrmibt r3, [r1], #1 ");
sl@0
   153
	asm("ldrmibt r4, [r1], #1 ");	
sl@0
   154
	asm("ldreqbt ip, [r1], #1 ");
sl@0
   155
	asm("strmib r3, [r0], #1 ");
sl@0
   156
	asm("strmib r4, [r0], #1 ");
sl@0
   157
	asm("streqb ip, [r0], #1 ");
sl@0
   158
	asm("ldmfd sp!, {r4, pc} ");	
sl@0
   159
	}
sl@0
   160
sl@0
   161
sl@0
   162
EXPORT_C __NAKED__ void kumemget(TAny* /*aKernAddr*/, const TAny* /*aAddr*/, TInt /*aLength*/)
sl@0
   163
	{
sl@0
   164
	asm("mrs r3, spsr ");			// r3=spsr_svc
sl@0
   165
	asm("tst r3, #0x0f ");			// test for user mode
sl@0
   166
	asm("bne memcpy ");				// if not, just do memcpy
sl@0
   167
	// otherwise fall through to umemget
sl@0
   168
	}
sl@0
   169
sl@0
   170
sl@0
   171
EXPORT_C __NAKED__ void umemget(TAny* /*aKernAddr*/, const TAny* /*aUserAddr*/, TInt /*aLength*/)
sl@0
   172
	{
sl@0
   173
	// Optimised for aligned transfers, as unaligned are very rare in practice
sl@0
   174
sl@0
   175
	ASM_ASSERT_PAGING_SAFE
sl@0
   176
	asm("umemget_no_paging_assert:");
sl@0
   177
sl@0
   178
#ifdef __USER_MEMORY_GUARDS_ENABLED__
sl@0
   179
	// Wrap the workings of this function in an internal call, so we can save/restore UMG state
sl@0
   180
	asm("stmfd sp!, {r11, lr} ");
sl@0
   181
	asm("subs r12, r2, #1");
sl@0
   182
	asm("ldrhsb r11, [r0]");				// test access to first byte of kernel memory
sl@0
   183
	asm("ldrhsb r11, [r0,r12]");			// test access to last byte of kernel memory
sl@0
   184
	USER_MEMORY_GUARD_OFF(,r11,r12);		// leaves UMG mode in r11
sl@0
   185
	asm("bl 0f");							// call to label below
sl@0
   186
	USER_MEMORY_GUARD_RESTORE(r11,r12);
sl@0
   187
	asm("ldmfd sp!, {r11, pc} ");	
sl@0
   188
sl@0
   189
	asm("0:");
sl@0
   190
#endif
sl@0
   191
sl@0
   192
	PLD(1);
sl@0
   193
	asm("tst r0, #3 ");
sl@0
   194
	asm("tsteq r1, #3 ");
sl@0
   195
	asm("beq _umemget_word_aligned ");
sl@0
   196
	asm("cmp r2, #8 ");
sl@0
   197
	asm("bhs 1f ");
sl@0
   198
sl@0
   199
	asm("2: ");
sl@0
   200
	asm("subs r2, r2, #1 ");
sl@0
   201
 	asm("ldrplbt r3, [r1], #1 ");
sl@0
   202
	asm("strplb r3, [r0], #1 ");
sl@0
   203
	asm("bgt 2b ");
sl@0
   204
	__JUMP(,lr);
sl@0
   205
sl@0
   206
	asm("1: ");						// Attempt to word align
sl@0
   207
	asm("movs r3, r0, lsl #30 ");
sl@0
   208
	asm("beq 5f ");
sl@0
   209
	asm("rsbs r3, r3, #0 ");		// 01->c0000000 (MI,VC) 10->80000000 (MI,VS) 11->40000000 (PL,VC)
sl@0
   210
	asm("sub r2, r2, r3, lsr #30 ");
sl@0
   211
	asm("ldrmibt r3, [r1], #1 ");
sl@0
   212
	asm("strmib r3, [r0], #1 ");
sl@0
   213
	asm("ldrmibt r3, [r1], #1 ");
sl@0
   214
	asm("strmib r3, [r0], #1 ");
sl@0
   215
	asm("ldrvcbt r3, [r1], #1 ");
sl@0
   216
	asm("strvcb r3, [r0], #1 ");	// r0 now word aligned
sl@0
   217
	asm("5: ");
sl@0
   218
	asm("movs r3, r1, lsl #31 ");
sl@0
   219
	asm("bic r1, r1, #3 ");
sl@0
   220
	asm("bcs 3f ");					// branch if src mod 4 = 2 or 3
sl@0
   221
	asm("bpl _umemget_word_aligned ");	// branch if src mod 4 = 0
sl@0
   222
sl@0
   223
	asm("4: ");						// src mod 4 = 1
sl@0
   224
	asm("subs r2, r2, #4 ");
sl@0
   225
	asm("ldrget r3, [r1], #4 ");
sl@0
   226
	asm("ldrget ip, [r1] ");
sl@0
   227
	asm("movge r3, r3, lsr #8 ");
sl@0
   228
	asm("orrge r3, r3, ip, lsl #24 ");
sl@0
   229
	asm("strge r3, [r0], #4 ");
sl@0
   230
	asm("bgt 4b ");
sl@0
   231
	asm("add r1, r1, #1 ");
sl@0
   232
	asm("b umemget_do_end ");
sl@0
   233
	
sl@0
   234
	asm("3: ");						
sl@0
   235
	asm("bmi 5f ");
sl@0
   236
	asm("2: ");						// src mod 4 = 2
sl@0
   237
	asm("subs r2, r2, #4 ");
sl@0
   238
	asm("ldrget r3, [r1], #4 ");
sl@0
   239
	asm("ldrget ip, [r1] ");
sl@0
   240
	asm("movge r3, r3, lsr #16 ");
sl@0
   241
	asm("orrge r3, r3, ip, lsl #16 ");
sl@0
   242
	asm("strge r3, [r0], #4 ");
sl@0
   243
	asm("bgt 2b ");
sl@0
   244
	asm("add r1, r1, #2 ");
sl@0
   245
	asm("b umemget_do_end ");
sl@0
   246
	
sl@0
   247
	asm("5: ");						// src mod 4 = 3
sl@0
   248
	asm("subs r2, r2, #4 ");
sl@0
   249
	asm("ldrget r3, [r1], #4 ");
sl@0
   250
	asm("ldrget ip, [r1] ");
sl@0
   251
	asm("movge r3, r3, lsr #24 ");
sl@0
   252
	asm("orrge r3, r3, ip, lsl #8 ");
sl@0
   253
	asm("strge r3, [r0], #4 ");
sl@0
   254
	asm("bgt 5b ");
sl@0
   255
	asm("add r1, r1, #3 ");
sl@0
   256
sl@0
   257
	asm("umemget_do_end: ");
sl@0
   258
	__JUMP(eq,lr);
sl@0
   259
	asm("adds r2, r2, #2 ");		// -1 if 1 left, 0 if 2 left, +1 if 3 left
sl@0
   260
	asm("ldrplbt r3, [r1], #1 ");
sl@0
   261
	asm("strplb r3, [r0], #1 ");
sl@0
   262
	asm("ldrplbt r3, [r1], #1 ");
sl@0
   263
	asm("strplb r3, [r0], #1 ");
sl@0
   264
	asm("ldrnebt r3, [r1], #1 ");
sl@0
   265
	asm("strneb r3, [r0], #1 ");
sl@0
   266
	__JUMP(,lr);
sl@0
   267
	}
sl@0
   268
sl@0
   269
#endif  // USE_REPLACEMENT_UMEMGET
sl@0
   270
sl@0
   271
__NAKED__ void kumemput_no_paging_assert(TAny* /*aAddr*/, const TAny* /*aKernAddr*/, TInt /*aLength*/)
sl@0
   272
	{
sl@0
   273
	asm("mrs r3, spsr ");			// r3=spsr_svc
sl@0
   274
	asm("tst r3, #0x0f ");			// test for user mode
sl@0
   275
	asm("bne memcpy ");				// if not, just do memcpy
sl@0
   276
#ifndef USE_REPLACEMENT_UMEMPUT
sl@0
   277
	asm("b umemput_no_paging_assert");
sl@0
   278
#else
sl@0
   279
	asm("b umemput");
sl@0
   280
#endif
sl@0
   281
	}
sl@0
   282
sl@0
   283
sl@0
   284
#ifndef USE_REPLACEMENT_UMEMPUT
sl@0
   285
	
sl@0
   286
#ifdef __CPU_ARMV6
sl@0
   287
// Conditional returns are not predicted on ARMv6
sl@0
   288
__NAKED__ void dummy_umemput32_exit()
sl@0
   289
	{
sl@0
   290
	asm("_umemput32_exit: ");
sl@0
   291
	asm("ldmfd sp!, {r4, pc} ");	
sl@0
   292
	}
sl@0
   293
#define UMEMPUT32_EXIT(cc)	asm("b"#cc" _umemput32_exit")
sl@0
   294
#else
sl@0
   295
#define UMEMPUT32_EXIT(cc)	asm("ldm"#cc"fd sp!, {r4, pc}")
sl@0
   296
#endif
sl@0
   297
sl@0
   298
	
sl@0
   299
EXPORT_C __NAKED__ void kumemput32(TAny* /*aAddr*/, const TAny* /*aKernAddr*/, TInt /*aLength*/)
sl@0
   300
	{
sl@0
   301
	asm("mrs r3, spsr ");			// r3=spsr_svc
sl@0
   302
	asm("tst r3, #0x0f ");			// test for user mode
sl@0
   303
	asm("bne wordmove ");			// if not, just do wordmove
sl@0
   304
	// otherwise fall through to umemput32
sl@0
   305
	}
sl@0
   306
sl@0
   307
	
sl@0
   308
EXPORT_C __NAKED__ void umemput32(TAny* /*aUserAddr*/, const TAny* /*aKernAddr*/, TInt /*aLength*/)
sl@0
   309
	{
sl@0
   310
	ASM_ASSERT_DATA_PAGING_SAFE
sl@0
   311
sl@0
   312
#ifdef __USER_MEMORY_GUARDS_ENABLED__
sl@0
   313
	// Wrap the workings of this function in an internal call, so we can save/restore UMG state
sl@0
   314
	asm("stmfd sp!, {r11, lr} ");
sl@0
   315
	asm("subs r12, r2, #1");
sl@0
   316
	asm("ldrhsb r11, [r1]");				// test access to first byte of kernel memory
sl@0
   317
	asm("ldrhsb r11, [r1,r12]");			// test access to last byte of kernel memory
sl@0
   318
	USER_MEMORY_GUARD_OFF(,r11,r12);		// leaves UMG mode in r11
sl@0
   319
	asm("bl 0f");							// call to label below
sl@0
   320
	USER_MEMORY_GUARD_RESTORE(r11,r12);
sl@0
   321
	asm("ldmfd sp!, {r11, pc} ");	
sl@0
   322
sl@0
   323
	asm("0:");
sl@0
   324
#endif
sl@0
   325
sl@0
   326
#ifdef _DEBUG
sl@0
   327
	asm("tst r2, #3 ");						// check length is a whole number of words
sl@0
   328
	CUMEM_FAULT(ne, KL::EWordMoveLengthNotMultipleOf4);
sl@0
   329
#endif
sl@0
   330
sl@0
   331
	PLD(1);
sl@0
   332
	asm("cmp r2, #4 ");						// special case for 4 byte copy which is common
sl@0
   333
	asm("ldrhs r3, [r1], #4 ");
sl@0
   334
	asm("subhs r2, r2, #4 ");
sl@0
   335
	asm("strhst r3, [r0], #4 ");
sl@0
   336
	__JUMP(ls,lr);
sl@0
   337
	
sl@0
   338
	asm("_umemput_word_aligned: ");
sl@0
   339
	asm("stmfd sp!, {r4, lr} ");
sl@0
   340
	asm("subs r2, r2, #32 ");
sl@0
   341
	asm("bhs _umemput32_align_source ");
sl@0
   342
sl@0
   343
	asm("_umemput32_small_copy: ");			// copy 1 - 31 bytes
sl@0
   344
	asm("mov r2, r2, lsl #27 ");
sl@0
   345
	asm("msr cpsr_f, r2 ");					// put length bits 4, 3, 2 into N, Z, C
sl@0
   346
	asm("ldmmiia r1!, {r3, r4, ip, lr} ");
sl@0
   347
	asm("strmit r3, [r0], #4 ");
sl@0
   348
	asm("strmit r4, [r0], #4 ");
sl@0
   349
	asm("ldmeqia r1!, {r3, r4} ");
sl@0
   350
	asm("strmit ip, [r0], #4 ");
sl@0
   351
	asm("ldrcs ip, [r1], #4 ");
sl@0
   352
	asm("strmit lr, [r0], #4 ");
sl@0
   353
	asm("streqt r3, [r0], #4 ");
sl@0
   354
	asm("streqt r4, [r0], #4 ");
sl@0
   355
	asm("strcst ip, [r0], #4 ");
sl@0
   356
	asm("movs r2, r2, lsl #3 ");
sl@0
   357
	UMEMPUT32_EXIT(eq);
sl@0
   358
	asm("msr cpsr_f, r2 ");					// put length bits 1, 0 into N, Z
sl@0
   359
	asm("ldrmih r3, [r1], #2 ");
sl@0
   360
	asm("ldreqb r4, [r1], #1 ");
sl@0
   361
	asm("strmibt r3, [r0], #1 ");
sl@0
   362
	asm("movmi r3, r3, lsr #8 ");
sl@0
   363
	asm("strmibt r3, [r0], #1 ");
sl@0
   364
	asm("streqbt r4, [r0], #1 ");
sl@0
   365
	asm("ldmfd sp!, {r4, pc} ");
sl@0
   366
	
sl@0
   367
	asm("_umemput32_align_source: ");
sl@0
   368
	PLD_ioff(1, 32);
sl@0
   369
	asm("cmp r2, #32 ");
sl@0
   370
	asm("bls _umemput32_large_copy ");		// don't bother if length <= 64
sl@0
   371
	asm("rsb ip, r1, #32 ");
sl@0
   372
	asm("movs ip, ip, lsl #27 ");
sl@0
   373
	asm("beq _umemput32_large_copy ");
sl@0
   374
	asm("msr cpsr_f, ip ");					// put length bits 4, 3, 2 into N, Z, C
sl@0
   375
	asm("sub r2, r2, ip, lsr #27 ");
sl@0
   376
	asm("ldmmiia r1!, {r3, r4, ip, lr} ");
sl@0
   377
	asm("strmit r3, [r0], #4 ");
sl@0
   378
	asm("strmit r4, [r0], #4 ");
sl@0
   379
	asm("ldmeqia r1!, {r3, r4} ");
sl@0
   380
	asm("strmit ip, [r0], #4 ");
sl@0
   381
	asm("ldrcs ip, [r1], #4 ");
sl@0
   382
	asm("strmit lr, [r0], #4 ");
sl@0
   383
	asm("streqt r3, [r0], #4 ");
sl@0
   384
	asm("streqt r4, [r0], #4 ");
sl@0
   385
	asm("strcst ip, [r0], #4 ");
sl@0
   386
sl@0
   387
	asm("_umemput32_large_copy: ");			// copy 32 byte blocks
sl@0
   388
	PLD_ioff(1, 64);
sl@0
   389
	asm("ldmia r1!, {r3, r4, ip, lr} ");
sl@0
   390
	asm("strt r3, [r0], #4 ");
sl@0
   391
	asm("strt r4, [r0], #4 ");
sl@0
   392
	asm("strt ip, [r0], #4 ");
sl@0
   393
	asm("strt lr, [r0], #4 ");
sl@0
   394
	asm("ldmia r1!, {r3, r4, ip, lr} ");
sl@0
   395
	asm("strt r3, [r0], #4 ");
sl@0
   396
	asm("strt r4, [r0], #4 ");
sl@0
   397
	asm("strt ip, [r0], #4 ");
sl@0
   398
	asm("strt lr, [r0], #4 ");
sl@0
   399
	asm("subs r2, r2, #32 ");
sl@0
   400
	asm("bhs _umemput32_large_copy ");
sl@0
   401
	asm("adds r2, r2, #32 ");
sl@0
   402
	asm("bne _umemput32_small_copy ");
sl@0
   403
	asm("ldmfd sp!, {r4, pc} ");
sl@0
   404
	}
sl@0
   405
sl@0
   406
sl@0
   407
__NAKED__ void uumemcpy32(TAny* /*aUserDst*/, const TAny* /*aUserSrc*/, TInt /*aLength*/)
sl@0
   408
	{
sl@0
   409
	ASM_ASSERT_PAGING_SAFE
sl@0
   410
sl@0
   411
#ifdef __USER_MEMORY_GUARDS_ENABLED__
sl@0
   412
	// Wrap the workings of this function in an internal call, so we can save/restore UMG state
sl@0
   413
	asm("stmfd sp!, {r11, lr} ");
sl@0
   414
	USER_MEMORY_GUARD_OFF(,r11,r12);		// leaves UMG mode in r11
sl@0
   415
	asm("bl 0f");							// call to label below
sl@0
   416
	USER_MEMORY_GUARD_RESTORE(r11,r12);
sl@0
   417
	asm("ldmfd sp!, {r11, pc} ");	
sl@0
   418
sl@0
   419
	asm("0:");
sl@0
   420
#endif
sl@0
   421
sl@0
   422
	asm("1: ");
sl@0
   423
	asm("subs r2, r2, #4 ");
sl@0
   424
	asm("ldrplt r3, [r1], #4 ");
sl@0
   425
	asm("strplt r3, [r0], #4 ");
sl@0
   426
	asm("bpl 1b ");
sl@0
   427
	__JUMP(,lr);
sl@0
   428
	}
sl@0
   429
sl@0
   430
sl@0
   431
__NAKED__ void uumemcpy(TAny* /*aUserDst*/, const TAny* /*aUserSrc*/, TInt /*aLength*/)
sl@0
   432
	{
sl@0
   433
	ASM_ASSERT_PAGING_SAFE
sl@0
   434
sl@0
   435
#ifdef __USER_MEMORY_GUARDS_ENABLED__
sl@0
   436
	// Wrap the workings of this function in an internal call, so we can save/restore UMG state
sl@0
   437
	asm("stmfd sp!, {r11, lr} ");
sl@0
   438
	USER_MEMORY_GUARD_OFF(,r11,r12);		// leaves UMG mode in r11
sl@0
   439
	asm("bl 0f");							// call to label below
sl@0
   440
	USER_MEMORY_GUARD_RESTORE(r11,r12);
sl@0
   441
	asm("ldmfd sp!, {r11, pc} ");	
sl@0
   442
sl@0
   443
	asm("0:");
sl@0
   444
#endif
sl@0
   445
sl@0
   446
	asm("cmp r2, #8 ");
sl@0
   447
	asm("bcs 1f ");
sl@0
   448
	asm("2: ");
sl@0
   449
	asm("subs r2, r2, #1 ");
sl@0
   450
	asm("ldrplbt r3, [r1], #1 ");
sl@0
   451
	asm("strplbt r3, [r0], #1 ");
sl@0
   452
	asm("bgt 2b ");
sl@0
   453
	__JUMP(,lr);
sl@0
   454
	asm("1: ");
sl@0
   455
	asm("movs r3, r0, lsl #30 ");
sl@0
   456
	asm("beq 5f ");
sl@0
   457
	asm("rsbs r3, r3, #0 ");		// 01->c0000000 (MI,VC) 10->80000000 (MI,VS) 11->40000000 (PL,VC)
sl@0
   458
	asm("sub r2, r2, r3, lsr #30 ");
sl@0
   459
	asm("ldrmibt r3, [r1], #1 ");
sl@0
   460
	asm("strmibt r3, [r0], #1 ");
sl@0
   461
	asm("ldrmibt r3, [r1], #1 ");
sl@0
   462
	asm("strmibt r3, [r0], #1 ");
sl@0
   463
	asm("ldrvcbt r3, [r1], #1 ");
sl@0
   464
	asm("strvcbt r3, [r0], #1 ");	// r0 now word aligned
sl@0
   465
	asm("5: ");
sl@0
   466
	asm("movs r3, r1, lsl #31 ");
sl@0
   467
	asm("bic r1, r1, #3 ");
sl@0
   468
	asm("bcs 3f ");					// branch if src mod 4 = 2 or 3
sl@0
   469
	asm("bmi 4f ");					// branch if src mod 4 = 1
sl@0
   470
	asm("2: ");
sl@0
   471
	asm("subs r2, r2, #4 ");
sl@0
   472
	asm("ldrget r3, [r1], #4 ");
sl@0
   473
	asm("strget r3, [r0], #4 ");
sl@0
   474
	asm("bgt 2b ");
sl@0
   475
	asm("uumemcpy_do_end: ");
sl@0
   476
	__JUMP(eq,lr);
sl@0
   477
	asm("adds r2, r2, #2 ");		// -1 if 1 left, 0 if 2 left, +1 if 3 left
sl@0
   478
	asm("ldrplbt r3, [r1], #1 ");
sl@0
   479
	asm("strplbt r3, [r0], #1 ");
sl@0
   480
	asm("ldrplbt r3, [r1], #1 ");
sl@0
   481
	asm("strplbt r3, [r0], #1 ");
sl@0
   482
	asm("ldrnebt r3, [r1], #1 ");
sl@0
   483
	asm("strnebt r3, [r0], #1 ");
sl@0
   484
	__JUMP(,lr);
sl@0
   485
	asm("3: ");						// get here if src mod 4 = 2 or 3
sl@0
   486
	asm("bmi 5f ");					// branch if 3
sl@0
   487
	asm("2: ");
sl@0
   488
	asm("subs r2, r2, #4 ");
sl@0
   489
	asm("ldrget r3, [r1], #4 ");
sl@0
   490
	asm("ldrget ip, [r1] ");
sl@0
   491
	asm("movge r3, r3, lsr #16 ");
sl@0
   492
	asm("orrge r3, r3, ip, lsl #16 ");
sl@0
   493
	asm("strget r3, [r0], #4 ");
sl@0
   494
	asm("bgt 2b ");
sl@0
   495
	asm("add r1, r1, #2 ");
sl@0
   496
	asm("b uumemcpy_do_end ");
sl@0
   497
	asm("5: ");
sl@0
   498
	asm("subs r2, r2, #4 ");
sl@0
   499
	asm("ldrget r3, [r1], #4 ");
sl@0
   500
	asm("ldrget ip, [r1] ");
sl@0
   501
	asm("movge r3, r3, lsr #24 ");
sl@0
   502
	asm("orrge r3, r3, ip, lsl #8 ");
sl@0
   503
	asm("strget r3, [r0], #4 ");
sl@0
   504
	asm("bgt 5b ");
sl@0
   505
	asm("add r1, r1, #3 ");
sl@0
   506
	asm("b uumemcpy_do_end ");
sl@0
   507
	asm("4: ");
sl@0
   508
	asm("subs r2, r2, #4 ");
sl@0
   509
	asm("ldrget r3, [r1], #4 ");
sl@0
   510
	asm("ldrget ip, [r1] ");
sl@0
   511
	asm("movge r3, r3, lsr #8 ");
sl@0
   512
	asm("orrge r3, r3, ip, lsl #24 ");
sl@0
   513
	asm("strget r3, [r0], #4 ");
sl@0
   514
	asm("bgt 4b ");
sl@0
   515
	asm("add r1, r1, #1 ");
sl@0
   516
	asm("b uumemcpy_do_end ");
sl@0
   517
	}
sl@0
   518
sl@0
   519
sl@0
   520
EXPORT_C __NAKED__ void kumemput(TAny* /*aAddr*/, const TAny* /*aKernAddr*/, TInt /*aLength*/)
sl@0
   521
	{
sl@0
   522
	asm("mrs r3, spsr ");			// r3=spsr_svc
sl@0
   523
	asm("tst r3, #0x0f ");			// test for user mode
sl@0
   524
	asm("bne memcpy ");				// if not, just do memcpy
sl@0
   525
	// otherwise fall through to umemput
sl@0
   526
	}
sl@0
   527
sl@0
   528
sl@0
   529
EXPORT_C __NAKED__ void umemput(TAny* /*aUserAddr*/, const TAny* /*aKernAddr*/, TInt /*aLength*/)
sl@0
   530
	{
sl@0
   531
	// Optimised for word-aligned transfers, as unaligned are very rare in practice	
sl@0
   532
sl@0
   533
	ASM_ASSERT_DATA_PAGING_SAFE
sl@0
   534
	asm("umemput_no_paging_assert:");
sl@0
   535
sl@0
   536
#ifdef __USER_MEMORY_GUARDS_ENABLED__
sl@0
   537
	// Wrap the workings of this function in an internal call, so we can save/restore UMG state
sl@0
   538
	asm("stmfd sp!, {r11, lr} ");
sl@0
   539
	asm("subs r12, r2, #1");
sl@0
   540
	asm("ldrhsb r11, [r1]");				// test access to first byte of kernel memory
sl@0
   541
	asm("ldrhsb r11, [r1,r12]");			// test access to last byte of kernel memory
sl@0
   542
	USER_MEMORY_GUARD_OFF(,r11,r12);		// leaves UMG mode in r11
sl@0
   543
	asm("bl 0f");							// call to label below
sl@0
   544
	USER_MEMORY_GUARD_RESTORE(r11,r12);
sl@0
   545
	asm("ldmfd sp!, {r11, pc} ");	
sl@0
   546
sl@0
   547
	asm("0:");
sl@0
   548
#endif
sl@0
   549
sl@0
   550
	PLD(1);
sl@0
   551
	asm("tst r0, #3 ");
sl@0
   552
	asm("tsteq r1, #3 ");
sl@0
   553
	asm("beq _umemput_word_aligned ");
sl@0
   554
	
sl@0
   555
	asm("cmp r2, #8 ");
sl@0
   556
	asm("bcs 1f ");
sl@0
   557
	asm("2: ");						// Copy 0 - 7 bytes
sl@0
   558
	asm("subs r2, r2, #1 ");
sl@0
   559
	asm("ldrplb r3, [r1], #1 ");
sl@0
   560
	asm("strplbt r3, [r0], #1 ");
sl@0
   561
	asm("bgt 2b ");
sl@0
   562
	__JUMP(,lr);
sl@0
   563
	
sl@0
   564
	asm("1: ");						// Word-align dest
sl@0
   565
	asm("movs r3, r0, lsl #30 ");
sl@0
   566
	asm("beq 5f ");
sl@0
   567
	asm("rsbs r3, r3, #0 ");		// 01->c0000000 (MI,VC) 10->80000000 (MI,VS) 11->40000000 (PL,VC)
sl@0
   568
	asm("sub r2, r2, r3, lsr #30 ");
sl@0
   569
	asm("ldrmib r3, [r1], #1 ");
sl@0
   570
	asm("strmibt r3, [r0], #1 ");
sl@0
   571
	asm("ldrmib r3, [r1], #1 ");
sl@0
   572
	asm("strmibt r3, [r0], #1 ");
sl@0
   573
	asm("ldrvcb r3, [r1], #1 ");
sl@0
   574
	asm("strvcbt r3, [r0], #1 ");	// r0 now word aligned
sl@0
   575
	asm("5: ");
sl@0
   576
	asm("movs r3, r1, lsl #31 ");
sl@0
   577
	asm("bic r1, r1, #3 ");
sl@0
   578
	asm("bcs 3f ");					// branch if src mod 4 = 2 or 3
sl@0
   579
	asm("bpl _umemput_word_aligned "); // branch if src mod 4 = 0
sl@0
   580
sl@0
   581
	asm("4: ");						// get here if src mod 4 = 1
sl@0
   582
	asm("subs r2, r2, #4 ");
sl@0
   583
	asm("ldrge r3, [r1], #4 ");
sl@0
   584
	asm("ldrge ip, [r1] ");
sl@0
   585
	asm("movge r3, r3, lsr #8 ");
sl@0
   586
	asm("orrge r3, r3, ip, lsl #24 ");
sl@0
   587
	asm("strget r3, [r0], #4 ");
sl@0
   588
	asm("bgt 4b ");
sl@0
   589
	asm("add r1, r1, #1 ");
sl@0
   590
	asm("b _umemput_do_end ");
sl@0
   591
	
sl@0
   592
	asm("3: ");						// get here if src mod 4 = 2 or 3
sl@0
   593
	asm("bmi 5f ");					// branch if 3
sl@0
   594
	asm("2: ");
sl@0
   595
	asm("subs r2, r2, #4 ");
sl@0
   596
	asm("ldrge r3, [r1], #4 ");
sl@0
   597
	asm("ldrge ip, [r1] ");
sl@0
   598
	asm("movge r3, r3, lsr #16 ");
sl@0
   599
	asm("orrge r3, r3, ip, lsl #16 ");
sl@0
   600
	asm("strget r3, [r0], #4 ");
sl@0
   601
	asm("bgt 2b ");
sl@0
   602
	asm("add r1, r1, #2 ");
sl@0
   603
	asm("b _umemput_do_end ");
sl@0
   604
	
sl@0
   605
	asm("5: ");						// get here if src mod 4 = 3
sl@0
   606
	asm("subs r2, r2, #4 ");
sl@0
   607
	asm("ldrge r3, [r1], #4 ");
sl@0
   608
	asm("ldrge ip, [r1] ");
sl@0
   609
	asm("movge r3, r3, lsr #24 ");
sl@0
   610
	asm("orrge r3, r3, ip, lsl #8 ");
sl@0
   611
	asm("strget r3, [r0], #4 ");
sl@0
   612
	asm("bgt 5b ");
sl@0
   613
	asm("add r1, r1, #3 ");
sl@0
   614
sl@0
   615
	asm("_umemput_do_end: ");		// z set if done, else r2 == length remaining - 4
sl@0
   616
	__JUMP(eq,lr);
sl@0
   617
	asm("adds r2, r2, #2 ");		// r2 = -1 if 1 left, 0 if 2 left, +1 if 3 left
sl@0
   618
	asm("ldrplb r3, [r1], #1 ");
sl@0
   619
	asm("strplbt r3, [r0], #1 ");
sl@0
   620
	asm("ldrplb r3, [r1], #1 ");
sl@0
   621
	asm("strplbt r3, [r0], #1 ");
sl@0
   622
	asm("ldrneb r3, [r1], #1 ");
sl@0
   623
	asm("strnebt r3, [r0], #1 ");
sl@0
   624
	__JUMP(,lr);
sl@0
   625
	}
sl@0
   626
sl@0
   627
#endif  // USE_REPLACEMENT_UMEMPUT
sl@0
   628
	
sl@0
   629
	
sl@0
   630
EXPORT_C __NAKED__ void kumemset(TAny* /*aAddr*/, const TUint8 /*aValue*/, TInt /*aLength*/)
sl@0
   631
	{
sl@0
   632
	asm("mrs r3, spsr ");			// r3=spsr_svc
sl@0
   633
	asm("tst r3, #0x0f ");			// test for user mode
sl@0
   634
	asm("bne memset ");				// if not, just do memset
sl@0
   635
	// otherwise fall through to umemset
sl@0
   636
	}
sl@0
   637
sl@0
   638
sl@0
   639
EXPORT_C __NAKED__ void umemset(TAny* /*aUserAddr*/, const TUint8 /*aValue*/, TInt /*aLength*/)
sl@0
   640
	{
sl@0
   641
	ASM_ASSERT_DATA_PAGING_SAFE
sl@0
   642
sl@0
   643
#ifdef __USER_MEMORY_GUARDS_ENABLED__
sl@0
   644
	// Wrap the workings of this function in an internal call, so we can save/restore UMG state
sl@0
   645
	asm("stmfd sp!, {r11, lr} ");
sl@0
   646
	USER_MEMORY_GUARD_OFF(,r11,r12);		// leaves UMG mode in r11
sl@0
   647
	asm("bl 0f");							// call to label below
sl@0
   648
	USER_MEMORY_GUARD_RESTORE(r11,r12);
sl@0
   649
	asm("ldmfd sp!, {r11, pc} ");	
sl@0
   650
sl@0
   651
	asm("0:");
sl@0
   652
#endif
sl@0
   653
sl@0
   654
	asm("cmp r2, #7 ");
sl@0
   655
	asm("bhi 2f ");
sl@0
   656
	asm("1: ");
sl@0
   657
	asm("subs r2, r2, #1 ");
sl@0
   658
	asm("strplbt r1, [r0], #1 ");
sl@0
   659
	asm("bgt 1b ");
sl@0
   660
	__JUMP(,lr);	
sl@0
   661
	asm("2: ");
sl@0
   662
	asm("and r1, r1, #0xff ");
sl@0
   663
	asm("orr r1, r1, r1, lsl #8 ");
sl@0
   664
	asm("orr r1, r1, r1, lsl #16 ");
sl@0
   665
	asm("movs r3, r0, lsl #30 ");
sl@0
   666
	asm("beq 3f ");
sl@0
   667
	asm("rsbs r3, r3, #0 ");		// 01->c0000000 (MI,VC) 10->80000000 (MI,VS) 11->40000000 (PL,VC)
sl@0
   668
	asm("strmibt r1, [r0], #1 ");	// if 01 or 10 do 2 byte stores
sl@0
   669
	asm("strmibt r1, [r0], #1 ");
sl@0
   670
	asm("strvcbt r1, [r0], #1 ");	// if 01 or 11 do 1 byte store
sl@0
   671
	asm("sub r2, r2, r3, lsr #30 ");
sl@0
   672
	asm("3: ");						// r0 now word aligned
sl@0
   673
	asm("subs r2, r2, #4 ");
sl@0
   674
	asm("strplt r1, [r0], #4 ");
sl@0
   675
	asm("bgt 3b ");
sl@0
   676
	__JUMP(eq,lr);					// return if finished
sl@0
   677
	asm("adds r2, r2, #2 ");		// -1 if 1 left, 0 if 2 left, +1 if 3 left
sl@0
   678
	asm("strplbt r1, [r0], #1 ");
sl@0
   679
	asm("strplbt r1, [r0], #1 ");
sl@0
   680
	asm("strnebt r1, [r0], #1 ");
sl@0
   681
	__JUMP(,lr);
sl@0
   682
	}
sl@0
   683
	
sl@0
   684
}