|
sl@0
|
1 |
// Copyright (c) 2007-2009 Nokia Corporation and/or its subsidiary(-ies).
|
|
sl@0
|
2 |
// All rights reserved.
|
|
sl@0
|
3 |
// This component and the accompanying materials are made available
|
|
sl@0
|
4 |
// under the terms of the License "Eclipse Public License v1.0"
|
|
sl@0
|
5 |
// which accompanies this distribution, and is available
|
|
sl@0
|
6 |
// at the URL "http://www.eclipse.org/legal/epl-v10.html".
|
|
sl@0
|
7 |
//
|
|
sl@0
|
8 |
// Initial Contributors:
|
|
sl@0
|
9 |
// Nokia Corporation - initial contribution.
|
|
sl@0
|
10 |
//
|
|
sl@0
|
11 |
// Contributors:
|
|
sl@0
|
12 |
//
|
|
sl@0
|
13 |
// Description:
|
|
sl@0
|
14 |
// e32\include\nkernsmp\x86\apic.h
|
|
sl@0
|
15 |
//
|
|
sl@0
|
16 |
//
|
|
sl@0
|
17 |
|
|
sl@0
|
18 |
#define X86_LOCAL_APIC_BASE 0xFEE00000
|
|
sl@0
|
19 |
|
|
sl@0
|
20 |
#define X86_LOCAL_APIC_OFFSET_ID 0x20
|
|
sl@0
|
21 |
#define X86_LOCAL_APIC_OFFSET_VER 0x30
|
|
sl@0
|
22 |
#define X86_LOCAL_APIC_OFFSET_TPR 0x80
|
|
sl@0
|
23 |
#define X86_LOCAL_APIC_OFFSET_APR 0x90
|
|
sl@0
|
24 |
#define X86_LOCAL_APIC_OFFSET_PPR 0xA0
|
|
sl@0
|
25 |
#define X86_LOCAL_APIC_OFFSET_EOI 0xB0
|
|
sl@0
|
26 |
#define X86_LOCAL_APIC_OFFSET_LDR 0xD0
|
|
sl@0
|
27 |
#define X86_LOCAL_APIC_OFFSET_DFR 0xE0
|
|
sl@0
|
28 |
#define X86_LOCAL_APIC_OFFSET_SIVR 0xF0
|
|
sl@0
|
29 |
#define X86_LOCAL_APIC_OFFSET_ISR 0x100
|
|
sl@0
|
30 |
#define X86_LOCAL_APIC_OFFSET_TMR 0x180
|
|
sl@0
|
31 |
#define X86_LOCAL_APIC_OFFSET_IRR 0x200
|
|
sl@0
|
32 |
#define X86_LOCAL_APIC_OFFSET_ESR 0x280
|
|
sl@0
|
33 |
#define X86_LOCAL_APIC_OFFSET_ICRL 0x300
|
|
sl@0
|
34 |
#define X86_LOCAL_APIC_OFFSET_ICRH 0x310
|
|
sl@0
|
35 |
#define X86_LOCAL_APIC_OFFSET_LVTTMR 0x320
|
|
sl@0
|
36 |
#define X86_LOCAL_APIC_OFFSET_LVTTSR 0x330
|
|
sl@0
|
37 |
#define X86_LOCAL_APIC_OFFSET_LVTPMCR 0x340
|
|
sl@0
|
38 |
#define X86_LOCAL_APIC_OFFSET_LVTLINT0 0x350
|
|
sl@0
|
39 |
#define X86_LOCAL_APIC_OFFSET_LVTLINT1 0x360
|
|
sl@0
|
40 |
#define X86_LOCAL_APIC_OFFSET_LVTERR 0x370
|
|
sl@0
|
41 |
#define X86_LOCAL_APIC_OFFSET_INITCNT 0x380
|
|
sl@0
|
42 |
#define X86_LOCAL_APIC_OFFSET_CURRCNT 0x390
|
|
sl@0
|
43 |
#define X86_LOCAL_APIC_OFFSET_DIVCNF 0x3E0
|
|
sl@0
|
44 |
|
|
sl@0
|
45 |
|
|
sl@0
|
46 |
|
|
sl@0
|
47 |
#define apic_reg(x) X86_LOCAL_APIC_OFFSET_##x
|
|
sl@0
|
48 |
#define read_apic_reg(x) *((volatile TUint32*)(X86_LOCAL_APIC_BASE + apic_reg(x)))
|
|
sl@0
|
49 |
#define write_apic_reg(x,y) *((volatile TUint32*)(X86_LOCAL_APIC_BASE + apic_reg(x))) = (y)
|
|
sl@0
|
50 |
|
|
sl@0
|
51 |
#define __USE_LOGICAL_DEST_MODE__
|