Symaptic: os/kernelhwsrv/kernel/eka/include/drivers/mmc.h@260cb5ec6c19 (annotated)

sl@0	1	// Copyright (c) 1999-2009 Nokia Corporation and/or its subsidiary(-ies).
sl@0	2	// All rights reserved.
sl@0	3	// This component and the accompanying materials are made available
sl@0	4	// under the terms of the License "Eclipse Public License v1.0"
sl@0	5	// which accompanies this distribution, and is available
sl@0	6	// at the URL "http://www.eclipse.org/legal/epl-v10.html".
sl@0	7	//
sl@0	8	// Initial Contributors:
sl@0	9	// Nokia Corporation - initial contribution.
sl@0	10	//
sl@0	11	// Contributors:
sl@0	12	//
sl@0	13	// Description:
sl@0	14	// Generic MMC controller types and standard classes for MMC manipulation
sl@0	15	// This controller follows MMC spec V2.1
sl@0	16	//
sl@0	17	//
sl@0	18
sl@0	19	/**
sl@0	20	@file
sl@0	21	@internalComponent
sl@0	22	*/
sl@0	23
sl@0	24	#if !defined(__MMC_H__)
sl@0	25	#define __MMC_H__
sl@0	26
sl@0	27	#include <drivers/pbus.h>
sl@0	28	#include <d32locd.h>
sl@0	29
sl@0	30	// MMC Card maximum system settings
sl@0	31
sl@0	32	const TInt KMaxMmcSockets = KMaxPBusSockets;
sl@0	33
sl@0	34	// Forward type declarations
sl@0	35
sl@0	36	class TMMC;
sl@0	37	class TCID;
sl@0	38	class TCSD;
sl@0	39	class TExtendedCSD;
sl@0	40	class TRCA;
sl@0	41	class TDSR;
sl@0	42	class TMMCStatus;
sl@0	43	class TMMCArgument;
sl@0	44	class TMMCard;
sl@0	45	class TMMCCommandDesc;
sl@0	46	class TMMCBusConfig;
sl@0	47	class TMMCStackConfig;
sl@0	48	class TMMCRCAPool;
sl@0	49	class TMMCSessRing;
sl@0	50	class TMMCStateMachine;
sl@0	51	class DMMCSocket;
sl@0	52	class DMMCSession;
sl@0	53	class DMMCStack;
sl@0	54	class TMMCMachineInfo;
sl@0	55	class TMapping;
sl@0	56	class TMMCPasswordStore;
sl@0	57	class TMMCEraseInfo;
sl@0	58	class TMMCMachineInfoV4;
sl@0	59	typedef TPckg<TMMCMachineInfoV4> TMMCMachineInfoV4Pckg;
sl@0	60
sl@0	61	enum TMMCAppCommand {EMMCNormalCmd,EMMCApplicationCmd};
sl@0	62
sl@0	63	// Typedefs
sl@0	64
sl@0	65	/**
sl@0	66	@publishedPartner
sl@0	67	@released
sl@0	68
sl@0	69	Represents the MultiMediaCard error code bit set.
sl@0	70
sl@0	71	MultiMediaCard error codes are defined as bit masks, mainly for use with
sl@0	72	the state machine where the error trap mask may be used.
sl@0	73	The function DMMCSession::EpocErrorCode() converts these error bit values
sl@0	74	into standard Symbian OS error values.
sl@0	75
sl@0	76	@see KMMCErrNone
sl@0	77	@see KMMCErrResponseTimeOut
sl@0	78	@see KMMCErrDataTimeOut
sl@0	79	@see KMMCErrBusyTimeOut
sl@0	80	@see KMMCErrBusTimeOut
sl@0	81	@see KMMCErrTooManyCards
sl@0	82	@see KMMCErrResponseCRC
sl@0	83	@see KMMCErrDataCRC
sl@0	84	@see KMMCErrCommandCRC
sl@0	85	@see KMMCErrStatus
sl@0	86	@see KMMCErrNoCard
sl@0	87	@see KMMCErrBrokenLock
sl@0	88	@see KMMCErrPowerDown
sl@0	89	@see KMMCErrAbort
sl@0	90	@see KMMCErrStackNotReady
sl@0	91	@see KMMCErrNotSupported
sl@0	92	@see KMMCErrHardware
sl@0	93	@see KMMCErrBusInconsistent
sl@0	94	@see KMMCErrBypass
sl@0	95	@see KMMCErrInitContext
sl@0	96	@see KMMCErrArgument
sl@0	97	@see KMMCErrSingleBlock
sl@0	98	@see KMMCErrLocked
sl@0	99	@see KMMCErrNotFound
sl@0	100	@see KMMCErrAlreadyExists
sl@0	101	@see KMMCErrGeneral
sl@0	102	@see KMMCErrAll
sl@0	103	@see KMMCErrBasic
sl@0	104	*/
sl@0	105	typedef TUint32 TMMCErr;
sl@0	106
sl@0	107	// MMC Enums and inline functions
sl@0	108
sl@0	109
sl@0	110
sl@0	111
sl@0	112	/**
sl@0	113	@publishedPartner
sl@0	114	@released
sl@0	115
sl@0	116	Defines a set of symbols corresponding to the MultiMediaCard bus commands.
sl@0	117
sl@0	118	A command is one of the parameter values inserted into a TMMCCommandDesc object.
sl@0	119	The commands themselves are defined by the MultiMediaCard specification.
sl@0	120
sl@0	121	@see TMMCCommandDesc
sl@0	122	*/
sl@0	123	enum TMMCCommandEnum
sl@0	124	{
sl@0	125	/**
sl@0	126	CMD0; reset all cards to idle state.
sl@0	127	*/
sl@0	128	ECmdGoIdleState =0,
sl@0	129
sl@0	130
sl@0	131	/**
sl@0	132	CMD1; all cards in the idle state send their operating conditions.
sl@0	133	*/
sl@0	134	ECmdSendOpCond =1,
sl@0	135
sl@0	136
sl@0	137	/**
sl@0	138	CMD2; all cards send their CID number.
sl@0	139	*/
sl@0	140	ECmdAllSendCID =2,
sl@0	141
sl@0	142
sl@0	143	/**
sl@0	144	CMD3; assign relative address to a card.
sl@0	145	*/
sl@0	146	ECmdSetRelativeAddr =3,
sl@0	147
sl@0	148
sl@0	149	/**
sl@0	150	CMD4; program the DSR register of all cards.
sl@0	151	*/
sl@0	152	ECmdSetDSR =4,
sl@0	153
sl@0	154
sl@0	155	/**
sl@0	156	CMD5; toggle device between Sleep and Awake states.
sl@0	157	*/
sl@0	158	ECmd5 =5,
sl@0	159	ECmdSleepAwake =5,
sl@0	160
sl@0	161
sl@0	162	/**
sl@0	163	CMD6; Switch
sl@0	164	*/
sl@0	165	ECmd6 =6,
sl@0	166	ECmdSwitch =6,
sl@0	167
sl@0	168
sl@0	169	/**
sl@0	170	CMD7; toggle a card between standby and transfer state, or between
sl@0	171	programming and disconnected state.
sl@0	172
sl@0	173	The card is selected by its RCA and deselected by any other address.
sl@0	174	*/
sl@0	175	ECmdSelectCard =7,
sl@0	176
sl@0	177
sl@0	178	/**
sl@0	179	CMD8; addressed card sends its extended CSD.
sl@0	180	*/
sl@0	181	ECmd8 =8,
sl@0	182	ECmdSendExtendedCSD =8,
sl@0	183
sl@0	184
sl@0	185	/**
sl@0	186	CMD9; addressed card sends its CSD.
sl@0	187	*/
sl@0	188	ECmdSendCSD =9,
sl@0	189
sl@0	190
sl@0	191	/**
sl@0	192	CMD10; addressed card sends its CID.
sl@0	193	*/
sl@0	194	ECmdSendCID =10,
sl@0	195
sl@0	196
sl@0	197	/**
sl@0	198	CMD11; read data stream from the card starting at the given address until
sl@0	199	an ECmdStopTransmission follows.
sl@0	200
sl@0	201	@see ECmdStopTransmission
sl@0	202	*/
sl@0	203	ECmdReadDatUntilStop =11,
sl@0	204
sl@0	205
sl@0	206	/**
sl@0	207	CMD12; force the card to stop transmission.
sl@0	208	*/
sl@0	209	ECmdStopTransmission =12,
sl@0	210
sl@0	211
sl@0	212	/**
sl@0	213	CMD13; addressed card sends its status register.
sl@0	214	*/
sl@0	215	ECmdSendStatus =13,
sl@0	216
sl@0	217
sl@0	218	/**
sl@0	219	CMD14; BUSTEST_R - Reads the reversed bus testing data pattern from the card.
sl@0	220
sl@0	221	@see ECmdBustest_W
sl@0	222	*/
sl@0	223	ECmd14 =14,
sl@0	224	ECmdBustest_R =14,
sl@0	225
sl@0	226
sl@0	227	/**
sl@0	228	CMD15; set the card to the inactive state.
sl@0	229	*/
sl@0	230	ECmdGoInactiveState =15,
sl@0	231
sl@0	232
sl@0	233	/**
sl@0	234	CMD16; set the block length for all following block commands.
sl@0	235	*/
sl@0	236	ECmdSetBlockLen =16,
sl@0	237
sl@0	238
sl@0	239	/**
sl@0	240	CMD17; read a single data block from the card.
sl@0	241	*/
sl@0	242	ECmdReadSingleBlock =17,
sl@0	243
sl@0	244
sl@0	245	/**
sl@0	246	CMD18; continuously transfer data blocks from the card until interrupted
sl@0	247	by ECmdStopTransmission.
sl@0	248
sl@0	249	@see ECmdStopTransmission
sl@0	250	*/
sl@0	251	ECmdReadMultipleBlock =18,
sl@0	252
sl@0	253
sl@0	254	/**
sl@0	255	CMD19; BUSTEST_W - Sends a test data pattern to the card to determine the bus characteristics
sl@0	256
sl@0	257	@see ECmdBustest_R
sl@0	258	*/
sl@0	259	ECmd19 =19,
sl@0	260	ECmdBustest_W =19,
sl@0	261
sl@0	262
sl@0	263	/**
sl@0	264	CMD20; write data stream from the host starting at the given address
sl@0	265	until interrupted by ECmdStopTransmission.
sl@0	266
sl@0	267	@see ECmdStopTransmission
sl@0	268	*/
sl@0	269	ECmdWriteDatUntilStop =20,
sl@0	270
sl@0	271
sl@0	272	/**
sl@0	273	CMD21; reserved for future use.
sl@0	274	*/
sl@0	275	ECmd21 =21,
sl@0	276
sl@0	277
sl@0	278	/**
sl@0	279	CMD22; reserved for future use.
sl@0	280	*/
sl@0	281	ECmd22 =22,
sl@0	282
sl@0	283
sl@0	284	/**
sl@0	285	CMD23; define the number of blocks to be transferred in the following
sl@0	286	multiple block read or write command.
sl@0	287	*/
sl@0	288	ECmdSetBlockCount =23,
sl@0	289
sl@0	290
sl@0	291	/**
sl@0	292	CMD24; write a single block to the card.
sl@0	293	*/
sl@0	294	ECmdWriteBlock =24,
sl@0	295
sl@0	296
sl@0	297	/**
sl@0	298	CMD25; continuously transfer data blocks to the card until interrupted
sl@0	299	by ECmdStopTransmission.
sl@0	300
sl@0	301	@see ECmdStopTransmission
sl@0	302	*/
sl@0	303	ECmdWriteMultipleBlock =25,
sl@0	304
sl@0	305
sl@0	306	/**
sl@0	307	CMD26; programming of the CID.
sl@0	308
sl@0	309	This is issued once per card, and is normally reserved for
sl@0	310	the manufacturer.
sl@0	311	*/
sl@0	312	ECmdProgramCID =26,
sl@0	313
sl@0	314
sl@0	315	/**
sl@0	316	CMD27; programming of the programmable bits of the CSD.
sl@0	317	*/
sl@0	318	ECmdProgramCSD =27,
sl@0	319
sl@0	320
sl@0	321	/**
sl@0	322	CMD28; set the write protect bit of the addressed group, if the card has
sl@0	323	write protection features.
sl@0	324	*/
sl@0	325	ECmdSetWriteProt =28,
sl@0	326
sl@0	327
sl@0	328	/**
sl@0	329	CMD29; clear the write protect bit of the addressed group, if the card has
sl@0	330	write protection features.
sl@0	331	*/
sl@0	332	ECmdClearWriteProt =29,
sl@0	333
sl@0	334
sl@0	335	/**
sl@0	336	CMD30; ask the card to send the status of the write protect bit, if
sl@0	337	the card has write protection features.
sl@0	338	*/
sl@0	339	ECmdSendWriteProt =30,
sl@0	340
sl@0	341
sl@0	342	/**
sl@0	343	CMD31; reserved for future use.
sl@0	344	*/
sl@0	345	ECmd31 =31,
sl@0	346
sl@0	347
sl@0	348	/**
sl@0	349	CMD32; set the address of the first sector of the erase group.
sl@0	350	*/
sl@0	351	ECmdTagSectorStart =32,
sl@0	352
sl@0	353
sl@0	354	/**
sl@0	355	CMD33; set the address of the last sector in a continuous range within
sl@0	356	the selected erase group, or the address of a single sector to be
sl@0	357	selected for erase.
sl@0	358	*/
sl@0	359	ECmdTagSectorEnd =33,
sl@0	360
sl@0	361
sl@0	362	/**
sl@0	363	CMD34; remove one previously selected sector from the erase selection.
sl@0	364	*/
sl@0	365	ECmdUntagSector =34,
sl@0	366
sl@0	367
sl@0	368	/**
sl@0	369	CMD35; set the the address of the first erase group within a continuous
sl@0	370	range to be selected for erase.
sl@0	371	*/
sl@0	372	ECmdTagEraseGroupStart =35,
sl@0	373
sl@0	374
sl@0	375	/**
sl@0	376	CMD36; set the address of the last erase group within a continuous range
sl@0	377	to be selected for erase.
sl@0	378	*/
sl@0	379	ECmdTagEraseGroupEnd =36,
sl@0	380
sl@0	381
sl@0	382	/**
sl@0	383	CMD37; removes one previously selected erase group from the erase selection.
sl@0	384	*/
sl@0	385	ECmdUntagEraseGroup =37,
sl@0	386
sl@0	387
sl@0	388	/**
sl@0	389	CMD38; erase all previously selected sectors.
sl@0	390	*/
sl@0	391	ECmdErase =38,
sl@0	392
sl@0	393
sl@0	394	/**
sl@0	395	CMD39; read and write 8 bit (register) data fields.
sl@0	396	*/
sl@0	397	ECmdFastIO =39,
sl@0	398
sl@0	399
sl@0	400	/**
sl@0	401	CMD40; set the system into interrupt mode.
sl@0	402	*/
sl@0	403	ECmdGoIRQState =40,
sl@0	404
sl@0	405
sl@0	406	/**
sl@0	407	CMD41; reserved for future use.
sl@0	408	*/
sl@0	409	ECmd41 =41,
sl@0	410
sl@0	411
sl@0	412	/**
sl@0	413	CMD42; set/reset the password or lock/unlock the card.
sl@0	414	*/
sl@0	415	ECmdLockUnlock =42,
sl@0	416
sl@0	417
sl@0	418	/**
sl@0	419	CMD43; reserved for future use.
sl@0	420	*/
sl@0	421	ECmd43 =43,
sl@0	422
sl@0	423
sl@0	424	/**
sl@0	425	CMD44; reserved for future use.
sl@0	426	*/
sl@0	427	ECmd44 =44,
sl@0	428
sl@0	429
sl@0	430	/**
sl@0	431	CMD45; reserved for future use.
sl@0	432	*/
sl@0	433	ECmd45 =45,
sl@0	434
sl@0	435
sl@0	436	/**
sl@0	437	CMD46; reserved for future use.
sl@0	438	*/
sl@0	439	ECmd46 =46,
sl@0	440
sl@0	441
sl@0	442	/**
sl@0	443	CMD47; reserved for future use.
sl@0	444	*/
sl@0	445	ECmd47 =47,
sl@0	446
sl@0	447
sl@0	448	/**
sl@0	449	CMD48; reserved for future use.
sl@0	450	*/
sl@0	451	ECmd48 =48,
sl@0	452
sl@0	453
sl@0	454	/**
sl@0	455	CMD49; reserved for future use.
sl@0	456	*/
sl@0	457	ECmd49 =49,
sl@0	458
sl@0	459
sl@0	460	/**
sl@0	461	CMD50; reserved for future use.
sl@0	462	*/
sl@0	463	ECmd50 =50,
sl@0	464
sl@0	465
sl@0	466	/**
sl@0	467	CMD51; reserved for future use.
sl@0	468	*/
sl@0	469	ECmd51 =51,
sl@0	470
sl@0	471
sl@0	472	/**
sl@0	473	CMD52; reserved for future use.
sl@0	474	*/
sl@0	475	ECmd52 =52,
sl@0	476
sl@0	477
sl@0	478	/**
sl@0	479	CMD53; reserved for future use.
sl@0	480	*/
sl@0	481	ECmd53 =53,
sl@0	482
sl@0	483
sl@0	484	/**
sl@0	485	CMD54; reserved for future use.
sl@0	486	*/
sl@0	487	ECmd54 =54,
sl@0	488
sl@0	489
sl@0	490	/**
sl@0	491	CMD55; indicate to the card that the next command is an application
sl@0	492	specific command rather than a standard command.
sl@0	493	*/
sl@0	494	ECmdAppCmd =55,
sl@0	495
sl@0	496
sl@0	497	/**
sl@0	498	CMD56; transfer a data block to the card, or get a data block from the card,
sl@0	499	for general purpose/application specific commands.
sl@0	500	*/
sl@0	501	ECmdGenCmd =56,
sl@0	502
sl@0	503
sl@0	504	/**
sl@0	505	CMD57; reserved for future use.
sl@0	506	*/
sl@0	507	ECmd57 =57,
sl@0	508
sl@0	509
sl@0	510	/**
sl@0	511	CMD58; reserved for future use.
sl@0	512	*/
sl@0	513	ECmd58 =58,
sl@0	514
sl@0	515
sl@0	516	/**
sl@0	517	CMD59; reserved for future use.
sl@0	518	*/
sl@0	519	ECmd59 =59,
sl@0	520
sl@0	521
sl@0	522	/**
sl@0	523	CMD60; reserved for future use.
sl@0	524	*/
sl@0	525	ECmd60 =60,
sl@0	526
sl@0	527
sl@0	528	/**
sl@0	529	CMD61; reserved for future use.
sl@0	530	*/
sl@0	531	ECmd61 =61,
sl@0	532
sl@0	533
sl@0	534	/**
sl@0	535	CMD62; reserved for future use.
sl@0	536	*/
sl@0	537	ECmd62 =62,
sl@0	538
sl@0	539
sl@0	540	/**
sl@0	541	CMD63; reserved for future use.
sl@0	542	*/
sl@0	543	ECmd63 =63
sl@0	544	};
sl@0	545
sl@0	546	enum TMMCCommandTypeEnum
sl@0	547	{
sl@0	548	ECmdTypeUK, // UnKnown command type
sl@0	549	ECmdTypeBC, // Broadcast Command
sl@0	550	ECmdTypeBCR, // Broadcast Command with Response
sl@0	551	ECmdTypeAC, // Addressed Command
sl@0	552	ECmdTypeACS, // Addressed Command to a Selected card
sl@0	553	ECmdTypeADTCS, // Addressed Data Transfer Command to a Selected card
sl@0	554	ECmdTypeADC // Addressed Direct Command to a Selected card
sl@0	555	};
sl@0	556
sl@0	557	enum TMMCResponseTypeEnum
sl@0	558	{
sl@0	559	ERespTypeNone,
sl@0	560	ERespTypeUnknown,
sl@0	561	ERespTypeR1, // 32 bits Status
sl@0	562	ERespTypeR1B, // 32 bits Status with possible busy signal
sl@0	563	ERespTypeR2, // 128 bits CID or CSD register
sl@0	564	ERespTypeR3, // 32 bits OCR register
sl@0	565	ERespTypeR4, // 32 bits Fast I/O
sl@0	566	ERespTypeR5, // 32 bits IRQ
sl@0	567	ERespTypeR6,
sl@0	568	ERespTypeR7 // not currently defined for MMC
sl@0	569	};
sl@0	570
sl@0	571
sl@0	572	/**
sl@0	573	@publishedPartner
sl@0	574	@released
sl@0	575
sl@0	576	Defines the set of media types for a MultiMediaCard.
sl@0	577	*/
sl@0	578	enum TMMCMediaTypeEnum
sl@0	579	{
sl@0	580	/**
sl@0	581	A read only card.
sl@0	582	*/
sl@0	583	EMultiMediaROM,
sl@0	584
sl@0	585
sl@0	586	/**
sl@0	587	A writable card.
sl@0	588	*/
sl@0	589	EMultiMediaFlash,
sl@0	590
sl@0	591
sl@0	592	/**
sl@0	593	An I/O card.
sl@0	594	*/
sl@0	595	EMultiMediaIO,
sl@0	596
sl@0	597
sl@0	598	/**
sl@0	599	A card type that is neither read only, writable nor I/O.
sl@0	600	*/
sl@0	601	EMultiMediaOther,
sl@0	602
sl@0	603
sl@0	604	/**
sl@0	605	A card type that is not supported.
sl@0	606	*/
sl@0	607	EMultiMediaNotSupported
sl@0	608	};
sl@0	609
sl@0	610	enum TMMCSessionTypeEnum
sl@0	611	{
sl@0	612	ECIMNakedSession =0,
sl@0	613	ECIMUpdateAcq =1,
sl@0	614	ECIMInitStack =2,
sl@0	615	ECIMCheckStack =3,
sl@0	616	ECIMSetupCard =4,
sl@0	617	ECIMReadBlock =5,
sl@0	618	ECIMWriteBlock =6,
sl@0	619	ECIMReadMBlock =7,
sl@0	620	ECIMWriteMBlock =8,
sl@0	621	ECIMEraseSector =9,
sl@0	622	ECIMEraseGroup =10,
sl@0	623	ECIMReadIO =11,
sl@0	624	ECIMWriteIO =12,
sl@0	625	ECIMLockUnlock =13,
sl@0	626	ECIMLockStack =14,
sl@0	627	ECIMInitStackAfterUnlock =15,
sl@0	628	ECIMAutoUnlock =16,
sl@0	629	ECIMSleep =17
sl@0	630	};
sl@0	631
sl@0	632	const TUint KMMCMaxSessionTypeNumber = 18;
sl@0	633	const TUint KMMCMinCustomSession = 1024;
sl@0	634
sl@0	635	const TUint KMMCCmdDirDirBitPosition= KBit0; //fixed - dont change it
sl@0	636	const TUint KMMCCmdDirIndBitPosition= (KBit5-KBit0); //fixed - dont change it
sl@0	637	const TUint KMMCCmdDirWBitArgument= KBit5;
sl@0	638	const TUint KMMCCmdDirNegate= KBit6;
sl@0	639	const TUint KMMCCmdDirWBitDirect= KBit7;
sl@0	640
sl@0	641	const TUint KMMCCmdReliableWrite = KBit31;
sl@0	642
sl@0	643
sl@0	644	/**
sl@0	645	@publishedPartner
sl@0	646	@released
sl@0	647
sl@0	648	An enum whose values specify the data transfer direction.
sl@0	649
sl@0	650	@see TMMCCommandSpec
sl@0	651	*/
sl@0	652	enum TMMCCmdDirEnum
sl@0	653	{
sl@0	654	EDirNone = 0,
sl@0	655	EDirRead = KMMCCmdDirWBitDirect,
sl@0	656	EDirWrite = KMMCCmdDirWBitDirect\|KMMCCmdDirDirBitPosition,
sl@0	657	EDirWBit0 = KMMCCmdDirWBitArgument + 0,
sl@0	658	EDirRBit0 = (KMMCCmdDirWBitArgument\|KMMCCmdDirNegate) + 0
sl@0	659	};
sl@0	660
sl@0	661
sl@0	662
sl@0	663
sl@0	664	/**
sl@0	665	@publishedPartner
sl@0	666	@released
sl@0	667
sl@0	668	An enum whose values specify the width of the data bus
sl@0	669
sl@0	670	This enum is used by the DMMCStack::SetBusWidth() and TMMCMachineInfo.iMaxBusWidth.
sl@0	671	*/
sl@0	672	enum TBusWidth
sl@0	673	{
sl@0	674	EBusWidth1 = 0x00,
sl@0	675	EBusWidth4 = 0x02,
sl@0	676	EBusWidth8 = 0x03,
sl@0	677	EBusWidthInvalid = KMaxTUint32
sl@0	678	};
sl@0	679
sl@0	680	/**
sl@0	681	@publishedPartner
sl@0	682	@released
sl@0	683	*/
sl@0	684	const TUint8 KMMCLockUnlockErase = KBit3; // In first byte of CMD42 data block
sl@0	685
sl@0	686	/**
sl@0	687	@publishedPartner
sl@0	688	@released
sl@0	689	*/
sl@0	690	const TUint8 KMMCLockUnlockLockUnlock = KBit2;
sl@0	691
sl@0	692	/**
sl@0	693	@publishedPartner
sl@0	694	@released
sl@0	695	*/
sl@0	696	const TUint8 KMMCLockUnlockClrPwd = KBit1;
sl@0	697
sl@0	698	/**
sl@0	699	@publishedPartner
sl@0	700	@released
sl@0	701	*/
sl@0	702	const TUint8 KMMCLockUnlockSetPwd = KBit0;
sl@0	703
sl@0	704
sl@0	705
sl@0	706
sl@0	707	/**
sl@0	708	@publishedPartner
sl@0	709	@released
sl@0	710
sl@0	711	A utility class that contains convenience functions to handle conversion
sl@0	712	to and from big-endian format.
sl@0	713	*/
sl@0	714	class TMMC
sl@0	715	{
sl@0	716	public:
sl@0	717	static inline TUint32 BigEndian32(const TUint8*);
sl@0	718	static inline void BigEndian4Bytes(TUint8* aPtr, TUint32 aVal);
sl@0	719	};
sl@0	720
sl@0	721
sl@0	722	// Generic MMC layer constants
sl@0	723
sl@0	724	const TInt KMaxMMCStacks=1; // Number of separate MMC buses
sl@0	725	const TUint KMaxMMCardsPerStack=4; // Limits the number of cards in each stack
sl@0	726
sl@0	727	const TUint KBroadcastToAllCards=0xFFFFFFFF;
sl@0	728
sl@0	729	// MMC Spec related constants
sl@0	730
sl@0	731	const TUint KMMCMaxResponseLength=16; // in bytes
sl@0	732	const TUint KMMCCIDLength=16;
sl@0	733	const TUint KMMCCSDLength=16;
sl@0	734	const TUint KMMCExtendedCSDLength=512;
sl@0	735	const TUint KMMCBusClockFOD=400; // Identification clock in kiloherz
sl@0	736	const TUint KMMCCommandMask = 63; // Size of TMMCCommandEnum enumerator
sl@0	737
sl@0	738	// Command Classes Bit Set
sl@0	739
sl@0	740	/**
sl@0	741	@publishedPartner
sl@0	742	@released
sl@0	743	*/
sl@0	744	const TUint32 KMMCCmdClassNone= 0;
sl@0	745
sl@0	746	/**
sl@0	747	@publishedPartner
sl@0	748	@released
sl@0	749	*/
sl@0	750	const TUint32 KMMCCmdClassBasic= KBit0;
sl@0	751
sl@0	752	/**
sl@0	753	@publishedPartner
sl@0	754	@released
sl@0	755	*/
sl@0	756	const TUint32 KMMCCmdClassStreamRead= KBit1;
sl@0	757
sl@0	758	/**
sl@0	759	@publishedPartner
sl@0	760	@released
sl@0	761	*/
sl@0	762	const TUint32 KMMCCmdClassBlockRead= KBit2;
sl@0	763
sl@0	764	/**
sl@0	765	@publishedPartner
sl@0	766	@released
sl@0	767	*/
sl@0	768	const TUint32 KMMCCmdClassStreamWrite= KBit3;
sl@0	769
sl@0	770	/**
sl@0	771	@publishedPartner
sl@0	772	@released
sl@0	773	*/
sl@0	774	const TUint32 KMMCCmdClassBlockWrite= KBit4;
sl@0	775
sl@0	776	/**
sl@0	777	@publishedPartner
sl@0	778	@released
sl@0	779	*/
sl@0	780	const TUint32 KMMCCmdClassErase= KBit5;
sl@0	781
sl@0	782	/**
sl@0	783	@publishedPartner
sl@0	784	@released
sl@0	785	*/
sl@0	786	const TUint32 KMMCCmdClassWriteProtection=KBit6;
sl@0	787
sl@0	788	/**
sl@0	789	@publishedPartner
sl@0	790	@released
sl@0	791	*/
sl@0	792	const TUint32 KMMCCmdClassLockCard= KBit7;
sl@0	793
sl@0	794	/**
sl@0	795	@publishedPartner
sl@0	796	@released
sl@0	797	*/
sl@0	798	const TUint32 KMMCCmdClassApplication= KBit8;
sl@0	799
sl@0	800	/**
sl@0	801	@publishedPartner
sl@0	802	@released
sl@0	803	*/
sl@0	804	const TUint32 KMMCCmdClassIOMode= KBit9;
sl@0	805
sl@0	806	/**
sl@0	807	@publishedPartner
sl@0	808	@released
sl@0	809	*/
sl@0	810	const TUint32 KMMCCmdClassReserved10= KBit10;
sl@0	811	const TUint32 KMMCCmdClassSwitch= KBit10;
sl@0	812
sl@0	813	/**
sl@0	814	@publishedPartner
sl@0	815	@released
sl@0	816	*/
sl@0	817	const TUint32 KMMCCmdClassReserved11= KBit11;
sl@0	818
sl@0	819	// Specific MMC implementation constants
sl@0	820
sl@0	821	const TUint KMaxMMCMachineStackDepth=20; // TMMCStateMachine stack depth
sl@0	822	const TUint KMaxMMCCommandStackDepth=9; // Session TMMCCommandDesc stack depth
sl@0	823	const TUint KMMCIdleCommandsAtRestart=2; // Number of CMD0s to be issued at initialisation
sl@0	824	const TUint KMMCMaxJobsInStackWorkSet=8; // Number of sessions simultaneously served
sl@0	825	const TUint KMMCPollGapInMilliseconds=40;
sl@0	826	const TUint KMMCMaxPollAttempts=5; // 40*5 = 200ms
sl@0	827	const TUint KMMCRetryGapInMilliseconds=10;
sl@0	828	const TUint KMMCMaxTimeOutRetries=1;
sl@0	829	const TUint KMMCMaxCRCRetries=1;
sl@0	830	const TUint16 KMMCMaxUnlockRetries=4;
sl@0	831	const TUint16 KMMCMaxAutoUnlockRetries=25;
sl@0	832	const TUint KMMCMaxGlobalRetries=1;
sl@0	833	const TUint16 KMMCSpecOpCondBusyTimeout=100 ; //MMC/SD Standard OCR timeout 1 second
sl@0	834	const TUint16 KMMCMaxOpCondBusyTimeout=150; // 10*150 = 1500ms
sl@0	835	const TUint KMMCLowVoltagePowerUpTimeoutInMilliseconds=2; // 1ms + 74 400KHz clock cycles
sl@0	836	const TUint KMMCUnlockRetryGapInMilliseconds = 200; // Unlock retry gap
sl@0	837
sl@0	838	// DMMCStack Modes Bit Set
sl@0	839	const TUint32 KMMCModeEnableClientConfig = KBit0; // Merge with session iConfig
sl@0	840	const TUint32 KMMCModeEnableTimeOutRetry = KBit1; // Auto retry on response time-outs
sl@0	841	const TUint32 KMMCModeTimeOutRetryGap = KBit2; // Force timer delay between retries
sl@0	842	const TUint32 KMMCModeEnableCRCRetry = KBit3; // Command or response CRC errors
sl@0	843	const TUint32 KMMCModeCRCRetryGap = KBit4;
sl@0	844	const TUint32 KMMCModeDataCRCRetry = KBit5; // Repeat data transaction from the last valid position
sl@0	845	const TUint32 KMMCModeEnableUnlockRetry = KBit6; // Resend CMD42 for unreliable cards
sl@0	846	const TUint32 KMMCModeEnablePreemption = KBit7; // Allow sessions to share the MMC bus
sl@0	847	const TUint32 KMMCModePreemptOnBusy = KBit8; // Release bus control if busy
sl@0	848	const TUint32 KMMCModePreemptOnRetry = KBit9; // Release bus control before timeout/crc retries
sl@0	849	const TUint32 KMMCModePreemptInGaps = KBit10; // Preempt whenever gap timer is invoked
sl@0	850	const TUint32 KMMCModeEnqueIfLocked = KBit11; // Enque session if DMMCStack is locked
sl@0	851	const TUint32 KMMCModeCardControlled = KBit12; // Use Session CardP to get RCAs etc.
sl@0	852	const TUint32 KMMCModeCompleteInStackDFC = KBit13; // Run DMMCStack in DFC when completing
sl@0	853	const TUint32 KMMCModeEnableBusyPoll = KBit14; // Enables mechanism recovering from busy timeouts
sl@0	854	const TUint32 KMMCModeBusyPollGap = KBit15;
sl@0	855	const TUint32 KMMCModeEnableRetries = KBit16; // This mode removed disables all retries/polls
sl@0	856	const TUint32 KMMCModeMask = KBit17 - KBit0;
sl@0	857
sl@0	858	// The following modes are effective for MasterConfig only
sl@0	859	const TUint32 KMMCModeClientPollAttempts = KBit20;
sl@0	860	const TUint32 KMMCModeClientTimeOutRetries = KBit21;
sl@0	861	const TUint32 KMMCModeClientCRCRetries = KBit22;
sl@0	862	const TUint32 KMMCModeClientUnlockRetries = KBit23;
sl@0	863	const TUint32 KMMCModeClientBusClock = KBit24;
sl@0	864	const TUint32 KMMCModeClientClockIn = KBit25;
sl@0	865	const TUint32 KMMCModeClientClockOut = KBit26;
sl@0	866	const TUint32 KMMCModeClientResponseTimeOut = KBit27;
sl@0	867	const TUint32 KMMCModeClientDataTimeOut = KBit28;
sl@0	868	const TUint32 KMMCModeClientBusyTimeOut = KBit29;
sl@0	869	const TUint32 KMMCModeClientiOpCondBusyTimeout = KBit30;
sl@0	870	const TUint32 KMMCModeClientMask = KBit31 - KBit20;
sl@0	871
sl@0	872	// The following modes cannot be enabled by a client if disabled in MasterConfig
sl@0	873	const TUint32 KMMCModeMasterOverrides=
sl@0	874	KMMCModeEnableClientConfig \|
sl@0	875	KMMCModeEnablePreemption \|
sl@0	876	KMMCModeEnqueIfLocked \|
sl@0	877	KMMCModeClientMask;
sl@0	878
sl@0	879	// The following modes are always effective, even if the ClientConfig is disabled
sl@0	880	const TUint32 KMMCModeClientOverrides=
sl@0	881	KMMCModeEnableClientConfig \|
sl@0	882	KMMCModeCardControlled;
sl@0	883
sl@0	884
sl@0	885	// The default MasterConfig modes
sl@0	886	const TUint32 KMMCModeDefault= KMMCModeEnableClientConfig \|
sl@0	887	KMMCModeEnableRetries \|
sl@0	888	KMMCModeEnableTimeOutRetry \|
sl@0	889	KMMCModeTimeOutRetryGap \|
sl@0	890	KMMCModeEnableCRCRetry \|
sl@0	891	KMMCModeCRCRetryGap \|
sl@0	892	KMMCModeDataCRCRetry \|
sl@0	893	KMMCModeEnableUnlockRetry \|
sl@0	894	KMMCModeEnablePreemption \|
sl@0	895	KMMCModePreemptInGaps \|
sl@0	896	KMMCModeEnqueIfLocked \|
sl@0	897	KMMCModeCardControlled \|
sl@0	898	KMMCModeClientMask;
sl@0	899
sl@0	900
sl@0	901	// MMC Error Code Bit Set
sl@0	902
sl@0	903	/**
sl@0	904	@publishedPartner
sl@0	905	@released
sl@0	906
sl@0	907	A MultiMediaCard error code.
sl@0	908
sl@0	909	Indicates no error.
sl@0	910
sl@0	911	@see TMMCErr
sl@0	912	*/
sl@0	913	const TUint32 KMMCErrNone=0;
sl@0	914
sl@0	915
sl@0	916	/**
sl@0	917	@publishedPartner
sl@0	918	@released
sl@0	919
sl@0	920	A MultiMediaCard error code.
sl@0	921
sl@0	922	Timed out waiting for a response from the card after issuing a command.
sl@0	923
sl@0	924	@see TMMCErr
sl@0	925	*/
sl@0	926	const TUint32 KMMCErrResponseTimeOut=KBit0;
sl@0	927
sl@0	928
sl@0	929	/**
sl@0	930	@publishedPartner
sl@0	931	@released
sl@0	932
sl@0	933	A MultiMediaCard error code.
sl@0	934
sl@0	935	Timed out waiting for a data block to be received during a data read command.
sl@0	936
sl@0	937	@see TMMCErr
sl@0	938	*/
sl@0	939	const TUint32 KMMCErrDataTimeOut= KBit1;
sl@0	940
sl@0	941
sl@0	942	/**
sl@0	943	@publishedPartner
sl@0	944	@released
sl@0	945
sl@0	946	A MultiMediaCard error code.
sl@0	947
sl@0	948	Timed out waiting for a data block to be requested during a data write command.
sl@0	949
sl@0	950	@see TMMCErr
sl@0	951	*/
sl@0	952	const TUint32 KMMCErrBusyTimeOut= KBit2;
sl@0	953
sl@0	954
sl@0	955	/**
sl@0	956	@publishedPartner
sl@0	957	@released
sl@0	958
sl@0	959	A MultiMediaCard error code.
sl@0	960
sl@0	961	Timed out during the CIM_UPDATE_ACQ macro waiting for a card to power up.
sl@0	962	Cards that are still powering up return busy in response to a SEND_OP_COND command.
sl@0	963
sl@0	964	@see TMMCErr
sl@0	965	*/
sl@0	966	const TUint32 KMMCErrBusTimeOut= KBit3;
sl@0	967
sl@0	968
sl@0	969	/**
sl@0	970	@publishedPartner
sl@0	971	@released
sl@0	972
sl@0	973	A MultiMediaCard error code.
sl@0	974
sl@0	975	The host has detected more cards in a stack that it can handle, or it has
sl@0	976	detected more cards than it was expecting, for example, more cards than physical slots.
sl@0	977
sl@0	978	@see TMMCErr
sl@0	979	*/
sl@0	980	const TUint32 KMMCErrTooManyCards= KBit4;
sl@0	981
sl@0	982
sl@0	983	/**
sl@0	984	@publishedPartner
sl@0	985	@released
sl@0	986
sl@0	987	A MultiMediaCard error code.
sl@0	988
sl@0	989	The host has detected a CRC error in a response received from a card.
sl@0	990
sl@0	991	@see TMMCErr
sl@0	992	*/
sl@0	993	const TUint32 KMMCErrResponseCRC= KBit5;
sl@0	994
sl@0	995
sl@0	996	/**
sl@0	997	@publishedPartner
sl@0	998	@released
sl@0	999
sl@0	1000	A MultiMediaCard error code.
sl@0	1001
sl@0	1002	The host has detected a CRC error in a data block received from a card.
sl@0	1003
sl@0	1004	@see TMMCErr
sl@0	1005	*/
sl@0	1006	const TUint32 KMMCErrDataCRC= KBit6;
sl@0	1007
sl@0	1008
sl@0	1009	/**
sl@0	1010	@publishedPartner
sl@0	1011	@released
sl@0	1012
sl@0	1013	A MultiMediaCard error code.
sl@0	1014
sl@0	1015	The card has detected a CRC error in a command received from the host.
sl@0	1016
sl@0	1017	@see TMMCErr
sl@0	1018	*/
sl@0	1019	const TUint32 KMMCErrCommandCRC= KBit7;
sl@0	1020
sl@0	1021
sl@0	1022	/**
sl@0	1023	@publishedPartner
sl@0	1024	@released
sl@0	1025
sl@0	1026	A MultiMediaCard error code.
sl@0	1027
sl@0	1028	An R1 response was received from the card with one or more of the error flags
sl@0	1029	set in the card status field.
sl@0	1030
sl@0	1031	@see TMMCErr
sl@0	1032	*/
sl@0	1033	const TUint32 KMMCErrStatus= KBit8;
sl@0	1034
sl@0	1035
sl@0	1036	/**
sl@0	1037	@publishedPartner
sl@0	1038	@released
sl@0	1039
sl@0	1040	A MultiMediaCard error code.
sl@0	1041
sl@0	1042	A session was submitted without first being set-up with a card object,
sl@0	1043	or was set-up with a card object that is no longer present.
sl@0	1044
sl@0	1045	@see TMMCErr
sl@0	1046	*/
sl@0	1047	const TUint32 KMMCErrNoCard= KBit9;
sl@0	1048
sl@0	1049
sl@0	1050	/**
sl@0	1051	@publishedPartner
sl@0	1052	@released
sl@0	1053
sl@0	1054	A MultiMediaCard error code.
sl@0	1055
sl@0	1056	The session had the stack locked but the MultiMediaCard controller had
sl@0	1057	to override the lock to perform some other bus activity.
sl@0	1058
sl@0	1059	@see TMMCErr
sl@0	1060	*/
sl@0	1061	const TUint32 KMMCErrBrokenLock= KBit10;
sl@0	1062
sl@0	1063
sl@0	1064	/**
sl@0	1065	@publishedPartner
sl@0	1066	@released
sl@0	1067
sl@0	1068	A MultiMediaCard error code.
sl@0	1069
sl@0	1070	The card was powered down.
sl@0	1071
sl@0	1072	@see TMMCErr
sl@0	1073	*/
sl@0	1074	const TUint32 KMMCErrPowerDown= KBit11;
sl@0	1075
sl@0	1076
sl@0	1077	/**
sl@0	1078	@publishedPartner
sl@0	1079	@released
sl@0	1080
sl@0	1081	A MultiMediaCard error code.
sl@0	1082
sl@0	1083	The session was stopped.
sl@0	1084
sl@0	1085	@see TMMCErr
sl@0	1086	*/
sl@0	1087	const TUint32 KMMCErrAbort= KBit12;
sl@0	1088
sl@0	1089
sl@0	1090	/**
sl@0	1091	@publishedPartner
sl@0	1092	@released
sl@0	1093
sl@0	1094	A MultiMediaCard error code.
sl@0	1095
sl@0	1096	The stack has not yet been initialised.
sl@0	1097
sl@0	1098	@see TMMCErr
sl@0	1099	*/
sl@0	1100	const TUint32 KMMCErrStackNotReady= KBit13;
sl@0	1101
sl@0	1102
sl@0	1103	/**
sl@0	1104	@publishedPartner
sl@0	1105	@released
sl@0	1106
sl@0	1107	A MultiMediaCard error code.
sl@0	1108
sl@0	1109	The session requested a service or feature that is not supported.
sl@0	1110
sl@0	1111	@see TMMCErr
sl@0	1112	*/
sl@0	1113	const TUint32 KMMCErrNotSupported= KBit14;
sl@0	1114
sl@0	1115
sl@0	1116	/**
sl@0	1117	@publishedPartner
sl@0	1118	@released
sl@0	1119
sl@0	1120	A MultiMediaCard error code.
sl@0	1121
sl@0	1122	Indicates a general hardware related error.
sl@0	1123
sl@0	1124	@see TMMCErr
sl@0	1125	*/
sl@0	1126	const TUint32 KMMCErrHardware= KBit15;
sl@0	1127
sl@0	1128
sl@0	1129	/**
sl@0	1130	@publishedPartner
sl@0	1131	@released
sl@0	1132
sl@0	1133	A MultiMediaCard error code.
sl@0	1134
sl@0	1135	An unexpected or inconsistent bus state has been detected.
sl@0	1136
sl@0	1137	@see TMMCErr
sl@0	1138	*/
sl@0	1139	const TUint32 KMMCErrBusInconsistent=KBit16;
sl@0	1140
sl@0	1141
sl@0	1142
sl@0	1143
sl@0	1144	// SM control error codes
sl@0	1145
sl@0	1146	/**
sl@0	1147	@publishedPartner
sl@0	1148	@released
sl@0	1149
sl@0	1150	A MultiMediaCard error code.
sl@0	1151
sl@0	1152	This is used interally by the MultiMediaCard controller.
sl@0	1153
sl@0	1154	@see TMMCErr
sl@0	1155	*/
sl@0	1156	const TUint32 KMMCErrBypass= KBit17;
sl@0	1157
sl@0	1158
sl@0	1159	/**
sl@0	1160	@publishedPartner
sl@0	1161	@released
sl@0	1162
sl@0	1163	A MultiMediaCard error code.
sl@0	1164
sl@0	1165	This is used internally by the MultiMediaCard controller in the process
sl@0	1166	of re-initialising a card to recover from an inconsistent bus state.
sl@0	1167
sl@0	1168	@see TMMCErr
sl@0	1169	*/
sl@0	1170	const TUint32 KMMCErrInitContext= KBit18;
sl@0	1171
sl@0	1172
sl@0	1173	/**
sl@0	1174	@publishedPartner
sl@0	1175	@released
sl@0	1176
sl@0	1177	A MultiMediaCard error code.
sl@0	1178
sl@0	1179	Indicates a bad argument.
sl@0	1180
sl@0	1181	@see TMMCErr
sl@0	1182	*/
sl@0	1183	const TUint32 KMMCErrArgument= KBit19;
sl@0	1184
sl@0	1185
sl@0	1186	/**
sl@0	1187	@publishedPartner
sl@0	1188	@released
sl@0	1189
sl@0	1190	A MultiMediaCard error code.
sl@0	1191
sl@0	1192	A multiple block operation was requested, but the length specified was
sl@0	1193	less than that of a block.
sl@0	1194
sl@0	1195	@see TMMCErr
sl@0	1196	*/
sl@0	1197	const TUint32 KMMCErrSingleBlock= KBit20;
sl@0	1198
sl@0	1199
sl@0	1200
sl@0	1201	/**
sl@0	1202	@internalComponent
sl@0	1203	*/
sl@0	1204	const TUint32 KMMCErrUpdPswd= KBit21;
sl@0	1205
sl@0	1206
sl@0	1207
sl@0	1208
sl@0	1209	// General error codes
sl@0	1210
sl@0	1211	/**
sl@0	1212	@publishedPartner
sl@0	1213	@released
sl@0	1214
sl@0	1215	A MultiMediaCard error code.
sl@0	1216
sl@0	1217	The card is locked.
sl@0	1218
sl@0	1219	@see TMMCErr
sl@0	1220	*/
sl@0	1221	const TUint32 KMMCErrLocked= KBit22;
sl@0	1222
sl@0	1223
sl@0	1224	/**
sl@0	1225	@publishedPartner
sl@0	1226	@released
sl@0	1227
sl@0	1228	A MultiMediaCard error code.
sl@0	1229
sl@0	1230	Indicates a general 'not found' type error.
sl@0	1231
sl@0	1232	@see TMMCErr
sl@0	1233	*/
sl@0	1234	const TUint32 KMMCErrNotFound= KBit23;
sl@0	1235
sl@0	1236
sl@0	1237	/**
sl@0	1238	@publishedPartner
sl@0	1239	@released
sl@0	1240
sl@0	1241	An MultiMediaCard error code:
sl@0	1242
sl@0	1243	Indicates a general already 'exists type' error.
sl@0	1244
sl@0	1245	@see TMMCErr
sl@0	1246	*/
sl@0	1247	const TUint32 KMMCErrAlreadyExists= KBit24;
sl@0	1248
sl@0	1249
sl@0	1250	/**
sl@0	1251	@publishedPartner
sl@0	1252	@released
sl@0	1253
sl@0	1254	An MultiMediaCard error code:
sl@0	1255
sl@0	1256	Indicates an unspecified error.
sl@0	1257
sl@0	1258	@see TMMCErr
sl@0	1259	*/
sl@0	1260	const TUint32 KMMCErrGeneral= KBit25;
sl@0	1261
sl@0	1262
sl@0	1263	/**
sl@0	1264	@publishedPartner
sl@0	1265	@released
sl@0	1266
sl@0	1267	A bitmask of all MultiMediaCard error codes.
sl@0	1268	*/
sl@0	1269	const TUint32 KMMCErrAll = (KBit26 - KBit0);
sl@0	1270
sl@0	1271	/**
sl@0	1272	@publishedPartner
sl@0	1273	@released
sl@0	1274
sl@0	1275	A subset of MultiMediaCard error codes.
sl@0	1276	*/
sl@0	1277	const TUint32 KMMCErrBasic = (KMMCErrAll & ~(
sl@0	1278	KMMCErrBypass \|
sl@0	1279	KMMCErrUpdPswd \|
sl@0	1280	KMMCErrInitContext \|
sl@0	1281	KMMCErrArgument \|
sl@0	1282	KMMCErrSingleBlock \|
sl@0	1283	KMMCErrLocked \|
sl@0	1284	KMMCErrNotFound \|
sl@0	1285	KMMCErrAlreadyExists\|
sl@0	1286	KMMCErrGeneral));
sl@0	1287
sl@0	1288	// DMMC Stack and Session control bits
sl@0	1289
sl@0	1290	// Stack State bits
sl@0	1291	const TUint32 KMMCStackStateRunning= KBit0; // Stack scheduler active
sl@0	1292	const TUint32 KMMCStackStateWaitingToLock= KBit1; //
sl@0	1293	const TUint32 KMMCStackStateLocked= KBit2; //
sl@0	1294	const TUint32 KMMCStackStateWaitingDFC= KBit3;
sl@0	1295	const TUint32 KMMCStackStateInitInProgress= KBit4;
sl@0	1296	const TUint32 KMMCStackStateReScheduled= KBit5;
sl@0	1297	const TUint32 KMMCStackStateJobChooser= KBit6;
sl@0	1298	const TUint32 KMMCStackStateDoDeselect= KBit7;
sl@0	1299	const TUint32 KMMCStackStateBusInconsistent=KBit8;
sl@0	1300	const TUint32 KMMCStackStateInitPending= KBit9;
sl@0	1301	const TUint32 KMMCStackStateCardRemoved= KBit10;
sl@0	1302	const TUint32 KMMCStackStateSleepinProgress=KBit11;
sl@0	1303	const TUint32 KMMCStackStateSleep= KBit12;
sl@0	1304	const TUint32 KMMCStackStateYielding= KBit13;
sl@0	1305
sl@0	1306	// Session Blocking bits definition
sl@0	1307
sl@0	1308	/**
sl@0	1309	@publishedPartner
sl@0	1310	@released
sl@0	1311
sl@0	1312	A bit, which when set in a call to DMMCStack::BlockCurrentSession(), indicates
sl@0	1313	that the current session is to be blocked, awaiting an event that is to
sl@0	1314	be handled at the platform specific level.
sl@0	1315
sl@0	1316	For example, the session may be waiting for:
sl@0	1317
sl@0	1318	- a response following a command
sl@0	1319	- an interrupt indicating that data transfer is required
sl@0	1320	- a platform specific layer specific timer.
sl@0	1321
sl@0	1322	@see DMMCStack::BlockCurrentSession()
sl@0	1323	*/
sl@0	1324	const TUint32 KMMCBlockOnASSPFunction= KBit0;
sl@0	1325
sl@0	1326	const TUint32 KMMCBlockOnPollTimer = KBit1;
sl@0	1327	const TUint32 KMMCBlockOnRetryTimer = KBit2;
sl@0	1328	const TUint32 KMMCBlockOnNoRun = KBit3;
sl@0	1329	const TUint32 KMMCBlockOnDoor = KBit4;
sl@0	1330	const TUint32 KMMCBlockOnWaitToLock = KBit5;
sl@0	1331	const TUint32 KMMCBlockOnCardInUse = KBit6;
sl@0	1332	const TUint32 KMMCBlockOnPgmTimer = KBit7;
sl@0	1333	const TUint32 KMMCBlockOnInterrupt = KBit8;
sl@0	1334	const TUint32 KMMCBlockOnDataTransfer = KBit9;
sl@0	1335	const TUint32 KMMCBlockOnMoreData = KBit10;
sl@0	1336	const TUint32 KMMCBlockOnYielding = KBit11; // Yielding to other commands
sl@0	1337
sl@0	1338	const TUint32 KMMCBlockOnAsynchMask = KMMCBlockOnASSPFunction \|
sl@0	1339	KMMCBlockOnPollTimer \|
sl@0	1340	KMMCBlockOnRetryTimer \|
sl@0	1341	KMMCBlockOnPgmTimer \|
sl@0	1342	KMMCBlockOnInterrupt \|
sl@0	1343	KMMCBlockOnDataTransfer \|
sl@0	1344	KMMCBlockOnMoreData;
sl@0	1345
sl@0	1346	const TUint32 KMMCBlockOnGapTimersMask = KMMCBlockOnPollTimer \|
sl@0	1347	KMMCBlockOnRetryTimer \|
sl@0	1348	KMMCBlockOnPgmTimer;
sl@0	1349
sl@0	1350	// Session State bits definition
sl@0	1351	const TUint32 KMMCSessStateEngaged = KBit0; // Processed by DMMCStack
sl@0	1352	const TUint32 KMMCSessStateInProgress = KBit1; // No longer safe to restart
sl@0	1353	const TUint32 KMMCSessStateCritical = KBit2; // Re-initialise the stack if aborted
sl@0	1354	const TUint32 KMMCSessStateSafeInGaps = KBit3;
sl@0	1355	const TUint32 KMMCSessStateDoReSchedule= KBit4;
sl@0	1356
sl@0	1357	/**
sl@0	1358	@publishedPartner
sl@0	1359	@released
sl@0	1360
sl@0	1361	A bit that when set into DMMCSession::iState before calling
sl@0	1362	DMMCStack::UnBlockCurrentSession(), causes a DFC to be queued in order
sl@0	1363	to resume the state machine at some later stage.
sl@0	1364	*/
sl@0	1365	const TUint32 KMMCSessStateDoDFC = KBit5;
sl@0	1366	const TUint32 KMMCSessStateBlockOnDoor = KBit6;
sl@0	1367	const TUint32 KMMCSessStateCardIsGone = KBit7;
sl@0	1368	const TUint32 KMMCSessStateASSPEngaged = KBit8;
sl@0	1369	const TUint32 KMMCSessStateAllowDirectCommands = KBit9; // Allow Direct Commands (Using CMD) during Data Transfer
sl@0	1370
sl@0	1371	class TCID
sl@0	1372	/**
sl@0	1373	CID class
sl@0	1374
sl@0	1375	@publishedPartner
sl@0	1376	@released
sl@0	1377	*/
sl@0	1378	{
sl@0	1379	public:
sl@0	1380	inline TCID() {} // Default constructor
sl@0	1381	inline TCID(const TUint8*);
sl@0	1382	inline TCID& operator=(const TCID&);
sl@0	1383	inline TCID& operator=(const TUint8*);
sl@0	1384	inline TBool operator==(const TCID&) const;
sl@0	1385	inline TBool operator==(const TUint8*) const;
sl@0	1386	inline void Copy(TUint8*) const; // Copies big endian 16 bytes CID
sl@0	1387	inline TUint8 At(TUint anIndex) const; // Byte from CID at anIndex
sl@0	1388	private:
sl@0	1389	TUint8 iData[KMMCCIDLength]; // Big endian 128 bit bitfield representing CID
sl@0	1390	};
sl@0	1391
sl@0	1392
sl@0	1393	class TCSD
sl@0	1394	/**
sl@0	1395	CSD class
sl@0	1396
sl@0	1397	@publishedPartner
sl@0	1398	@released
sl@0	1399	*/
sl@0	1400	{
sl@0	1401	public:
sl@0	1402	inline TCSD() {memclr(this, sizeof(*this));} // Default constructor
sl@0	1403	inline TCSD(const TUint8*);
sl@0	1404	inline TCSD& operator=(const TCSD&);
sl@0	1405	inline TCSD& operator=(const TUint8*);
sl@0	1406	inline void Copy(TUint8*) const; // Copies big endian 16 bytes CSD
sl@0	1407	inline TUint8 At(TUint anIndex) const; // Byte from CSD at anIndex
sl@0	1408	public:
sl@0	1409	inline TUint CSDStructure() const;
sl@0	1410	inline TUint SpecVers() const;
sl@0	1411	inline TUint Reserved120() const;
sl@0	1412	inline TUint TAAC() const;
sl@0	1413	inline TUint NSAC() const;
sl@0	1414	inline TUint TranSpeed() const;
sl@0	1415	inline TUint CCC() const;
sl@0	1416	inline TUint ReadBlLen() const;
sl@0	1417	inline TBool ReadBlPartial() const;
sl@0	1418	inline TBool WriteBlkMisalign() const;
sl@0	1419	inline TBool ReadBlkMisalign() const;
sl@0	1420	inline TBool DSRImp() const;
sl@0	1421	inline TUint Reserved74() const;
sl@0	1422	inline TUint CSize() const;
sl@0	1423	inline TUint VDDRCurrMin() const;
sl@0	1424	inline TUint VDDRCurrMax() const;
sl@0	1425	inline TUint VDDWCurrMin() const;
sl@0	1426	inline TUint VDDWCurrMax() const;
sl@0	1427	inline TUint CSizeMult() const;
sl@0	1428	inline TUint EraseGrpSize() const;
sl@0	1429	inline TUint EraseGrpMult() const;
sl@0	1430	inline TUint WPGrpSize() const;
sl@0	1431	inline TBool WPGrpEnable() const;
sl@0	1432	inline TUint DefaultECC() const;
sl@0	1433	inline TUint R2WFactor() const;
sl@0	1434	inline TUint WriteBlLen() const;
sl@0	1435	inline TBool WriteBlPartial() const;
sl@0	1436	inline TUint Reserved16() const;
sl@0	1437	inline TBool FileFormatGrp() const;
sl@0	1438	inline TBool Copy() const;
sl@0	1439	inline TBool PermWriteProtect() const;
sl@0	1440	inline TBool TmpWriteProtect() const;
sl@0	1441	inline TUint FileFormat() const;
sl@0	1442	inline TUint ECC() const;
sl@0	1443	inline TUint CRC() const;
sl@0	1444	public:
sl@0	1445	IMPORT_C TUint DeviceSize() const; // Uses functions above to calculate device capacity
sl@0	1446	IMPORT_C TMMCMediaTypeEnum MediaType() const;
sl@0	1447	IMPORT_C TUint ReadBlockLength() const; // Read Block Length in bytes
sl@0	1448	IMPORT_C TUint WriteBlockLength() const;// Write Block Length in bytes
sl@0	1449	IMPORT_C TUint EraseSectorSize() const; // Erase sector size (default 512 bytes)
sl@0	1450	IMPORT_C TUint EraseGroupSize() const; // Erase group size (default 16*<sector size> bytes)
sl@0	1451	IMPORT_C TUint MinReadCurrentInMilliamps() const;
sl@0	1452	IMPORT_C TUint MinWriteCurrentInMilliamps() const;
sl@0	1453	IMPORT_C TUint MaxReadCurrentInMilliamps() const;
sl@0	1454	IMPORT_C TUint MaxWriteCurrentInMilliamps() const;
sl@0	1455	IMPORT_C TUint MaxTranSpeedInKilohertz() const;
sl@0	1456	public:
sl@0	1457	IMPORT_C TUint CSDField(const TUint& aTopBit, const TUint& aBottomBit) const; /*< @internalComponent /
sl@0	1458	TUint8 iData[KMMCCSDLength]; /*< @internalComponent / // Big endian 128 bit bitfield representing CSD
sl@0	1459	};
sl@0	1460
sl@0	1461
sl@0	1462	class TExtendedCSD
sl@0	1463	/**
sl@0	1464	Extended CSD register class.
sl@0	1465	For more information about this register, see the MultimediaCard System
sl@0	1466	Specification, Version 4.1+
sl@0	1467
sl@0	1468	@publishedPartner
sl@0	1469	@released
sl@0	1470	*/
sl@0	1471	{
sl@0	1472	public:
sl@0	1473	/**
sl@0	1474	An enum used by TExtendedCSD::GetWriteArg() to construct a TMMCArgument object.
sl@0	1475	The value chosen defines how the register or command set is to be modified.
sl@0	1476	*/
sl@0	1477	enum TExtCSDAccessBits
sl@0	1478	{
sl@0	1479	/** Change the card's command set */
sl@0	1480	ECmdSet,
sl@0	1481	/** Set the specified bits */
sl@0	1482	ESetBits,
sl@0	1483	/** Clear the specified bits */
sl@0	1484	EClearBits,
sl@0	1485	/** Write the specified byte */
sl@0	1486	EWriteByte
sl@0	1487	};
sl@0	1488	/**
sl@0	1489	This enum defines various field offsets into the Modes Segment (i.e.
sl@0	1490	the writable part) of the Extended CSD register.
sl@0	1491	*/
sl@0	1492	enum TExtCSDModesFieldIndex
sl@0	1493	{
sl@0	1494	/** Offset of the CMD_SET field */
sl@0	1495	ECmdSetIndex = 191,
sl@0	1496	/** Offset of the CMD_SET_REV field */
sl@0	1497	ECmdSetRevIndex = 189,
sl@0	1498	/** Offset of the POWER_CLASS field */
sl@0	1499	EPowerClassIndex = 187,
sl@0	1500	/** Offset of the HS_TIMING field */
sl@0	1501	EHighSpeedInterfaceTimingIndex = 185,
sl@0	1502	/** Offset of the BUS_WIDTH field */
sl@0	1503	EBusWidthModeIndex = 183,
sl@0	1504	/** Offset of the BOOT_CONFIG field */
sl@0	1505	EBootConfigIndex = 179,
sl@0	1506	/** Offset of the BOOT_BUS_WIDTH field */
sl@0	1507	EBootBusWidthIndex = 177,
sl@0	1508	/** Offset of the ERASE_GROUP_DEF field */
sl@0	1509	EEraseGroupDefIndex = 175
sl@0	1510	};
sl@0	1511
sl@0	1512	/**
sl@0	1513	This enum defines various field offsets into the Properties Segment (i.e.
sl@0	1514	the read-only part) of the Extended CSD register.
sl@0	1515	*/
sl@0	1516	enum TExtCSDPropertiesFieldIndex
sl@0	1517	{
sl@0	1518	/** Offset of the EXT_CSD_REV field */
sl@0	1519	EExtendedCSDRevIndex = 192,
sl@0	1520	/** Offset of the CARD_TYPE field */
sl@0	1521	ECardTypeIndex = 196,
sl@0	1522	/** Offset of the ACC_SIZE field */
sl@0	1523	EAccessSizeIndex = 225,
sl@0	1524	/** Offset of the HC_ERASE_GRP_SIZE field */
sl@0	1525	EHighCapacityEraseGroupSizeIndex = 224
sl@0	1526	};
sl@0	1527
sl@0	1528	/** This enum defines the bus width encoding used by the BUS_WIDTH field */
sl@0	1529	enum TExtCSDBusWidths
sl@0	1530	{
sl@0	1531	EExtCsdBusWidth1 = 0x00,
sl@0	1532	EExtCsdBusWidth4 = 0x01,
sl@0	1533	EExtCsdBusWidth8 = 0x02
sl@0	1534	};
sl@0	1535
sl@0	1536	/**
sl@0	1537	This enum defines the different MMCV4.x card types available as defined
sl@0	1538	in the CARD_TYPE field
sl@0	1539	*/
sl@0	1540	enum TCardTypes
sl@0	1541	{
sl@0	1542	EHighSpeedCard26Mhz = 0x01,
sl@0	1543	EHighSpeedCard52Mhz = 0x02
sl@0	1544	};
sl@0	1545
sl@0	1546	/**
sl@0	1547	This enum defines the boot config encoding used by the BOOT_CONFIG field
sl@0	1548	*/
sl@0	1549	enum TExtCSDBootConfig
sl@0	1550	{
sl@0	1551	ESelectUserArea = 0x00,
sl@0	1552	ESelectBootPartition1 = 0x01,
sl@0	1553	ESelectBootPartition2 = 0x02,
sl@0	1554	EEnableBootPartition1forBoot = 0x08,
sl@0	1555	EEnableBootPartition2forBoot = 0x10,
sl@0	1556	EEnableUserAreaforBoot = 0x38,
sl@0	1557	EEnableBootAck = 0x40
sl@0	1558	};
sl@0	1559
sl@0	1560	/**
sl@0	1561	This enum defines the Boot Bus Width encoding used by the BOOT_BUS_WIDTH field
sl@0	1562	*/
sl@0	1563	enum TExtCSDBootBusWidth
sl@0	1564	{
sl@0	1565	EBootBusWidth1Bit = 0x00,
sl@0	1566	EBootBusWidth4Bit = 0x01,
sl@0	1567	EBootBusWidth8Bit = 0x02,
sl@0	1568	EResetBusWidthafterBoot = 0x08
sl@0	1569	};
sl@0	1570
sl@0	1571	/**
sl@0	1572	This enum defines the Erase Group Definition encoding
sl@0	1573	used by the ERASE_GROUP_DEF field
sl@0	1574	*/
sl@0	1575	enum TExtCSDEraseGroupDef
sl@0	1576	{
sl@0	1577
sl@0	1578	EEraseGrpDefEnableOldSizes = 0x00,
sl@0	1579	EEraseGrpDefEnableHighCapSizes = 0x01
sl@0	1580	};
sl@0	1581
sl@0	1582	public:
sl@0	1583	/** Default constructor */
sl@0	1584	inline TExtendedCSD();
sl@0	1585	/**
sl@0	1586	Constructor
sl@0	1587	@param aPtr a byte buffer containing the contents of the register
sl@0	1588	*/
sl@0	1589	inline TExtendedCSD(const TUint8* aPtr);
sl@0	1590	/**
sl@0	1591	Copy constructor
sl@0	1592	@param aCSD a reference to another instance of the same class
sl@0	1593	*/
sl@0	1594	inline TExtendedCSD& operator=(const TExtendedCSD& aCSD);
sl@0	1595	/**
sl@0	1596	Copy constructor
sl@0	1597	@param aPtr a byte buffer containing the contents of the register
sl@0	1598	*/
sl@0	1599	inline TExtendedCSD& operator=(const TUint8* aPtr);
sl@0	1600
sl@0	1601	/** Returns the byte at a particular offset into the register
sl@0	1602	@param anIndex the offset into the register
sl@0	1603	*/
sl@0	1604	inline TUint8 At(TUint anIndex) const;
sl@0	1605
sl@0	1606	/** returns a pointer to the raw data */
sl@0	1607	inline TUint8* Ptr();
sl@0	1608
sl@0	1609	/**
sl@0	1610	Constructs and then returns a TMMCArgument which can be used to
sl@0	1611	write to the register using the SWITCH command (CMD6)
sl@0	1612	@param aAccess specifies how the register or command set is to be modified.
sl@0	1613	@param aIndex the offset into the register
sl@0	1614	@param aValue the value to write to the field in the register
sl@0	1615	@param aCmdSet The command set to write. Valid if aAccess = ECmdSet
sl@0	1616	*/
sl@0	1617	inline static TMMCArgument GetWriteArg(TExtCSDAccessBits aAccess, TExtCSDModesFieldIndex aIndex, TUint aValue, TUint aCmdSet);
sl@0	1618
sl@0	1619	/** returns the contents of the CMD_SET field */
sl@0	1620	inline TUint SupportedCmdSet() const;
sl@0	1621
sl@0	1622	/** returns the contents of the SEC_COUNT field */
sl@0	1623	inline TUint SectorCount() const;
sl@0	1624
sl@0	1625	/** returns the contents of the MIN_PERF_W_8_52 field */
sl@0	1626	inline TUint MinPerfWrite8Bit52Mhz() const;
sl@0	1627
sl@0	1628	/** returns the contents of the MIN_PERF_R_8_52 field */
sl@0	1629	inline TUint MinPerfRead8Bit52Mhz() const;
sl@0	1630
sl@0	1631	/** returns the contents of the MIN_PERF_W_8_26_4_52 field */
sl@0	1632	inline TUint MinPerfWrite8Bit26Mhz_4Bit52Mhz() const;
sl@0	1633
sl@0	1634	/** returns the contents of the MIN_PERF_R_8_26_4_52 field */
sl@0	1635	inline TUint MinPerfRead8Bit26Mhz_4Bit52Mhz() const;
sl@0	1636
sl@0	1637	/** returns the contents of the MIN_PERF_W_4_26 field */
sl@0	1638	inline TUint MinPerfWrite4Bit26Mhz() const;
sl@0	1639
sl@0	1640	/** returns the contents of the MIN_PERF_R_4_26 field */
sl@0	1641	inline TUint MinPerfRead4Bit26Mhz() const;
sl@0	1642
sl@0	1643	/** returns the contents of the PWR_CL_26_360 field */
sl@0	1644	inline TUint PowerClass26Mhz360V() const;
sl@0	1645
sl@0	1646	/** returns the contents of the PWR_CL_52_360 field */
sl@0	1647	inline TUint PowerClass52Mhz360V() const;
sl@0	1648
sl@0	1649	/** returns the contents of the PWR_CL_26_195 field */
sl@0	1650	inline TUint PowerClass26Mhz195V() const;
sl@0	1651
sl@0	1652	/** returns the contents of the PWR_CL_52_195 field */
sl@0	1653	inline TUint PowerClass52Mhz195V() const;
sl@0	1654
sl@0	1655	/** returns the contents of the CARD_TYPE field */
sl@0	1656	inline TUint CardType() const;
sl@0	1657
sl@0	1658	/** returns the contents of the CSD_STRUCTURE field */
sl@0	1659	inline TUint CSDStructureVer() const;
sl@0	1660
sl@0	1661	/** returns the contents of the EXT_CSD_REV field */
sl@0	1662	inline TUint ExtendedCSDRev() const;
sl@0	1663
sl@0	1664	/** returns the contents of the CMD_SET field */
sl@0	1665	inline TUint CmdSet() const;
sl@0	1666
sl@0	1667	/** returns the contents of the CMD_SET_REV field */
sl@0	1668	inline TUint CmdSetRev() const;
sl@0	1669
sl@0	1670	/** returns the contents of the POWER_CLASS field */
sl@0	1671	inline TUint PowerClass() const;
sl@0	1672
sl@0	1673	/** returns the contents of the HS_TIMING field */
sl@0	1674	inline TUint HighSpeedTiming() const;
sl@0	1675
sl@0	1676	/** returns the contents of the BUS_WIDTH field */
sl@0	1677	inline TUint BusWidthMode() const;
sl@0	1678
sl@0	1679	/** returns the contents of the BOOT_CONFIG field */
sl@0	1680	inline TUint BootConfig() const;
sl@0	1681
sl@0	1682	/** returns the contents of the BOOT_BUS_WIDTH field */
sl@0	1683	inline TUint BootBusWidth() const;
sl@0	1684
sl@0	1685	/** returns the contents of the ERASE_GROUP_DEF field */
sl@0	1686	inline TUint EraseGroupDef() const;
sl@0	1687
sl@0	1688	/** returns the contents of the ACC_SIZE field */
sl@0	1689	inline TUint AccessSize() const;
sl@0	1690
sl@0	1691	/** returns the contents of the HC_ERASE_GRP_SIZE field */
sl@0	1692	inline TUint HighCapacityEraseGroupSize() const;
sl@0	1693
sl@0	1694	/** returns the contents of the BOOT_INFO field */
sl@0	1695	inline TUint BootInfo() const;
sl@0	1696
sl@0	1697	/** returns the contents of the BOOT_SIZE_MUTLI field */
sl@0	1698	inline TUint BootSizeMultiple() const;
sl@0	1699
sl@0	1700	/** returns the contents of the ERASE_TIMEOUT_MULT field */
sl@0	1701	inline TUint EraseTimeoutMultiple() const;
sl@0	1702
sl@0	1703	/** returns the contents of the REL_WR_SEC_C field */
sl@0	1704	inline TUint ReliableWriteSector() const;
sl@0	1705
sl@0	1706	/** returns the contents of the HC_WP_GRP_SIZE field */
sl@0	1707	inline TUint HighCapacityWriteProtectGroupSize() const;
sl@0	1708
sl@0	1709	/** returns the contents of the S_C_VCC field */
sl@0	1710	inline TUint SleepCurrentVcc() const;
sl@0	1711
sl@0	1712	/** returns the contents of the S_C_VCCQ field */
sl@0	1713	inline TUint SleepCurrentVccQ() const;
sl@0	1714
sl@0	1715	/** returns the contents of the S_A_TIMEOUT field */
sl@0	1716	inline TUint SleepAwakeTimeout() const;
sl@0	1717
sl@0	1718	private:
sl@0	1719	/**
sl@0	1720	@internalComponent little endian 512 byte field representing extended CSD
sl@0	1721	*/
sl@0	1722	TUint8 iData[KMMCExtendedCSDLength];
sl@0	1723	};
sl@0	1724
sl@0	1725
sl@0	1726	// 32 bit MMC card status field (response R1)
sl@0	1727
sl@0	1728	const TUint32 KMMCStatAppCmd= KBit5;
sl@0	1729	const TUint32 KMMCStatSwitchError= KBit7;
sl@0	1730	const TUint32 KMMCStatReadyForData= KBit8;
sl@0	1731	const TUint32 KMMCStatCurrentStateMask= (KBit13-KBit9);
sl@0	1732	const TUint32 KMMCStatEraseReset= KBit13;
sl@0	1733	const TUint32 KMMCStatCardECCDisabled= KBit14;
sl@0	1734	const TUint32 KMMCStatWPEraseSkip= KBit15;
sl@0	1735	const TUint32 KMMCStatErrCSDOverwrite= KBit16;
sl@0	1736	const TUint32 KMMCStatErrOverrun= KBit17;
sl@0	1737	const TUint32 KMMCStatErrUnderrun= KBit18;
sl@0	1738	const TUint32 KMMCStatErrUnknown= KBit19;
sl@0	1739	const TUint32 KMMCStatErrCCError= KBit20;
sl@0	1740	const TUint32 KMMCStatErrCardECCFailed= KBit21;
sl@0	1741	const TUint32 KMMCStatErrIllegalCommand=KBit22;
sl@0	1742	const TUint32 KMMCStatErrComCRCError= KBit23;
sl@0	1743	const TUint32 KMMCStatErrLockUnlock= KBit24;
sl@0	1744	const TUint32 KMMCStatCardIsLocked= KBit25;
sl@0	1745	const TUint32 KMMCStatErrWPViolation= KBit26;
sl@0	1746	const TUint32 KMMCStatErrEraseParam= KBit27;
sl@0	1747	const TUint32 KMMCStatErrEraseSeqError= KBit28;
sl@0	1748	const TUint32 KMMCStatErrBlockLenError= KBit29;
sl@0	1749	const TUint32 KMMCStatErrAddressError= KBit30;
sl@0	1750	const TUint32 KMMCStatErrOutOfRange= KBit31;
sl@0	1751
sl@0	1752	const TUint32 KMMCStatErrorMask= KMMCStatErrOutOfRange \|
sl@0	1753	KMMCStatErrAddressError \|
sl@0	1754	KMMCStatErrBlockLenError\|
sl@0	1755	KMMCStatErrEraseSeqError\|
sl@0	1756	KMMCStatErrEraseParam \|
sl@0	1757	KMMCStatErrWPViolation \|
sl@0	1758	KMMCStatErrLockUnlock \|
sl@0	1759	KMMCStatErrCardECCFailed\|
sl@0	1760	KMMCStatErrCCError \|
sl@0	1761	KMMCStatErrUnknown \|
sl@0	1762	KMMCStatErrUnderrun \|
sl@0	1763	KMMCStatErrOverrun \|
sl@0	1764	KMMCStatErrCSDOverwrite;
sl@0	1765
sl@0	1766
sl@0	1767	const TUint32 KMMCStatClearByReadMask= KMMCStatErrOutOfRange \|
sl@0	1768	KMMCStatErrAddressError \|
sl@0	1769	KMMCStatErrBlockLenError\|
sl@0	1770	KMMCStatErrEraseSeqError\|
sl@0	1771	KMMCStatErrEraseParam \|
sl@0	1772	KMMCStatErrWPViolation \|
sl@0	1773	KMMCStatErrLockUnlock \|
sl@0	1774	KMMCStatErrCardECCFailed\|
sl@0	1775	KMMCStatErrCCError \|
sl@0	1776	KMMCStatErrUnknown \|
sl@0	1777	KMMCStatErrUnderrun \|
sl@0	1778	KMMCStatErrOverrun \|
sl@0	1779	KMMCStatErrCSDOverwrite \|
sl@0	1780	KMMCStatWPEraseSkip \|
sl@0	1781	KMMCStatEraseReset \|
sl@0	1782	KMMCStatAppCmd;
sl@0	1783
sl@0	1784	enum TMMCardStateEnum
sl@0	1785	{
sl@0	1786	ECardStateIdle = 0,
sl@0	1787	ECardStateReady = (1 << 9),
sl@0	1788	ECardStateIdent = (2 << 9),
sl@0	1789	ECardStateStby = (3 << 9),
sl@0	1790	ECardStateTran = (4 << 9),
sl@0	1791	ECardStateData = (5 << 9),
sl@0	1792	ECardStateRcv = (6 << 9),
sl@0	1793	ECardStatePrg = (7 << 9),
sl@0	1794	ECardStateDis = (8 << 9),
sl@0	1795	ECardStateBtst = (9 << 9),
sl@0	1796	ECardStateSlp = (10 << 9)
sl@0	1797	};
sl@0	1798
sl@0	1799	class TMMCStatus
sl@0	1800	/**
sl@0	1801	MMC Status class.
sl@0	1802	This class can be used to get the MMC card state machine and response status.
sl@0	1803	For the details of MMC card state machine and command response refer to MMC card specification.
sl@0	1804
sl@0	1805	@see DMMCStack
sl@0	1806	@publishedPartner
sl@0	1807	@released
sl@0	1808	*/
sl@0	1809	{
sl@0	1810	public:
sl@0	1811	/**
sl@0	1812	* Default constructor.
sl@0	1813	*/
sl@0	1814	inline TMMCStatus() {}
sl@0	1815	inline TMMCStatus(const TUint8*);
sl@0	1816	inline TMMCStatus(const TUint32&);
sl@0	1817	inline operator TUint32() const;
sl@0	1818	inline TUint32 Error() const;
sl@0	1819	inline TMMCardStateEnum State() const;
sl@0	1820	inline void UpdateState(TMMCardStateEnum aState);
sl@0	1821	private:
sl@0	1822	TUint32 iData; // 32 bit bitfield representing status register
sl@0	1823	};
sl@0	1824
sl@0	1825
sl@0	1826
sl@0	1827	const TUint32 KMMCOCRBusy = KBit31; // OCR Busy Bit (Response R3)
sl@0	1828	const TUint32 KMMCOCRAccessModeHCS = KBit30; // OCR Access Mode + SD HCS Bit (Response R3)
sl@0	1829	const TUint32 KMMCOCRLowVoltage = KBit7; // 1.65 - 1.95 volt support
sl@0	1830	const TUint32 KMMCOCRAccessModeMask = KBit30 \| KBit29; // OCR Access Mode : [00 : Byte], [10 : Block]
sl@0	1831
sl@0	1832
sl@0	1833
sl@0	1834	/**
sl@0	1835	Defines the bit value that can be used in TPBusPsuInfo::iVoltageSupported
sl@0	1836	to indicate that the MultiMediaCard PSU supports voltage adjustment.
sl@0	1837
sl@0	1838	@publishedPartner
sl@0	1839	@released
sl@0	1840	*/
sl@0	1841	#define KMMCAdjustableOpVoltage KMMCOCRBusy // Use same bit to flag ASSP PSU supports voltage adjustment.
sl@0	1842
sl@0	1843
sl@0	1844	class TMMCArgument
sl@0	1845	/**
sl@0	1846	MMC Argument class
sl@0	1847
sl@0	1848	@publishedPartner
sl@0	1849	@released
sl@0	1850	*/
sl@0	1851	{
sl@0	1852	public:
sl@0	1853	inline TMMCArgument();
sl@0	1854	inline TMMCArgument(const TUint32&);
sl@0	1855	inline TMMCArgument(TRCA);
sl@0	1856	inline TMMCArgument(TDSR);
sl@0	1857	inline operator TUint32() const;
sl@0	1858	inline void SetRCA(TRCA);
sl@0	1859	private:
sl@0	1860	TUint32 iData; // 32 bit bitfield representing the argument
sl@0	1861	};
sl@0	1862
sl@0	1863
sl@0	1864	class TRCA
sl@0	1865	/**
sl@0	1866	MMC RCA (Relative Card Address) class
sl@0	1867	*/
sl@0	1868	{
sl@0	1869	public:
sl@0	1870	inline TRCA() {}
sl@0	1871	inline TRCA(TUint16);
sl@0	1872	inline TRCA(TInt);
sl@0	1873	inline TRCA(TMMCArgument);
sl@0	1874	inline operator TUint16() const;
sl@0	1875	private:
sl@0	1876	TUint16 iData; // 16 bit bitfield representing MultiMedia Card's RCA
sl@0	1877	};
sl@0	1878
sl@0	1879
sl@0	1880	class TDSR
sl@0	1881	/**
sl@0	1882	MMC DSR (Driver Stage Register) class
sl@0	1883	*/
sl@0	1884	{
sl@0	1885	public:
sl@0	1886	inline TDSR();
sl@0	1887	inline TDSR(TUint16);
sl@0	1888	inline operator TUint16() const;
sl@0	1889	private:
sl@0	1890	TUint16 iData; // 16 bit bitfield representing MultiMedia Card's DSR
sl@0	1891	};
sl@0	1892
sl@0	1893
sl@0	1894	// Card specific information and context
sl@0	1895
sl@0	1896	/**
sl@0	1897	@publishedPartner
sl@0	1898	@released
sl@0	1899	*/
sl@0	1900	const TUint32 KMMCardHasPassword= KBit0;
sl@0	1901
sl@0	1902	/**
sl@0	1903	@publishedPartner
sl@0	1904	@released
sl@0	1905	*/
sl@0	1906	const TUint32 KMMCardIsWriteProtected= KBit1;
sl@0	1907
sl@0	1908	/**
sl@0	1909	@publishedPartner
sl@0	1910	@released
sl@0	1911	*/
sl@0	1912	const TUint32 KMMCardIsLockable= KBit2;
sl@0	1913	const TUint32 KMMCardIsHighCapacity= KBit3;
sl@0	1914	const TUint32 KMMCardIsHighSpeed= KBit4;
sl@0	1915
sl@0	1916	const TUint32 KMMCardMMCFlagMask= 0x0000ffff;
sl@0	1917
sl@0	1918	const TUint32 KMMCardFirstCustomFlag= KBit16;
sl@0	1919	const TUint32 KMMCardCustomFlagMask= 0xffff0000;
sl@0	1920
sl@0	1921	const TUint32 KMMCardHighCapBlockSize= 512;
sl@0	1922	const TUint32 KMMCardHighCapBlockSizeLog2= 9;
sl@0	1923
sl@0	1924	NONSHARABLE_CLASS(TMMCard)
sl@0	1925	/**
sl@0	1926	MMC card class
sl@0	1927	*/
sl@0	1928	{
sl@0	1929	public:
sl@0	1930	inline TBool IsHighCapacity() const;
sl@0	1931
sl@0	1932	/** @publishedPartner
sl@0	1933	@released */
sl@0	1934	TMMCard();
sl@0	1935
sl@0	1936	/** @publishedPartner
sl@0	1937	@released */
sl@0	1938	inline TBool IsPresent() const;
sl@0	1939
sl@0	1940	/** @publishedPartner
sl@0	1941	@released */
sl@0	1942	IMPORT_C TBool IsReady() const;
sl@0	1943
sl@0	1944	/** @publishedPartner
sl@0	1945	@released */
sl@0	1946	IMPORT_C TBool IsLocked() const;
sl@0	1947
sl@0	1948	/** @publishedPartner
sl@0	1949	@released */
sl@0	1950	inline TMMCMediaTypeEnum MediaType() const;
sl@0	1951
sl@0	1952	/** @publishedPartner
sl@0	1953	@released */
sl@0	1954	inline TUint DeviceSize() const;
sl@0	1955
sl@0	1956	/** @publishedPartner
sl@0	1957	@released */
sl@0	1958	inline const TCID& CID() const;
sl@0	1959
sl@0	1960	/** @publishedPartner
sl@0	1961	@released */
sl@0	1962	inline const TCSD& CSD() const;
sl@0	1963
sl@0	1964	/** @publishedPartner
sl@0	1965	@released */
sl@0	1966	inline const TExtendedCSD& ExtendedCSD() const;
sl@0	1967
sl@0	1968	/** @publishedPartner
sl@0	1969	@released */
sl@0	1970	inline TRCA RCA() const;
sl@0	1971
sl@0	1972	/** @publishedPartner
sl@0	1973	@released */
sl@0	1974	inline TBool HasPassword() const;
sl@0	1975
sl@0	1976	/** @publishedPartner
sl@0	1977	@released */
sl@0	1978	inline TBool IsWriteProtected() const; // Always EFalse in MMC build
sl@0	1979
sl@0	1980	/** @publishedPartner
sl@0	1981	@released */
sl@0	1982	inline TInt BusWidth() const;
sl@0	1983
sl@0	1984	/** @publishedPartner
sl@0	1985	@released */
sl@0	1986	inline void SetBusWidth(TInt aBusWidth);
sl@0	1987
sl@0	1988	/** @internalTechnology */
sl@0	1989	inline void SetHighSpeedClock(TUint32 aHighSpeedClock);
sl@0	1990
sl@0	1991	/** @internalTechnology */
sl@0	1992	inline TUint32 HighSpeedClock() const;
sl@0	1993
sl@0	1994	/** @publishedPartner
sl@0	1995	@released */
sl@0	1996	virtual TUint32 PreferredWriteGroupLength() const;
sl@0	1997
sl@0	1998	/** @publishedPartner
sl@0	1999	@released */
sl@0	2000	virtual TInt GetFormatInfo(TLDFormatInfo& aFormatInfo) const;
sl@0	2001
sl@0	2002	/** @publishedPartner
sl@0	2003	@released */
sl@0	2004	virtual TUint32 MinEraseSectorSize() const;
sl@0	2005
sl@0	2006	/** @publishedPartner
sl@0	2007	@released */
sl@0	2008	virtual TUint32 EraseSectorSize() const;
sl@0	2009
sl@0	2010	virtual TUint MaxTranSpeedInKilohertz() const;
sl@0	2011
sl@0	2012	virtual TInt GetEraseInfo(TMMCEraseInfo& anEraseInfo) const;
sl@0	2013
sl@0	2014	/** @publishedPartner
sl@0	2015	@released
sl@0	2016
sl@0	2017	Returns the maximum block length supported by the card encoded as a logarithm.
sl@0	2018	This may be less than the READ_BL_LEN field in the CSD
sl@0	2019	register depending on the type of card and it's capacity.
sl@0	2020	*/
sl@0	2021	virtual TInt MaxReadBlLen() const;
sl@0	2022
sl@0	2023	/** @publishedPartner
sl@0	2024	@released
sl@0	2025
sl@0	2026	Returns the maximum write block length supported by the card encoded as a logarithm.
sl@0	2027	This may be less than the WRITE_BL_LEN field in the CSD
sl@0	2028	register depending on the type of card and it's capacity.
sl@0	2029	*/
sl@0	2030	virtual TInt MaxWriteBlLen() const;
sl@0	2031
sl@0	2032	/** @publishedPartner
sl@0	2033	@released */
sl@0	2034	virtual TInt64 DeviceSize64() const;
sl@0	2035
sl@0	2036	private:
sl@0	2037	inline TInt Number() const;
sl@0	2038	public:
sl@0	2039	TInt iIndex;
sl@0	2040	TMMCStatus iStatus; // last card's status
sl@0	2041	TUint32 iSetBlockLen; // current block length set for the card
sl@0	2042	TMMCCommandEnum iLastCommand; // Last Command code issued for the card
sl@0	2043	TCID iCID;
sl@0	2044	TCSD iCSD;
sl@0	2045	TRCA iRCA;
sl@0	2046	DMMCSession* iUsingSessionP; // session which has this card attached
sl@0	2047	TUint32 iFlags;
sl@0	2048	TExtendedCSD iExtendedCSD;
sl@0	2049	private:
sl@0	2050	TUint32 iHighSpeedClock;
sl@0	2051	TInt iSpare[4];
sl@0	2052	TInt iBusWidth;
sl@0	2053	friend class DMMCStack;
sl@0	2054	friend class TMMCardArray;
sl@0	2055	};
sl@0	2056
sl@0	2057	class TMMCardArray
sl@0	2058	/**
sl@0	2059	MMC card array class
sl@0	2060	*/
sl@0	2061	{
sl@0	2062	public:
sl@0	2063	inline TMMCardArray(DMMCStack* anOwningStack);
sl@0	2064
sl@0	2065	/** @publishedPartner
sl@0	2066	@released */
sl@0	2067	IMPORT_C virtual TInt AllocCards();
sl@0	2068
sl@0	2069	void InitNewCardScan();
sl@0	2070
sl@0	2071	/** @publishedPartner
sl@0	2072	@released */
sl@0	2073	IMPORT_C void AddNewCard(const TUint8* aCID,TRCA* aNewRCA);
sl@0	2074
sl@0	2075	inline TUint NewCardCount();
sl@0	2076	inline TInt CardsPresent();
sl@0	2077	inline TMMCard* NewCardP(TUint aNewCardNumber);
sl@0	2078	inline TMMCard* CardP(TUint aCardNumber);
sl@0	2079	inline TMMCard& Card(TUint aCardNumber);
sl@0	2080	inline TMMCard& NewCard(TUint aCardNumber);
sl@0	2081	TInt MergeCards(TBool aFirstPass);
sl@0	2082	void UpdateAcquisitions(TUint* aMaxClock);
sl@0	2083
sl@0	2084	/** @internalTechnology */
sl@0	2085	TInt CardIndex(const TMMCard* aCard);
sl@0	2086
sl@0	2087	/** @publishedPartner
sl@0	2088	@released */
sl@0	2089	IMPORT_C virtual void DeclareCardAsGone(TUint aCardNumber);
sl@0	2090
sl@0	2091	protected: // initialized by AllocCards()
sl@0	2092	void MoveCardAndLockRCA(TMMCard& aSrc,TMMCard& aDest,TInt aDestIndex);
sl@0	2093	DMMCStack* iOwningStack;
sl@0	2094	TInt iCardsPresent;
sl@0	2095	TUint iNewCardsCount;
sl@0	2096	TMMCard* iCards[KMaxMMCardsPerStack];
sl@0	2097	TMMCard* iNewCards[KMaxMMCardsPerStack];
sl@0	2098	};
sl@0	2099
sl@0	2100	// MMC Command descriptor
sl@0	2101
sl@0	2102	const TUint32 KMMCCmdFlagBytesValid= KBit0; // iBytesDone has a valid data
sl@0	2103	const TUint32 KMMCCmdFlagTransStopped= KBit1; // CMD12 has been successfully issued
sl@0	2104	const TUint32 KMMCCmdFlagStatusReceived=KBit2; // Raised by ASSP layer, cleared by ExecCommandSM()
sl@0	2105	const TUint32 KMMCCmdFlagExecTopBusy= KBit3; // ExecCommandSM() flag
sl@0	2106	const TUint32 KMMCCmdFlagExecSelBusy= KBit4; // ExecCommandSM() flag
sl@0	2107	const TUint32 KMMCCmdFlagBlockAddress= KBit5; // Block addressing mode
sl@0	2108	const TUint32 KMMCCmdFlagDMARamValid= KBit6; // Memory is DMA'able flag
sl@0	2109	const TUint32 KMMCCmdFlagDoubleBuffer= KBit7; // The current DT command is double-buffered
sl@0	2110	const TUint32 KMMCCmdFlagPhysAddr= KBit8; // Address is a physical address
sl@0	2111	const TUint32 KMMCCmdFlagReliableWrite= KBit9; // Current command is Reliable Write
sl@0	2112
sl@0	2113	const TUint32 KMMCCmdFlagASSPFlags= KMMCCmdFlagBytesValid \|
sl@0	2114	KMMCCmdFlagTransStopped \|
sl@0	2115	KMMCCmdFlagStatusReceived;
sl@0	2116
sl@0	2117
sl@0	2118
sl@0	2119
sl@0	2120	/**
sl@0	2121	The MultiMediaCard command specification.
sl@0	2122
sl@0	2123	@publishedPartner
sl@0	2124	@released
sl@0	2125	*/
sl@0	2126	class TMMCCommandSpec
sl@0	2127	{
sl@0	2128	public:
sl@0	2129	/**
sl@0	2130	The command class as defined by the MultiMediaCard System Specification.
sl@0	2131	*/
sl@0	2132	TUint32 iCommandClass;
sl@0	2133
sl@0	2134	/**
sl@0	2135	The command type as defined by the MultiMediaCard System Specification.
sl@0	2136	*/
sl@0	2137	TMMCCommandTypeEnum iCommandType;
sl@0	2138
sl@0	2139	/**
sl@0	2140	The data transfer direction.
sl@0	2141	*/
sl@0	2142	TMMCCmdDirEnum iDirection;
sl@0	2143
sl@0	2144	/**
sl@0	2145	ETrue indicates more than one data block is to be tranferred.
sl@0	2146	*/
sl@0	2147	TBool iMultipleBlocks;
sl@0	2148
sl@0	2149	/**
sl@0	2150	ETrue indicates use standard stop transmission mode.
sl@0	2151	*/
sl@0	2152	TBool iUseStopTransmission; // CMD12 has to be used in the end
sl@0	2153
sl@0	2154	/**
sl@0	2155	The expected response type.
sl@0	2156
sl@0	2157	Note:
sl@0	2158
sl@0	2159	- if this is EResponseTypeNone, then no response is expected.
sl@0	2160	- if this is ERespTypeR2, then a long (128-bit) response is expected.
sl@0	2161	- for all other types, a standard (32-bit) response is expected.
sl@0	2162	*/
sl@0	2163	TMMCResponseTypeEnum iResponseType;
sl@0	2164
sl@0	2165	/**
sl@0	2166	Expected response length (currently 4 or 16 bytes).
sl@0	2167	*/
sl@0	2168	TUint iResponseLength;
sl@0	2169	};
sl@0	2170
sl@0	2171	class TMMCIdxCommandSpec
sl@0	2172	/**
sl@0	2173	MMC Index command spec class
sl@0	2174	*/
sl@0	2175	{
sl@0	2176	public:
sl@0	2177	TInt iIdx;
sl@0	2178	TMMCCommandSpec iSpec;
sl@0	2179	};
sl@0	2180
sl@0	2181
sl@0	2182
sl@0	2183
sl@0	2184	/**
sl@0	2185	MMC command description.
sl@0	2186
sl@0	2187	When issuing an individual command over the bus, the MultiMediaCard
sl@0	2188	controller uses an object of this type to specify the parameters
sl@0	2189	for the command, and to receive back any response.
sl@0	2190
sl@0	2191	Commands are issued by passing an object of this type to
sl@0	2192	the DMMCStack::IssueMMCCommandSM() function, which is implemented by
sl@0	2193	the platform specific layer.
sl@0	2194
sl@0	2195	@publishedPartner
sl@0	2196	@released
sl@0	2197	*/
sl@0	2198	class TMMCCommandDesc
sl@0	2199	{
sl@0	2200	public:
sl@0	2201	IMPORT_C TInt Direction() const; // returns -1/0/+1 for read/none/write
sl@0	2202
sl@0	2203	inline TBool IsBlockCmd() const;
sl@0	2204	inline TUint32 NumBlocks() const;
sl@0	2205	inline TInt64 Arg64() const;
sl@0	2206	inline TBool IsDoubleBuffered() const;
sl@0	2207	inline TUint32 BufferLength() const;
sl@0	2208	inline TUint32 BlockLength() const;
sl@0	2209	inline TBool IsPhysicalAddress() const;
sl@0	2210	TBool AdjustForBlockOrByteAccess(const DMMCSession& aSession);
sl@0	2211
sl@0	2212	void Dump(TUint8* aResponseP, TMMCErr aErr);
sl@0	2213
sl@0	2214	public:
sl@0	2215	/**
sl@0	2216	@internalComponent
sl@0	2217	*/
sl@0	2218	TUint32 iFlags;
sl@0	2219
sl@0	2220	/**
sl@0	2221	The command code.
sl@0	2222
sl@0	2223	This can be written directly to the MMC controller hardware.
sl@0	2224	*/
sl@0	2225	TMMCCommandEnum iCommand;
sl@0	2226
sl@0	2227	/**
sl@0	2228	The argument to be supplied with the command.
sl@0	2229
sl@0	2230	This can be written directly to the MMC controller hardware.
sl@0	2231	*/
sl@0	2232	TMMCArgument iArgument;
sl@0	2233
sl@0	2234	/**
sl@0	2235	The total length of the data to be tranferred.
sl@0	2236	*/
sl@0	2237	TUint32 iTotalLength;
sl@0	2238
sl@0	2239	/**
sl@0	2240	A pointer to the location from where the data is to be read, or written.
sl@0	2241	*/
sl@0	2242	TUint8* iDataMemoryP;
sl@0	2243
sl@0	2244	/**
sl@0	2245	The block length to be used in a data transaction.
sl@0	2246	*/
sl@0	2247	TUint32 iBlockLength;
sl@0	2248
sl@0	2249	/**
sl@0	2250	The MultiMediaCard command specification.
sl@0	2251	*/
sl@0	2252	TMMCCommandSpec iSpec;
sl@0	2253
sl@0	2254	/**
sl@0	2255	The number of bytes transferred since the last time the card was selected.
sl@0	2256	*/
sl@0	2257	TUint32 iBytesDone;
sl@0	2258
sl@0	2259	/**
sl@0	2260	@internalComponent
sl@0	2261	*/
sl@0	2262	TUint iPollAttempts; // Retry counters
sl@0	2263
sl@0	2264	/**
sl@0	2265	@internalComponent
sl@0	2266	*/
sl@0	2267	TUint iTimeOutRetries;
sl@0	2268
sl@0	2269	/**
sl@0	2270	@internalComponent
sl@0	2271	*/
sl@0	2272	TUint iCRCRetries;
sl@0	2273
sl@0	2274	/**
sl@0	2275	@internalComponent
sl@0	2276	*/
sl@0	2277	TUint16 iUnlockRetries;
sl@0	2278
sl@0	2279	/**
sl@0	2280	@internalComponent
sl@0	2281	*/
sl@0	2282	TUint16 iOpCondBusyTimeout; // Units of 10mS
sl@0	2283
sl@0	2284	/**
sl@0	2285	@internalComponent
sl@0	2286	*/
sl@0	2287	TUint iCustomRetries;
sl@0	2288
sl@0	2289	/**
sl@0	2290	@internalComponent
sl@0	2291	*/
sl@0	2292	TUint32 iExecNotHandle; // error codes to not handle in ExecCommandSM()
sl@0	2293
sl@0	2294	/**
sl@0	2295	The area into which the command response is put.
sl@0	2296
sl@0	2297	This is in big-endian format.
sl@0	2298	*/
sl@0	2299	TUint8 iResponse[KMMCMaxResponseLength];
sl@0	2300	};
sl@0	2301
sl@0	2302
sl@0	2303
sl@0	2304
sl@0	2305	/**
sl@0	2306	MMC bus configuration.
sl@0	2307
sl@0	2308	An object of this type is passed to the Variant implementation
sl@0	2309	of DMMCStack::SetBusConfigDefaults(), which should fill the public data
sl@0	2310	members with appropriate information and values.
sl@0	2311
sl@0	2312	@publishedPartner
sl@0	2313	@released
sl@0	2314	*/
sl@0	2315	class TMMCBusConfig
sl@0	2316	{
sl@0	2317	public:
sl@0	2318	/**
sl@0	2319	The hardware interface clock, in KHz.
sl@0	2320	*/
sl@0	2321	TUint iBusClock;
sl@0	2322
sl@0	2323
sl@0	2324	/**
sl@0	2325	The bus clock when clocking in data, in KHz.
sl@0	2326	*/
sl@0	2327	TUint iClockIn;
sl@0	2328
sl@0	2329
sl@0	2330	/**
sl@0	2331	The bus clock when clocking out data, in KHz.
sl@0	2332	*/
sl@0	2333	TUint iClockOut;
sl@0	2334
sl@0	2335
sl@0	2336	/**
sl@0	2337	The response timeout value, in uS.
sl@0	2338	*/
sl@0	2339	TUint iResponseTimeOut;
sl@0	2340
sl@0	2341
sl@0	2342	/**
sl@0	2343	The data timeout value, in uS.
sl@0	2344	*/
sl@0	2345	TUint iDataTimeOut;
sl@0	2346
sl@0	2347
sl@0	2348	/**
sl@0	2349	The busy timeout value, in uS.
sl@0	2350	*/
sl@0	2351	TUint iBusyTimeOut;
sl@0	2352	};
sl@0	2353
sl@0	2354
sl@0	2355	class TMMCStackConfig
sl@0	2356	/**
sl@0	2357	@publishedPartner
sl@0	2358	@released
sl@0	2359
sl@0	2360	Holds the stack configuration settings on behalf of a session.
sl@0	2361
sl@0	2362	Each DMMCSession object contains the public member DMMCSession::iConfig - an instance of the TMMCStackConfig class.
sl@0	2363	By changing these settings, the client can override the master (i.e. default) stack configuration settings.
sl@0	2364
sl@0	2365	However, these changes only remain in effect for the period that the session remains the current session.
sl@0	2366	In this way, the client is able to change the settings employed by the Controller (e.g. bus clock, enable retries,
sl@0	2367	change time-out values, restore defaults etc) while it performs that client's request.
sl@0	2368
sl@0	2369	The client would generally set-up the stack configuration it requires prior to submitting the session.
sl@0	2370	*/
sl@0	2371	{
sl@0	2372	public:
sl@0	2373	inline TMMCStackConfig();
sl@0	2374	inline void SetMode(TUint32 aMask);
sl@0	2375	inline void RemoveMode(TUint32 aMask);
sl@0	2376	inline void UseDefault(TUint32 aMask);
sl@0	2377	inline void SetPollAttempts(TUint aData);
sl@0	2378	inline void SetTimeOutRetries(TUint aData);
sl@0	2379	inline void SetCRCRetries(TUint aData);
sl@0	2380	inline void SetBusClockInKhz(TUint aParam); // In kilohertz
sl@0	2381	inline void SetTicksClockIn(TUint aParam); // Number of clock ticks in ClockIn phase
sl@0	2382	inline void SetTicksClockOut(TUint aParam); // Number of clock ticks in ClockOut phase
sl@0	2383	inline void SetResponseTimeOutInTicks(TUint aParam); // Timeout in bus clock ticks
sl@0	2384	inline void SetDataTimeOutInMcs(TUint aParam); // in microseconds
sl@0	2385	inline void SetBusyTimeOutInMcs(TUint aParam); // in microseconds
sl@0	2386	inline void SetOpCondBusyTimeout(TUint16 aData); // Units of 10mS
sl@0	2387	inline TInt OpCondBusyTimeout();
sl@0	2388	TUint iPollAttempts;
sl@0	2389	private:
sl@0	2390	TUint32 iModes;
sl@0	2391	TUint32 iUpdateMask;
sl@0	2392	TUint32 iClientMask;
sl@0	2393	TUint iTimeOutRetries;
sl@0	2394	TUint iCRCRetries;
sl@0	2395	TUint16 iUnlockRetries;
sl@0	2396	TUint16 iOpCondBusyTimeout; // Units of 10mS
sl@0	2397	TMMCBusConfig iBusConfig;
sl@0	2398	friend class DMMCStack;
sl@0	2399	};
sl@0	2400
sl@0	2401
sl@0	2402	class TMMCRCAPool
sl@0	2403	/**
sl@0	2404	MMC RCA Pool
sl@0	2405	*/
sl@0	2406	{
sl@0	2407	public:
sl@0	2408	inline TMMCRCAPool();
sl@0	2409	TRCA GetFreeRCA();
sl@0	2410	inline void LockRCA(TRCA);
sl@0	2411	inline void UnlockRCA(TRCA);
sl@0	2412	inline void ReleaseUnlocked();
sl@0	2413	private:
sl@0	2414	TUint32 iPool;
sl@0	2415	TUint32 iLocked;
sl@0	2416	};
sl@0	2417
sl@0	2418
sl@0	2419	class TMMCSessRing
sl@0	2420	/**
sl@0	2421	MMC session ring
sl@0	2422	*/
sl@0	2423	{
sl@0	2424	public:
sl@0	2425	TMMCSessRing();
sl@0	2426	inline TBool IsEmpty() const;
sl@0	2427	void Erase();
sl@0	2428	inline void SetMarker(); // Sets Marker into Point position
sl@0	2429	inline void AdvanceMarker(); // Moves Marker one position forward
sl@0	2430	inline void Point(); // Sets Point into Marker position
sl@0	2431	TBool Point(DMMCSession* aSessP); // Finds aSessP and sets Point to it
sl@0	2432	void Add(DMMCSession* aSessP); // Inserts aSessP before the Marker; Point moves to Marker
sl@0	2433	void Add(TMMCSessRing& aRing);
sl@0	2434	DMMCSession* Remove(); // Removes at Point; Point moves forward
sl@0	2435	void Remove(DMMCSession* aSessP); // Points aSessP first, then remove()
sl@0	2436	inline TUint Size() const;
sl@0	2437	inline operator DMMCSession*() const;
sl@0	2438	DMMCSession* operator++(TInt); // returns Point and moves it forward; stops at Marker
sl@0	2439	private:
sl@0	2440	DMMCSession* iPMark;
sl@0	2441	DMMCSession* iPoint;
sl@0	2442	DMMCSession* iPrevP;
sl@0	2443	TUint iSize;
sl@0	2444	};
sl@0	2445
sl@0	2446
sl@0	2447	//
sl@0	2448	// DMMCStack State Machine Functions are supported by TMMCStateMachine class
sl@0	2449	//
sl@0	2450	// The structure of state machine functions is assumed to be as follows
sl@0	2451	//
sl@0	2452	// TMMCErr DMMCStack::FunctionNameSMST( TAny* aPtr )
sl@0	2453	// { return( STATIC_CAST(DMMCStack*,aPtr)->FunctionNameSM() ); }
sl@0	2454	//
sl@0	2455	// TMMCErr DMMCStack::FunctionNameSM()
sl@0	2456	// {
sl@0	2457	// enum states {EStBegin=0, ..., EStEnd };
sl@0	2458	// DMMCSession& s = Session();
sl@0	2459	// TMMCStateMachine& m = Machine();
sl@0	2460	// const TMMCErr err = m.SetExitCode( 0 );
sl@0	2461	//
sl@0	2462	// for(;;)
sl@0	2463	// {
sl@0	2464	// switch(m.State())
sl@0	2465	// {
sl@0	2466	// case EStBegin:
sl@0	2467	// {
sl@0	2468	// ....
sl@0	2469	// }
sl@0	2470	// case EStNext:
sl@0	2471	// {
sl@0	2472	// .....
sl@0	2473	// }
sl@0	2474	// case EStEnd: break;
sl@0	2475	// default: Panic(...);
sl@0	2476	// }
sl@0	2477	// break;
sl@0	2478	// }
sl@0	2479	// return(m.Pop());
sl@0	2480	// }
sl@0	2481	//
sl@0	2482	// State Machine remembers the next state number and function name and goes there as soon
sl@0	2483	// as the control is returned to the session. To release the control and wait for the next
sl@0	2484	// re-entrance (which will happen immediately if the session is not blocked or, as soon as
sl@0	2485	// an asynchronous event removes the blocking condition), a state machine function has to
sl@0	2486	// return( 0 ); Returning non-zero exit code will result in the session being completed with
sl@0	2487	// that error code unless a caller state machine function has explicitly intercepted such
sl@0	2488	// an error with m.SetTraps( TMMCErr aMask ).
sl@0	2489	//
sl@0	2490	// To make a state machine function code more readable, the following macros are provided:
sl@0	2491	//
sl@0	2492	// SMF_NEXTS(nexts) - set the next state to "nexts"
sl@0	2493	// SMF_CALL(func) - invoke SM function "func", then go to the next state
sl@0	2494	// SMF_CALLWAIT(func) - the same as above, but sleep at the entry point
sl@0	2495	// SMF_CALLMYS(nexts,retst) - invoke current SM function at "nexts" entry point
sl@0	2496	// SMF_CALLMEWR(retst) - invoke me right here with return state retst
sl@0	2497	// SMF_INVOKES(func,nexts) - invoke SM function "func", then go to the state "nexts"
sl@0	2498	// SMF_INVOKEWAITS(func,nexts) - the same as above, but sleep at the entry point
sl@0	2499	// SMF_WAIT - sleep at the next state
sl@0	2500	// SMF_WAITS(nexts) - set next state to "nexts", then sleep
sl@0	2501	// SMF_RETURN(value) - return an error to the caller SM function
sl@0	2502	// SMF_EXIT - return to the caller SM function
sl@0	2503	// SMF_EXITWAIT - the same as above, but sleep at the exit point
sl@0	2504	// SMF_JUMP(func) - transfer the control to SM function "func"
sl@0	2505	// SMF_JUMPWAIT(func) - the same as above, but sleep at the entry point
sl@0	2506	// SMF_GOTONEXTS - goto the next state
sl@0	2507	// SMF_GOTOS(nexts) - set the next state to "nexts", then go to it
sl@0	2508	// SMF_STATE(sname) - declare the state name "sname"
sl@0	2509	// SMF_BPOINT(sname) - declare the state "sname" and sleep here if blocked statically
sl@0	2510	//
sl@0	2511
sl@0	2512	/**
sl@0	2513	@publishedPartner
sl@0	2514	@released
sl@0	2515
sl@0	2516	Declares the start of a state machine case switch statement.
sl@0	2517
sl@0	2518	The macro assumes that the first state defined by the state machine
sl@0	2519	function is EStBegin.
sl@0	2520
sl@0	2521	NOTES:
sl@0	2522
sl@0	2523	- the code generates an opening curly brace that must be matched by
sl@0	2524	a closing curly brace. Typically, this is provided by the SMF_STATE or
sl@0	2525	the SMF_END macros.
sl@0	2526
sl@0	2527	@see SMF_STATE
sl@0	2528	@see SMF_END
sl@0	2529	*/
sl@0	2530	#define SMF_BEGIN TMMCStateMachine& m=Machine();const TMMCErr err=m.SetExitCode(0);\
sl@0	2531	for(;;){switch(m.State()){case EStBegin:{if(err) (void)0;
sl@0	2532
sl@0	2533	/**
sl@0	2534	@publishedPartner
sl@0	2535	@released
sl@0	2536
sl@0	2537	Declares the end of a state machine case switch statement.
sl@0	2538
sl@0	2539	The macro assumes that the last state defined by the state machine
sl@0	2540	function is EStEnd.
sl@0	2541
sl@0	2542	NOTES:
sl@0	2543
sl@0	2544	- the code generated assumes that there are earlier calls to SMF_BEGIN,
sl@0	2545	and zero or more calls to SMF_STATE.
sl@0	2546
sl@0	2547	@see SMF_BEGIN
sl@0	2548	@see SMF_STATE
sl@0	2549	*/
sl@0	2550	#define SMF_END }case EStEnd:break;default:DMMCSocket::Panic(DMMCSocket::EMMCMachineState);}break;}\
sl@0	2551	return(m.Pop());
sl@0	2552
sl@0	2553
sl@0	2554	/**
sl@0	2555	@publishedPartner
sl@0	2556	@released
sl@0	2557
sl@0	2558	Sets the next state when the current state machine
sl@0	2559	function is re-entered.
sl@0	2560
sl@0	2561	@param nexts The next state to be entered in the current state machine.
sl@0	2562	*/
sl@0	2563	#define SMF_NEXTS(nexts) m.SetState(nexts);
sl@0	2564
sl@0	2565
sl@0	2566	/**
sl@0	2567	@publishedPartner
sl@0	2568	@released
sl@0	2569
sl@0	2570	Pushes a state machine entry onto the stack, specifying the child state machine
sl@0	2571	function to be invoked.
sl@0	2572
sl@0	2573	The child function will be entered at state 0 (EStBegin), when the state machine
sl@0	2574	is next dispatched.
sl@0	2575
sl@0	2576	Control returns from this state machine function after completion of
sl@0	2577	all functions coded by this macro.
sl@0	2578
sl@0	2579	@param func The child state machine function to be invoked.
sl@0	2580	*/
sl@0	2581	#define SMF_CALL(func) return(m.Push(func));
sl@0	2582
sl@0	2583
sl@0	2584	/**
sl@0	2585	@publishedPartner
sl@0	2586	@released
sl@0	2587
sl@0	2588	Pushes a state machine entry onto the stack, specifying the child state machine
sl@0	2589	function to be invoked.
sl@0	2590
sl@0	2591	The state machine is blocked before entry to the child function, but when
sl@0	2592	it becomes unblocked, the child function will be entered at state 0 (EStBegin)
sl@0	2593	when the state machine is next dispatched.
sl@0	2594
sl@0	2595	Control returns from this state machine function after completion of
sl@0	2596	all functions coded by this macro.
sl@0	2597
sl@0	2598	@param func The child state machine function to be invoked.
sl@0	2599	*/
sl@0	2600	#define SMF_CALLWAIT(func) return(m.Push(func,ETrue));
sl@0	2601
sl@0	2602
sl@0	2603	/**
sl@0	2604	@publishedPartner
sl@0	2605	@released
sl@0	2606
sl@0	2607	Sets the next state for the current state machine function - control will
sl@0	2608	flow to this state on completion of all functions coded by this macro.
sl@0	2609
sl@0	2610	The macro also pushes a state machine entry onto the stack, specifying
sl@0	2611	the CURRENT state machine function as the child state machine function to be
sl@0	2612	invoked, and sets the state in which this child state machine function will
sl@0	2613	be entered, when it gains control.
sl@0	2614
sl@0	2615	NOTES:
sl@0	2616
sl@0	2617	- the child function is the same as the parent function.
sl@0	2618	- the state machine is blocked on return from the current state machine function.
sl@0	2619
sl@0	2620	@param nexts The state in which the child state machine function will
sl@0	2621	gain control.
sl@0	2622	@param retst The next state for the current state machine function.
sl@0	2623	*/
sl@0	2624	#define SMF_CALLMYS(nexts,retst) {m.SetState(retst);m.PushMe();m.SetState(nexts);continue;}
sl@0	2625
sl@0	2626
sl@0	2627	/**
sl@0	2628	@publishedPartner
sl@0	2629	@released
sl@0	2630
sl@0	2631	Sets the next state for the current state machine function - control flows to
sl@0	2632	the next instruction on completion of all functions coded by this macro.
sl@0	2633
sl@0	2634	The macro also pushes a state machine entry onto the stack, specifying
sl@0	2635	the CURRENT state machine function as the child state machine function to be
sl@0	2636	invoked. The child function will be entered at state 0 (EStBegin), when the state machine
sl@0	2637	is next dispatched.
sl@0	2638
sl@0	2639	NOTES:
sl@0	2640
sl@0	2641	- the child function is the same as the parent function.
sl@0	2642	- the state machine is blocked on return from the current state machine function.
sl@0	2643
sl@0	2644	@param retst The next state for the current state machine function.
sl@0	2645	*/
sl@0	2646	#define SMF_CALLMEWR(retst) {m.SetState(retst);m.PushMe();}
sl@0	2647
sl@0	2648
sl@0	2649	/**
sl@0	2650	@publishedPartner
sl@0	2651	@released
sl@0	2652
sl@0	2653	Sets the next state for the current state machine function.
sl@0	2654
sl@0	2655	The macro also pushes a state machine entry onto the stack, specifying
sl@0	2656	the child state machine function to be
sl@0	2657	invoked. The child function will be entered at state 0 (EStBegin), when the state machine
sl@0	2658	is next dispatched.
sl@0	2659
sl@0	2660	Control returns from the current state machine function after completion of
sl@0	2661	all functions coded by this macro.
sl@0	2662
sl@0	2663	@param func The child state machine function to be invoked.
sl@0	2664	@param nexts The next state for the current state machine function.
sl@0	2665	*/
sl@0	2666	#define SMF_INVOKES(func,nexts) {m.SetState(nexts);return(m.Push(func));}
sl@0	2667
sl@0	2668
sl@0	2669	/**
sl@0	2670	@publishedPartner
sl@0	2671	@released
sl@0	2672
sl@0	2673	Sets the next state for the current state machine function.
sl@0	2674
sl@0	2675	The macro also pushes a state machine entry onto the stack, specifying
sl@0	2676	the child state machine function to be
sl@0	2677	invoked. The child function will be entered at state 0 (EStBegin), when the state machine
sl@0	2678	is next dispatched.
sl@0	2679
sl@0	2680	Control returns from the current state machine function after completion of
sl@0	2681	all functions coded by this macro.
sl@0	2682
sl@0	2683	NOTES:
sl@0	2684
sl@0	2685	- the state machine is blocked on return from the current state machine function.
sl@0	2686
sl@0	2687	@param func The child state machine function to be invoked.
sl@0	2688	@param nexts The next state for the current state machine function.
sl@0	2689	*/
sl@0	2690	#define SMF_INVOKEWAITS(func,nexts) {m.SetState(nexts);return(m.Push(func,ETrue));}
sl@0	2691
sl@0	2692
sl@0	2693	/**
sl@0	2694	@publishedPartner
sl@0	2695	@released
sl@0	2696
sl@0	2697	Returns from the current state machine function, and the state machine then blocks (waits).
sl@0	2698	*/
sl@0	2699	#define SMF_WAIT return(0);
sl@0	2700
sl@0	2701
sl@0	2702	/**
sl@0	2703	@publishedPartner
sl@0	2704	@released
sl@0	2705
sl@0	2706	Sets the next state for the current state machine function; control then returns
sl@0	2707	from the current state machine function, and the state machine blocks (waits).
sl@0	2708
sl@0	2709	@param nexts The next state for the current state machine function.
sl@0	2710	*/
sl@0	2711	#define SMF_WAITS(nexts) return(m.SetState(nexts));
sl@0	2712
sl@0	2713
sl@0	2714	/**
sl@0	2715	@publishedPartner
sl@0	2716	@released
sl@0	2717
sl@0	2718	Returns the specified error value to the calling (parent) state machine function.
sl@0	2719
sl@0	2720	@param value The error value to be returned.
sl@0	2721	*/
sl@0	2722	#define SMF_RETURN(value) {m.Pop();return(value);}
sl@0	2723
sl@0	2724
sl@0	2725	/**
sl@0	2726	@publishedPartner
sl@0	2727	@released
sl@0	2728
sl@0	2729	Returns to the calling state machine function.
sl@0	2730	*/
sl@0	2731	#define SMF_EXIT break;
sl@0	2732
sl@0	2733
sl@0	2734	/**
sl@0	2735	@publishedPartner
sl@0	2736	@released
sl@0	2737
sl@0	2738	Returns to the calling state machine function, and the state machine blocks (waits).
sl@0	2739	*/
sl@0	2740	#define SMF_EXITWAIT return(m.Pop(ETrue));
sl@0	2741
sl@0	2742
sl@0	2743	/**
sl@0	2744	@publishedPartner
sl@0	2745	@released
sl@0	2746
sl@0	2747	Transfers control to the specified state machine function.
sl@0	2748
sl@0	2749	NOTES:
sl@0	2750
sl@0	2751	- this function is executed at the same stack entry level as the current state machine function.
sl@0	2752
sl@0	2753	@param func The state machine function to which control is to be transferred.
sl@0	2754	*/
sl@0	2755	#define SMF_JUMP(func) return(m.Jump(func));
sl@0	2756
sl@0	2757
sl@0	2758	/**
sl@0	2759	@publishedPartner
sl@0	2760	@released
sl@0	2761
sl@0	2762	Transfers control to the specified state machine function, and waits
sl@0	2763	at its entry point.
sl@0	2764
sl@0	2765	@param func The state machine function to which control is to be transferred.
sl@0	2766	*/
sl@0	2767	#define SMF_JUMPWAIT(func) return(m.Jump(func,ETrue));
sl@0	2768
sl@0	2769
sl@0	2770	/**
sl@0	2771	@publishedPartner
sl@0	2772	@released
sl@0	2773
sl@0	2774	Goes to the next state.
sl@0	2775	*/
sl@0	2776	#define SMF_GOTONEXTS continue;
sl@0	2777
sl@0	2778
sl@0	2779	/**
sl@0	2780	@publishedPartner
sl@0	2781	@released
sl@0	2782
sl@0	2783	Sets the next state and then goes to that state.
sl@0	2784
sl@0	2785	@param nexts The next state.
sl@0	2786	*/
sl@0	2787	#define SMF_GOTOS(nexts) {m.SetState(nexts);continue;}
sl@0	2788
sl@0	2789
sl@0	2790	/**
sl@0	2791	@publishedPartner
sl@0	2792	@released
sl@0	2793
sl@0	2794	Declares the name of a state.
sl@0	2795
sl@0	2796	This is used to generate a case statement based on the state name.
sl@0	2797
sl@0	2798	@param sname The state name.
sl@0	2799	*/
sl@0	2800	#define SMF_STATE(sname) }case sname:{
sl@0	2801
sl@0	2802
sl@0	2803	/**
sl@0	2804	@publishedPartner
sl@0	2805	@released
sl@0	2806
sl@0	2807	Declares the name of a state, and sleeps here
sl@0	2808	if blocked statically.
sl@0	2809
sl@0	2810	@param sname The state name.
sl@0	2811	*/
sl@0	2812	#define SMF_BPOINT(sname) }case sname: if(StaticBlocks()) return(m.SetState(sname));{
sl@0	2813
sl@0	2814
sl@0	2815
sl@0	2816
sl@0	2817	class TMMCStateMachine
sl@0	2818	/**
sl@0	2819	The MultiMediaCard state machine.
sl@0	2820
sl@0	2821	@publishedPartner
sl@0	2822	@released
sl@0	2823	*/
sl@0	2824	{
sl@0	2825	public:
sl@0	2826	inline void Setup(TMMCErr (anEntry)(TAny), TAny* aContextP);
sl@0	2827	IMPORT_C void Reset();
sl@0	2828	IMPORT_C TMMCErr Dispatch();
sl@0	2829	inline TMMCErr ExitCode();
sl@0	2830	inline TMMCErr SetExitCode(TMMCErr aCode);
sl@0	2831	inline TUint State();
sl@0	2832	inline TMMCErr SetState(TUint aState);
sl@0	2833	inline void SuppressSuspension();
sl@0	2834	inline void SetTraps(TMMCErr aMask);
sl@0	2835	inline void ResetTraps();
sl@0	2836	inline void Abort();
sl@0	2837	inline TMMCErr Pop(TBool aSuspend=EFalse);
sl@0	2838	inline TMMCErr PushMe();
sl@0	2839	IMPORT_C TMMCErr Push(TMMCErr (anEntry)(TAny), TBool aSuspend=EFalse);
sl@0	2840	IMPORT_C TMMCErr Jump(TMMCErr (anEntry)(TAny), TBool aSuspend=EFalse);
sl@0	2841	private:
sl@0	2842	class TMMCMachineStackEntry
sl@0	2843	{
sl@0	2844	public:
sl@0	2845	TMMCErr (iFunction)(TAny);
sl@0	2846	TUint iState;
sl@0	2847	TMMCErr iTrapMask;
sl@0	2848	};
sl@0	2849	TBool iAbort;
sl@0	2850	TBool iSuspend;
sl@0	2851	TAny* iContextP;
sl@0	2852	TMMCErr iExitCode;
sl@0	2853	TInt iSP;
sl@0	2854	TMMCMachineStackEntry iStack[KMaxMMCMachineStackDepth];
sl@0	2855	};
sl@0	2856
sl@0	2857	class TMMCCallBack
sl@0	2858	/**
sl@0	2859	This class is used to notify the request completion as a callback function for the clients of DMMCSession.
sl@0	2860	The callback function will be called on session completion.
sl@0	2861	Callback function is used to indicate Asynchronous Completion.
sl@0	2862
sl@0	2863	@see DMMCSession
sl@0	2864	@publishedPartner
sl@0	2865	@released
sl@0	2866	*/
sl@0	2867	{
sl@0	2868	public:
sl@0	2869	inline TMMCCallBack();
sl@0	2870	inline TMMCCallBack(void (aFunction)(TAny aPtr));
sl@0	2871	inline TMMCCallBack(void (aFunction)(TAny aPtr), TAny* aPtr);
sl@0	2872	inline void CallBack() const;
sl@0	2873	public:
sl@0	2874	/**
sl@0	2875	A pointer to the callback function.
sl@0	2876	*/
sl@0	2877	void (iFunction)(TAny aPtr);
sl@0	2878
sl@0	2879	/**
sl@0	2880	A pointer that is passed to the callback function when
sl@0	2881	the callback function is called.
sl@0	2882	*/
sl@0	2883	TAny* iPtr;
sl@0	2884	};
sl@0	2885
sl@0	2886	// DMMCStack serves an incoming queue of session requests.
sl@0	2887	// Each queue element is represented by an instance of the following class
sl@0	2888
sl@0	2889	typedef TMMCErr (TMMCSMSTFunc)(TAny);
sl@0	2890
sl@0	2891	class DMMCSession : public DBase
sl@0	2892	/**
sl@0	2893	Provides the main interface between the client and the MMC Socket, allowing commands and responses
sl@0	2894	to be processed asynchronously on the stack.
sl@0	2895
sl@0	2896	Each client creates it own instance of this class. It is then able to make MultiMediaCard requests
sl@0	2897	on the selected stack by configuring the DMMCSession object with relevant information for the request
sl@0	2898	and then submitting (or engaging) this session object.
sl@0	2899
sl@0	2900	The session is used to pass commands either to the entire stack (a broadcast command), or to individual
sl@0	2901	cards in the stack. The class contains functions for initiating macro functions as laid down by the
sl@0	2902	MultiMediaCard Association (MMCA) as well as lower level functions allowing a client to control the
sl@0	2903	stack in a more explicit manner.
sl@0	2904
sl@0	2905	All requests on the MultiMediaCard stack which involve bus activity are inherently asynchronous. When
sl@0	2906	creating a DMMCSession object, a client supplies a call-back function as part of the constructor.
sl@0	2907	Once a client has engaged a session on the stack, it is informed of the completion of the request by
sl@0	2908	the Controller calling this call-back function.
sl@0	2909
sl@0	2910	@publishedPartner
sl@0	2911	@released
sl@0	2912	*/
sl@0	2913	{
sl@0	2914	public:
sl@0	2915	IMPORT_C virtual ~DMMCSession();
sl@0	2916	IMPORT_C DMMCSession(const TMMCCallBack& aCallBack);
sl@0	2917
sl@0	2918	// Object initialisation
sl@0	2919	inline void SetStack(DMMCStack* aStackP);
sl@0	2920	IMPORT_C void SetCard(TMMCard* aCardP);
sl@0	2921
sl@0	2922	// Control macros setup
sl@0	2923	inline void SetupCIMUpdateAcq();
sl@0	2924	inline void SetupCIMInitStack();
sl@0	2925	inline void SetupCIMCheckStack();
sl@0	2926	inline void SetupCIMSetupCard();
sl@0	2927	inline void SetupCIMLockStack();
sl@0	2928	inline void SetupCIMInitStackAfterUnlock();
sl@0	2929	inline void SetupCIMAutoUnlock();
sl@0	2930
sl@0	2931	// Data transfer macros setup
sl@0	2932	IMPORT_C void SetupCIMReadBlock(TMMCArgument aDevAddr, TUint32 aLength, TUint8* aMemoryP);
sl@0	2933	IMPORT_C void SetupCIMWriteBlock(TMMCArgument aDevAddr, TUint32 aLength, TUint8* aMemoryP);
sl@0	2934	IMPORT_C void SetupCIMReadMBlock(TMMCArgument aDevAddr, TUint32 aLength, TUint8* aMemoryP, TUint32 aBlkLen);
sl@0	2935	IMPORT_C void SetupCIMWriteMBlock(TMMCArgument aDevAddr, TUint32 aLength, TUint8* aMemoryP, TUint32 aBlkLen);
sl@0	2936	IMPORT_C void SetupCIMEraseSector(TMMCArgument aDevAddr, TUint32 aLength);
sl@0	2937	IMPORT_C void SetupCIMEraseGroup(TMMCArgument aDevAddr, TUint32 aLength);
sl@0	2938	IMPORT_C void SetupCIMReadIO(TUint8 aRegAddr, TUint32 aLength, TUint8* aMemoryP);
sl@0	2939	IMPORT_C void SetupCIMWriteIO(TUint8 aRegAddr, TUint32 aLength, TUint8* aMemoryP);
sl@0	2940	IMPORT_C void SetupCIMLockUnlock(TUint32 aLength, TUint8* aMemoryP);
sl@0	2941
sl@0	2942	// Data transfer macros setup (block mode)
sl@0	2943	inline void SetupCIMReadBlock(TMMCArgument aBlockAddr, TUint8* aMemoryP, TUint32 aBlocks = 1);
sl@0	2944	inline void SetupCIMWriteBlock(TMMCArgument aBlockAddr, TUint8* aMemoryP, TUint32 aBlocks = 1);
sl@0	2945	inline void SetupCIMEraseMSector(TMMCArgument aBlockAddr, TUint32 aBlocks = 1);
sl@0	2946	inline void SetupCIMEraseMGroup(TMMCArgument aBlockAddr, TUint32 aBlocks = 1);
sl@0	2947
sl@0	2948	// Raw commands (must be used in the locked bus state only)
sl@0	2949	// Known commands with or without (with a default) argument
sl@0	2950	IMPORT_C void SetupCommand(TMMCCommandEnum aCommand, TMMCArgument anArgument=0);
sl@0	2951
sl@0	2952	// Generic unknown command with unknown response type
sl@0	2953	IMPORT_C void SetupRSCommand(TMMCCommandEnum aCommand, TMMCArgument anArgument,
sl@0	2954	TUint32 aResponseLength, TMMCCommandTypeEnum aCommandType=ECmdTypeUK,
sl@0	2955	TMMCResponseTypeEnum aResponseType=ERespTypeUnknown,
sl@0	2956	TUint32 aCommandClass=KMMCCmdClassNone);
sl@0	2957
sl@0	2958	// Generic data transfer command
sl@0	2959	IMPORT_C void SetupDTCommand(TMMCCommandEnum aCommand, TMMCArgument anArgument,
sl@0	2960	TUint32 aTotalLength, TUint8* aMemoryAddress, TUint32 aBlockLength=0,
sl@0	2961	TBool aStopTransmission=EFalse, TMMCCmdDirEnum aDir=EDirNone,
sl@0	2962	TUint32 aCommandClass=KMMCCmdClassNone);
sl@0	2963	// Actions
sl@0	2964	IMPORT_C TInt Engage(); // Enque session for execution
sl@0	2965	inline void UnlockStack(); // Unlock the bus
sl@0	2966	inline void Stop(); // Signal session to complete (stop and complete)
sl@0	2967	inline void Abort(); // Abort only (no completion)
sl@0	2968
sl@0	2969	// Info retrieval
sl@0	2970	IMPORT_C TInt EpocErrorCode() const; // Derived from MMCExitCode and LastStatus
sl@0	2971	inline TMMCSessionTypeEnum SessionID() const;
sl@0	2972	inline DMMCStack* StackP() const; // DMMCStack serving this session
sl@0	2973	inline TMMCard* CardP() const; // The current card pointer
sl@0	2974	inline TBool IsEngaged() const; // Session is being served by DMMCStack
sl@0	2975	inline TMMCErr MMCExitCode() const; // MMC specific error code returned by DMMCStack
sl@0	2976	inline TMMCStatus LastStatus() const; // Last R1 response received from the card
sl@0	2977	inline TUint32 BytesTransferred() const;// The actual amount of data transferred in this session
sl@0	2978	inline TUint8* ResponseP(); // Current command response (&iCommand[iCmdSP].iResponse)
sl@0	2979	inline TUint32 EffectiveModes() const; // Modes which DMMCStack will consider as effective
sl@0	2980	//
sl@0	2981	inline void ResetCommandStack();
sl@0	2982	private:
sl@0	2983	void SetupCIMControl(TInt aSessNum);
sl@0	2984	protected:
sl@0	2985	IMPORT_C virtual TMMCSMSTFunc GetMacro(TInt aSessNum) const;
sl@0	2986	inline void Block(TUint32 aFlag);
sl@0	2987	inline void UnBlock(TUint32 aFlag, TMMCErr anExitCode);
sl@0	2988	private:
sl@0	2989	#ifdef __EPOC32__
sl@0	2990	static void PollTimerCallBack(TAny* aSessP);
sl@0	2991	static void RetryTimerCallBack(TAny* aSessP);
sl@0	2992	static void ProgramTimerCallBack(TAny* aSessP);
sl@0	2993	#endif
sl@0	2994	inline void SwapMe();
sl@0	2995	void SynchBlock(TUint32 aFlag);
sl@0	2996	void SynchUnBlock(TUint32 aFlag);
sl@0	2997	public:
sl@0	2998	static const TMMCCommandSpec& FindCommandSpec(const TMMCIdxCommandSpec aSpecs[], TInt aIdx);
sl@0	2999	IMPORT_C void FillCommandDesc();
sl@0	3000	IMPORT_C void FillCommandDesc(TMMCCommandEnum aCommand);
sl@0	3001	IMPORT_C void FillCommandDesc(TMMCCommandEnum aCommand, TMMCArgument anArgument);
sl@0	3002	IMPORT_C void FillCommandArgs(TMMCArgument anArgument, TUint32 aLength, TUint8* aMemoryP, TUint32 aBlkLen);
sl@0	3003	inline TMMCCommandDesc& Command(); // The current command descriptor
sl@0	3004
sl@0	3005	inline void PushCommandStack();
sl@0	3006	inline void PopCommandStack();
sl@0	3007
sl@0	3008	// Methods for double-buffered data transfer:
sl@0	3009	inline TBool RequestMoreData();
sl@0	3010	inline void EnableDoubleBuffering(TUint32 aNumBlocks); /*< @internalTechnology /
sl@0	3011	inline void SetDataTransferCallback(TMMCCallBack& aCallback); /*< @internalTechnology /
sl@0	3012	inline void MoreDataAvailable(TUint32 aNumBlocks, TUint8* aMemoryP, TInt aError); /*< @internalTechnology /
sl@0	3013	public:
sl@0	3014	/**
sl@0	3015	The last R1 response.
sl@0	3016	*/
sl@0	3017	TMMCStatus iLastStatus;
sl@0	3018
sl@0	3019	/**
sl@0	3020	A pointer to the card object.
sl@0	3021	*/
sl@0	3022	TMMCard* iCardP; // Pointer to Card Info object
sl@0	3023	IMPORT_C TRCA CardRCA(); // Checks that card is still ready - otherwise returns 0
sl@0	3024	TMMCSessionTypeEnum iSessionID;
sl@0	3025	private:
sl@0	3026	DMMCSession* iLinkP; //
sl@0	3027	protected:
sl@0	3028	TMMCCallBack iCallBack; // Where to report the completion
sl@0	3029	private:
sl@0	3030	DMMCStack* iStackP; // Pointer to Stack Controller
sl@0	3031	TCID iCID; // Card ID to ensure we are still talking to the same card
sl@0	3032	TUint32 iBytesTransferred; // The actual amount of data transferred in this session
sl@0	3033	TMMCErr iMMCExitCode; // State Machine exit code (MMC specific)
sl@0	3034	public:
sl@0	3035	/**
sl@0	3036	Session state flags (synchronous).
sl@0	3037	*/
sl@0	3038	TUint32 iState;
sl@0	3039	private:
sl@0	3040	TUint iInitContext; // Stack Initialiser pass number
sl@0	3041	TUint iGlobalRetries; // Global retry counter
sl@0	3042
sl@0	3043	// Asynchronous flags analysed by scheduler
sl@0	3044	TBool volatile iDoAbort; // Marks the session for abort
sl@0	3045	TBool volatile iDoStop; // Stop the session as soon as it's safe
sl@0	3046	TBool volatile iDoComplete; // Completion callback is now to be invoked
sl@0	3047	TBool iBrokenLock; // Stack lock is broken by force major
sl@0	3048	//
sl@0	3049	TUint32 iBlockOn; // blocking reasons
sl@0	3050	TInt iCmdSP; // Current Command stack index
sl@0	3051
sl@0	3052	TMMCCommandDesc iCommand[KMaxMMCCommandStackDepth]; // Command stack
sl@0	3053
sl@0	3054	TMMCCallBack iDataTransferCallback; // A callback function, used to request more data when performing double-buffering
sl@0	3055
sl@0	3056	TUint32 iSpare[22]; // Spare data (stolen from iCommand)
sl@0	3057
sl@0	3058	TMMCStateMachine iMachine; // State Machine context
sl@0	3059	#ifdef __EPOC32__
sl@0	3060	NTimer iPollTimer;
sl@0	3061	NTimer iRetryTimer;
sl@0	3062	NTimer iProgramTimer;
sl@0	3063	#endif
sl@0	3064	public:
sl@0	3065	TMMCStackConfig iConfig; // Client configuration parameters
sl@0	3066	friend class DMMCStack;
sl@0	3067	friend class TMMCSessRing;
sl@0	3068	friend class TMMCardArray;
sl@0	3069	};
sl@0	3070
sl@0	3071
sl@0	3072	class DMMCStack : public DBase
sl@0	3073	/**
sl@0	3074	This object controls access to the MultiMediaCard stack.
sl@0	3075	The DMMCSocket owns an instance of this class for the MultiMediaCard stack that it manages.
sl@0	3076
sl@0	3077	@publishedPartner
sl@0	3078	@released
sl@0	3079	*/
sl@0	3080	{
sl@0	3081	public:
sl@0	3082	/** extension interfaces Ids */
sl@0	3083	enum TInterfaceId
sl@0	3084	{
sl@0	3085	KInterfaceMachineInfo,
sl@0	3086	KInterfaceSwitchToLowVoltageSM,
sl@0	3087	KInterfaceSetBusWidth,
sl@0	3088	KInterfaceDemandPagingInfo,
sl@0	3089	KInterfaceCancelSession,
sl@0	3090	KInterfaceDoWakeUpSM
sl@0	3091	};
sl@0	3092
sl@0	3093	/** generic interface */
sl@0	3094	class MInterface
sl@0	3095	{
sl@0	3096	public:
sl@0	3097	virtual TInt Function() = 0;
sl@0	3098	};
sl@0	3099
sl@0	3100	/**
sl@0	3101	Demand paging support
sl@0	3102	@see KInterfaceDemandPagingInfo
sl@0	3103	*/
sl@0	3104	class TDemandPagingInfo
sl@0	3105	{
sl@0	3106	public:
sl@0	3107	const TInt* iPagingDriveList;
sl@0	3108	TInt iDriveCount;
sl@0	3109	TUint iPagingType;
sl@0	3110	TInt iReadShift;
sl@0	3111	TUint iNumPages;
sl@0	3112	TBool iWriteProtected;
sl@0	3113	TInt iSlotNumber;
sl@0	3114	TUint iSpare[2];
sl@0	3115	} ;
sl@0	3116	/**
sl@0	3117	* An optional interface implemented by the PSL for returning demand-paging information.
sl@0	3118	* @see KInterfaceDemandPagingInfo
sl@0	3119	*/
sl@0	3120	class MDemandPagingInfo
sl@0	3121	{
sl@0	3122	public:
sl@0	3123	virtual TInt DemandPagingInfo(TDemandPagingInfo& aInfo) = 0;
sl@0	3124	};
sl@0	3125
sl@0	3126	/**
sl@0	3127	* An optional interface State machine implemented by the PSL for handling asynchronous VccCore powerup
sl@0	3128	* @see KInterfaceDoWakeUpSM
sl@0	3129	*/
sl@0	3130	class MDoWakeUp
sl@0	3131	{
sl@0	3132	public:
sl@0	3133	virtual TMMCErr DoWakeUpSM()=0;
sl@0	3134	};
sl@0	3135
sl@0	3136
sl@0	3137	public:
sl@0	3138	IMPORT_C DMMCStack(TInt aBus, DMMCSocket* aSocket);
sl@0	3139	IMPORT_C virtual TInt Init();
sl@0	3140	//
sl@0	3141	// Actions
sl@0	3142	inline void ReportPowerUp();
sl@0	3143	inline void ReportPowerDown();
sl@0	3144	inline void Reset(); // Discard all requests and clear up
sl@0	3145	inline void CompleteAll(TMMCErr aCode); // Complete all operations with an error
sl@0	3146	inline void CancelSession(DMMCSession* aSession);
sl@0	3147
sl@0	3148	IMPORT_C void PowerUpStack();
sl@0	3149	IMPORT_C void PowerDownStack();
sl@0	3150	void QSleepStack();
sl@0	3151	IMPORT_C TInt Stop(TMMCard* aCardP);
sl@0	3152	//
sl@0	3153	// Inquiries
sl@0	3154	inline TUint MaxCardsInStack() const;
sl@0	3155	inline TMMCard* CardP(TUint aCardNumber);
sl@0	3156	inline DMMCSocket* MMCSocket() const;
sl@0	3157	inline TMMCPasswordStore* PasswordStore() const;
sl@0	3158	inline TBool InitStackInProgress() const;
sl@0	3159	inline TBool HasSessionsQueued() const;
sl@0	3160	inline TBool HasCardsPresent();
sl@0	3161	inline void BufferInfo(TUint8*& aBuf, TInt& aBufLen, TInt& aMinorBufLen);
sl@0	3162	inline TInt DemandPagingInfo(TDemandPagingInfo& aInfo);
sl@0	3163	inline TBool StackRunning() const;
sl@0	3164
sl@0	3165
sl@0	3166	#ifdef __EPOC32__
sl@0	3167
sl@0	3168	/**
sl@0	3169	Defines the period for the poll timer.
sl@0	3170
sl@0	3171	The poll timer is used by the generic layer for platforms
sl@0	3172	that do not provide an interrupt to indicate
sl@0	3173	when programming mode is finished.
sl@0	3174
sl@0	3175	@return The poll timer period, in milliseconds.
sl@0	3176	*/
sl@0	3177	virtual TInt ProgramPeriodInMilliSeconds() const =0;
sl@0	3178	#endif
sl@0	3179
sl@0	3180	/**
sl@0	3181	* Calculates the minimum range that must be read off a card, an optimisation that takes advantage
sl@0	3182	* of the partial read feature found on some cards. It takes the logical range that the media driver
sl@0	3183	* wants to read from the card, and increases it to take into account factors such as FIFO width and
sl@0	3184	* minimum DMA transfer size.
sl@0	3185	* @param aCard A pointer to the MMC Card
sl@0	3186	* @param aStart The required start position
sl@0	3187	* @param aEnd The required end position
sl@0	3188	* @param aPhysStart The adjusted start position
sl@0	3189	* @param aPhysEnd The adjusted end position
sl@0	3190	*/
sl@0	3191	virtual void AdjustPartialRead(const TMMCard* aCard, TUint32 aStart, TUint32 aEnd, TUint32* aPhysStart, TUint32* aPhysEnd) const =0;
sl@0	3192
sl@0	3193	/**
sl@0	3194	* Returns the details of the buffer allocated by the socket for data transfer operations. The buffer
sl@0	3195	* is allocated and configured at the variant layer to allow , for example, contiguous pages to be
sl@0	3196	* allocated for DMA transfers.
sl@0	3197	* @param aMDBuf A pointer to the allocated buffer
sl@0	3198	* @param aMDBufLen The length of the allocated buffer
sl@0	3199	*/
sl@0	3200	virtual void GetBufferInfo(TUint8** aMDBuf, TInt* aMDBufLen) =0;
sl@0	3201
sl@0	3202	/**
sl@0	3203	* Gets the platform specific configuration information.
sl@0	3204	* @see TMMCMachineInfo
sl@0	3205	*/
sl@0	3206	virtual void MachineInfo(TMMCMachineInfo& aMachineInfo) =0;
sl@0	3207
sl@0	3208	/**
sl@0	3209	* Creates the session object
sl@0	3210	*/
sl@0	3211	IMPORT_C virtual DMMCSession* AllocSession(const TMMCCallBack& aCallBack) const;
sl@0	3212
sl@0	3213	protected:
sl@0	3214	// Platform layer service
sl@0	3215	inline TMMCBusConfig& BusConfig();
sl@0	3216	inline TMMCBusConfig& MasterBusConfig();
sl@0	3217	inline DMMCSession& Session(); // Current session
sl@0	3218	inline TMMCCommandDesc& Command(); // Current command descriptor of current session
sl@0	3219	inline TMMCStateMachine& Machine(); // State machine of current session
sl@0	3220	inline void BlockCurrentSession(TUint32 aFlag);
sl@0	3221	inline void UnBlockCurrentSession(TUint32 aFlag, TMMCErr anExitCode);
sl@0	3222	inline void ReportInconsistentBusState();
sl@0	3223	inline void ReportASSPEngaged();
sl@0	3224	inline void ReportASSPDisengaged();
sl@0	3225	inline TRCA CurrentSessCardRCA(); // Checks that card is still ready - otherwise returns 0
sl@0	3226	inline void CurrentSessPushCmdStack();
sl@0	3227	inline void CurrentSessPopCmdStack();
sl@0	3228	inline void CurrentSessFillCmdDesc(TMMCCommandEnum aCommand);
sl@0	3229	inline void CurrentSessFillCmdDesc(TMMCCommandEnum aCommand,TMMCArgument anArgument);
sl@0	3230	inline void CurrentSessFillCmdArgs(TMMCArgument anArgument,TUint32 aLength,TUint8* aMemoryP,TUint32 aBlkLen);
sl@0	3231	inline TRCA SelectedCard() const;
sl@0	3232	inline void YieldStack(TMMCCommandTypeEnum aCommand);
sl@0	3233
sl@0	3234	void DoSetClock(TUint32 aClock);
sl@0	3235	void DoSetBusWidth(TUint32 aBusWidth);
sl@0	3236	TBusWidth BusWidthEncoding(TInt aBusWidth) const;
sl@0	3237	TUint MaxTranSpeedInKilohertz(const TMMCard& aCard) const;
sl@0	3238
sl@0	3239	// Stack service provided by platform/variant layer.
sl@0	3240
sl@0	3241	/**
sl@0	3242	* Returns the default master settings for the platform.
sl@0	3243	* @param aConfig A TMMCBusConfig reference to be filled in with the default settings.
sl@0	3244	* @param aClock The requested clock frequency (may be ignored if the hardware cannot support it).
sl@0	3245	*/
sl@0	3246	virtual void SetBusConfigDefaults(TMMCBusConfig& aConfig, TUint aClock)=0;
sl@0	3247
sl@0	3248	/**
sl@0	3249	* Switches from identification mode of operation to data transfer mode operation.
sl@0	3250	*
sl@0	3251	* Note that at this point the clock information in iBusConfig will not have been updated
sl@0	3252	* to the new data transfer rate. This function should generally just switch from open drain
sl@0	3253	* to push-pull bus mode - with the clock rate being changed at the start of IssueMMCCommandSM,
sl@0	3254	* where iBusConfig will be valid.
sl@0	3255	*/
sl@0	3256	virtual void InitClockOff()=0;
sl@0	3257
sl@0	3258	/**
sl@0	3259	* Stop all activities on the host stack.
sl@0	3260	*
sl@0	3261	* This will generally perform the same operations as for ASSPDisengage() but this will additionally
sl@0	3262	* turn off the clock to the hardware interface and release any requested power requirements made on
sl@0	3263	* the power model. (That is release any power requirements made as part of the InitClockOnSM() function).
sl@0	3264	*
sl@0	3265	* Called from the platform independent layer when it is required to immediately cancel any PSL asynchronous
sl@0	3266	* activity because the current session has been aborted.
sl@0	3267	*
sl@0	3268	* This function should normally include a call to ReportAsspDisengaged() at the end, to report to the PIL
sl@0	3269	* that the PSL level resources have been disengaged.
sl@0	3270	*/
sl@0	3271	virtual void ASSPReset()=0;
sl@0	3272
sl@0	3273	/**
sl@0	3274	* Called each time a session which has engaged PSL resources has completed or has been aborted.
sl@0	3275	*
sl@0	3276	* This should disable any activities which were required to perform the session just completed/aborted.
sl@0	3277	* It shouldn't however turn off the clock to the hardware interface (which will be turned off instead
sl@0	3278	* by the inactivity timer). This typically disables DMA and interface interrupts and forces the hardware
sl@0	3279	* interface into idle.
sl@0	3280	*
sl@0	3281	* This function should normally include a call to ReportAsspDisengaged() at the end, to report to the PIL
sl@0	3282	* that the PSL level resources have been disengaged.
sl@0	3283	*/
sl@0	3284	virtual void ASSPDisengage()=0;
sl@0	3285
sl@0	3286	/**
sl@0	3287	* Called as part of the bus power down sequence. It stops all activities on the host stack, turns off the clock
sl@0	3288	* to the hardware interface and releases any requested power requirements made on the power model
sl@0	3289	* (i.e. very often a straight call of ASSPReset()).
sl@0	3290	*
sl@0	3291	* This shouldn't turn off the MMC PSU as this will be performed immediately afterwards by the PSU class.
sl@0	3292	*/
sl@0	3293	virtual void DoPowerDown()=0;
sl@0	3294
sl@0	3295	IMPORT_C virtual TBool CardDetect(TUint aCardNumber);
sl@0	3296	IMPORT_C virtual TBool WriteProtected(TUint aCardNumber);
sl@0	3297	//
sl@0	3298	// State Machine functions implemented in platform layer.
sl@0	3299
sl@0	3300	/**
sl@0	3301	* Called as a child function at the start of the CIM_UPDATE_ACQ macro state machine.
sl@0	3302	*
sl@0	3303	* It should perform the necessary PSL level actions associated with powering up the bus. This includes
sl@0	3304	* turning on the MMC PSU. However, the hardware interface clock should not be turned on as part of this function.
sl@0	3305	*
sl@0	3306	* If the Controller has to request power resources from the power model (e.g a fast system clock required all the
sl@0	3307	* time the bus is powered) then this state machine function can be used to asynchronously wait for this resource
sl@0	3308	* to become available.
sl@0	3309	*
sl@0	3310	* Upon completion, DMMCStack::ReportPowerUp() should be called.
sl@0	3311	*
sl@0	3312	* @return KMMCErrNone if completed successfully or standard TMMCErr code otherwise
sl@0	3313	*/
sl@0	3314	virtual TMMCErr DoPowerUpSM()=0;
sl@0	3315
sl@0	3316	/**
sl@0	3317	* Turns on the clock to the hardware interface.
sl@0	3318	*
sl@0	3319	* This state machine function is called as a child function as part of the CIM_UPDATE_ACQ macro state machine.
sl@0	3320	*
sl@0	3321	* It is implemented as a state machine function since it may be necessary to include a short delay after the
sl@0	3322	* clock has been turned on to allow it to stabilise, or in some cases it may be necessary to wait for a power
sl@0	3323	* resource to become available.
sl@0	3324	*
sl@0	3325	* This function should normally include a call to ReportAsspEngaged() at the start, to report to the PIL that the PSL
sl@0	3326	* level resources have been engaged.
sl@0	3327	*
sl@0	3328	* @return KMMCErrNone if completed successfully or standard TMMCErr code otherwise
sl@0	3329	*/
sl@0	3330	virtual TMMCErr InitClockOnSM()=0;
sl@0	3331
sl@0	3332	/**
sl@0	3333	* Executes a single command over the bus.
sl@0	3334	*
sl@0	3335	* The input parameters are passed via the current command descriptor on the session's command stack
sl@0	3336	* (TMMCCommandDesc class), which specifies the type of command, response type, arguments etc..
sl@0	3337	*
sl@0	3338	* @return KMMCErrNone if completed successfully or standard TMMCErr code otherwise
sl@0	3339	*/
sl@0	3340	IMPORT_C virtual TMMCErr IssueMMCCommandSM()=0;
sl@0	3341
sl@0	3342	TBool StaticBlocks();
sl@0	3343
sl@0	3344	/**
sl@0	3345	* Indicates that the PSL should change the bus width.
sl@0	3346	* Must be implemented by the Platform Specific Layer if MMCV4 4/8-bit bus mode is required
sl@0	3347	*/
sl@0	3348	IMPORT_C virtual void SetBusWidth(TUint32 aBusWidth);
sl@0	3349
sl@0	3350	/**
sl@0	3351	* Retrieves a TMMCMachineInfoV4 from the PSL
sl@0	3352	* Must be implemented by the Platform Specific Layer if MMCV4 support is required
sl@0	3353	*/
sl@0	3354	public:
sl@0	3355	IMPORT_C virtual void MachineInfo(TDes8& aMachineInfo);
sl@0	3356
sl@0	3357	protected:
sl@0	3358	/**
sl@0	3359	* Switches the MMC bus to low voltage mode
sl@0	3360	*/
sl@0	3361	TMMCErr SwitchToLowVoltageSM();
sl@0	3362
sl@0	3363
sl@0	3364	private:
sl@0	3365	//
sl@0	3366	// Session service
sl@0	3367	void Add(DMMCSession* aSessP);
sl@0	3368	void Abort(DMMCSession* aSessP);
sl@0	3369	void Stop(DMMCSession* aSessP);
sl@0	3370	void UnlockStack(DMMCSession* aSessP);
sl@0	3371	void MarkComplete(DMMCSession* aSessP, TMMCErr anExitCode);
sl@0	3372	//
sl@0	3373	// Stack control and operations support
sl@0	3374	// Scheduler and its supplementary functions
sl@0	3375	enum TMMCStackSchedStateEnum
sl@0	3376	{
sl@0	3377	ESchedContinue=0,
sl@0	3378	ESchedLoop=1,
sl@0	3379	ESchedExit,
sl@0	3380	ESchedChooseJob
sl@0	3381	};
sl@0	3382	void Scheduler(volatile TBool& aFlag);
sl@0	3383	void DoSchedule();
sl@0	3384	TMMCStackSchedStateEnum SchedGetOnDFC();
sl@0	3385	void SchedSetContext(DMMCSession* aSessP);
sl@0	3386	void SchedDoAbort(DMMCSession* aSessP);
sl@0	3387	TMMCStackSchedStateEnum SchedResolveStatBlocks(DMMCSession* aSessP);
sl@0	3388	TMMCStackSchedStateEnum SchedGroundDown(DMMCSession* aSessP, TMMCErr aReason);
sl@0	3389	TMMCStackSchedStateEnum SchedEnqueStackSession(TMMCSessionTypeEnum aSessID);
sl@0	3390	void SchedGrabEntries();
sl@0	3391	void SchedDisengage();
sl@0	3392	TBool SchedAllowDirectCommands(DMMCSession* aSessP);
sl@0	3393	TBool SchedYielding(DMMCSession* aSessP);
sl@0	3394	inline TMMCStackSchedStateEnum SchedAbortPass();
sl@0	3395	inline TMMCStackSchedStateEnum SchedCompletionPass();
sl@0	3396	inline TMMCStackSchedStateEnum SchedInitStack();
sl@0	3397	inline TMMCStackSchedStateEnum SchedSleepStack();
sl@0	3398	inline TBool SchedPreemptable();
sl@0	3399	inline TMMCStackSchedStateEnum SchedSession();
sl@0	3400	inline TMMCStackSchedStateEnum SchedChooseJob();
sl@0	3401	//
sl@0	3402	// Miscellaneous SM function service
sl@0	3403	protected:
sl@0	3404	void MergeConfig(DMMCSession* aSessP);
sl@0	3405	private:
sl@0	3406	inline void DeselectsToIssue(TUint aNumber);
sl@0	3407
sl@0	3408	// Static Completion routines.
sl@0	3409	static void StackDFC(TAny* aStackP);
sl@0	3410	static void StackSessionCBST(TAny* aStackP);
sl@0	3411	TInt StackSessionCB();
sl@0	3412	static void AutoUnlockCBST(TAny *aStackP);
sl@0	3413	TInt AutoUnlockCB();
sl@0	3414
sl@0	3415	protected:
sl@0	3416	IMPORT_C void Block(DMMCSession* aSessP, TUint32 aFlag);
sl@0	3417	IMPORT_C void UnBlock(DMMCSession* aSessP, TUint32 aFlag, TMMCErr anExitCode);
sl@0	3418
sl@0	3419	protected:
sl@0	3420	// State machines. The adapter functions just call the non-static versions.
sl@0	3421	// Top-level state machines.
sl@0	3422	static TMMCErr NakedSessionSMST(TAny* aStackP); // ECIMNakedSession
sl@0	3423	inline TMMCErr NakedSessionSM();
sl@0	3424	static TMMCErr CIMUpdateAcqSMST(TAny* aStackP); // ECIMUpdateAcq
sl@0	3425	TMMCErr CIMUpdateAcqSM();
sl@0	3426	static TMMCErr CIMInitStackSMST(TAny* aStackP); // ECIMInitStack
sl@0	3427	inline TMMCErr CIMInitStackSM();
sl@0	3428	static TMMCErr CIMCheckStackSMST(TAny* aStackP); // ECIMCheckStack
sl@0	3429	inline TMMCErr CIMCheckStackSM();
sl@0	3430	static TMMCErr CIMSetupCardSMST(TAny* aStackP); // ECIMSetupCard
sl@0	3431	inline TMMCErr CIMSetupCardSM();
sl@0	3432	IMPORT_C static TMMCErr CIMReadWriteBlocksSMST(TAny* aStackP); // ECIMReadBlock, ECIMWriteBlock, ECIMReadMBlock, ECIMWriteMBlock
sl@0	3433	IMPORT_C virtual TMMCErr CIMReadWriteBlocksSM();
sl@0	3434	static TMMCErr CIMEraseSMST(TAny* aStackP); // ECIMEraseSector, ECIMEraseGroup
sl@0	3435	inline TMMCErr CIMEraseSM();
sl@0	3436	static TMMCErr CIMReadWriteIOSMST(TAny* aStackP); // ECIMReadIO, ECIMWriteIO
sl@0	3437	inline TMMCErr CIMReadWriteIOSM();
sl@0	3438	static TMMCErr CIMLockUnlockSMST(TAny *aStackP); // ECIMLockUnlock
sl@0	3439	inline TMMCErr CIMLockUnlockSM();
sl@0	3440	static TMMCErr NoSessionSMST(TAny* aStackP); // ECIMLockStack
sl@0	3441	inline TMMCErr NoSessionSM();
sl@0	3442	static TMMCErr AcquireStackSMST(TAny* aStackP);
sl@0	3443	IMPORT_C virtual TMMCErr AcquireStackSM();
sl@0	3444	static TMMCErr CheckStackSMST(TAny* aStackP); // ECIMCheckStack
sl@0	3445	inline TMMCErr CheckStackSM();
sl@0	3446	static TMMCErr CheckLockStatusSMST(TAny* aStackP);
sl@0	3447	inline TMMCErr CheckLockStatusSM();
sl@0	3448	static TMMCErr ModifyCardCapabilitySMST(TAny* aStackP);
sl@0	3449	IMPORT_C virtual TMMCErr ModifyCardCapabilitySM();
sl@0	3450	static TMMCErr BaseModifyCardCapabilitySMST(TAny* aStackP);
sl@0	3451	static TMMCErr DoPowerUpSMST(TAny* aStackP);
sl@0	3452	static TMMCErr InitClockOnSMST(TAny* aStackP);
sl@0	3453	IMPORT_C static TMMCErr IssueMMCCommandSMST(TAny* aStackP);
sl@0	3454
sl@0	3455	static TMMCErr CIMAutoUnlockSMST(TAny* aStackP);
sl@0	3456	inline TMMCErr CIMAutoUnlockSM();
sl@0	3457
sl@0	3458	static TMMCErr InitStackAfterUnlockSMST(TAny* aStackP); // ECIMInitStackAfterUnlock
sl@0	3459	IMPORT_C virtual TMMCErr InitStackAfterUnlockSM();
sl@0	3460
sl@0	3461	static TMMCErr InitCurrentCardAfterUnlockSMST(TAny* aStackP);
sl@0	3462
sl@0	3463	static TMMCErr AttachCardSMST(TAny* aStackP);
sl@0	3464	inline TMMCErr AttachCardSM();
sl@0	3465	static TMMCErr ExecCommandSMST(TAny* aStackP);
sl@0	3466	inline TMMCErr ExecCommandSM();
sl@0	3467	static TMMCErr IssueCommandCheckResponseSMST(TAny* aStackP);
sl@0	3468	inline TMMCErr IssueCommandCheckResponseSM();
sl@0	3469	static TMMCErr PollGapTimerSMST(TAny* aStackP);
sl@0	3470	inline TMMCErr PollGapTimerSM();
sl@0	3471	static TMMCErr RetryGapTimerSMST(TAny* aStackP);
sl@0	3472	inline TMMCErr RetryGapTimerSM();
sl@0	3473	static TMMCErr ProgramTimerSMST(TAny *aStackP);
sl@0	3474	inline TMMCErr ProgramTimerSM();
sl@0	3475	static TMMCErr GoIdleSMST(TAny* aStackP);
sl@0	3476	inline TMMCErr GoIdleSM();
sl@0	3477
sl@0	3478	static TMMCErr SwitchToLowVoltageSMST(TAny* aStackP);
sl@0	3479
sl@0	3480	static TMMCErr DoWakeUpSMST(TAny* aStackP);
sl@0	3481
sl@0	3482
sl@0	3483	private:
sl@0	3484	static TMMCErr ConfigureHighSpeedSMST(TAny* aStackP);
sl@0	3485	inline TMMCErr ConfigureHighSpeedSM();
sl@0	3486
sl@0	3487	static TMMCErr DetermineBusWidthAndClockSMST(TAny* aStackP);
sl@0	3488	inline TMMCErr DetermineBusWidthAndClockSM();
sl@0	3489
sl@0	3490	static TMMCErr ExecSwitchCommandST(TAny* aStackP);
sl@0	3491	inline TMMCErr ExecSwitchCommand();
sl@0	3492
sl@0	3493	static TMMCErr ExecSleepCommandSMST(TAny* aStackP);
sl@0	3494	inline TMMCErr ExecSleepCommandSM();
sl@0	3495
sl@0	3496	static TMMCErr ExecAwakeCommandSMST(TAny* aStackP);
sl@0	3497	inline TMMCErr ExecAwakeCommandSM();
sl@0	3498
sl@0	3499	static TMMCErr LowVoltagePowerupTimerSMST(TAny *aStackP);
sl@0	3500	TMMCErr LowVoltagePowerupTimerSM();
sl@0	3501
sl@0	3502	static TMMCErr ExecBusTestSMST(TAny* aStackP);
sl@0	3503	inline TMMCErr ExecBusTestSM();
sl@0	3504
sl@0	3505	enum TBusWidthAndClock
sl@0	3506	{
sl@0	3507	E1Bit20Mhz = 0x0000,
sl@0	3508
sl@0	3509	E4Bits26Mhz = 0x0001,
sl@0	3510	E4Bits52Mhz = 0x0002,
sl@0	3511
sl@0	3512	E8Bits26Mhz = 0x0004,
sl@0	3513	E8Bits52Mhz = 0x0008,
sl@0	3514	};
sl@0	3515	enum TBusWidthAndClockMasks
sl@0	3516	{
sl@0	3517	E4BitMask = E4Bits26Mhz \| E4Bits52Mhz,
sl@0	3518	E8BitMask = E8Bits26Mhz \| E8Bits52Mhz,
sl@0	3519	E26MhzMask = E4Bits26Mhz \| E8Bits26Mhz,
sl@0	3520	E52MhzMask = E4Bits52Mhz \| E8Bits52Mhz
sl@0	3521	};
sl@0	3522
sl@0	3523	void DetermineBusWidthAndClock(const TMMCard& aCard, TBool aLowVoltage, TUint& aPowerClass, TBusWidthAndClock& aBusWidthAndClock);
sl@0	3524	TUint GetPowerClass(const TMMCard& aCard, TBusWidthAndClock aWidthAndClock, TBool aLowVoltage);
sl@0	3525
sl@0	3526
sl@0	3527	// ----------- Data Members -------------
sl@0	3528	private:
sl@0	3529	//
sl@0	3530	// Synchronous status, data structures and control info.
sl@0	3531	TUint32 iStackState;
sl@0	3532	TUint iInitContext; // Stack Initialiser pass number
sl@0	3533	DMMCSession* iLockingSessionP;
sl@0	3534	TMMCSessRing iWorkSet;
sl@0	3535	TMMCSessRing iReadyQueue;
sl@0	3536	TMMCSessRing iEntryQueue;
sl@0	3537	TDfc iStackDFC;
sl@0	3538	TRCA iSelectedCard;
sl@0	3539	DMMCSocket* iSocket;
sl@0	3540	DMMCSession* iStackSession;
sl@0	3541	DMMCSession iAutoUnlockSession;
sl@0	3542	TInt iAutoUnlockIndex; // index into iCards
sl@0	3543	protected:
sl@0	3544	TUint8* iPSLBuf;
sl@0	3545	private:
sl@0	3546	TInt iPSLBufLen;
sl@0	3547	TInt iMinorBufLen;
sl@0	3548	TUint8 iSpare[2];
sl@0	3549	TBool volatile iSleep;
sl@0	3550	DThread* iNotifierThread;
sl@0	3551	TRequestStatus* iNotifierReqStat;
sl@0	3552	enum TInitState {EISPending, EISDone};
sl@0	3553	TInitState iInitState;
sl@0	3554	//
sl@0	3555	// Stack and Scheduler control
sl@0	3556	// Asynchronous sheduler attention flags
sl@0	3557	TBool volatile iAttention; // There are ready sessions
sl@0	3558	TBool volatile iAbortReq; // There are sessions marked for abort
sl@0	3559	TBool volatile iCompReq; // There are sessions to complete
sl@0	3560	TBool volatile iInitialise; // Enforce InitStack (after enforced PowerDown)
sl@0	3561	TBool volatile iUpdate; // Enque InitStack into iWorkSet
sl@0	3562	// Other asynchronous flags
sl@0	3563	TBool volatile iPoweredUp;
sl@0	3564	TBool volatile iDFCRunning;
sl@0	3565	TBool volatile iAbortAll;
sl@0	3566	TMMCErr volatile iCompleteAllExitCode;
sl@0	3567	//
sl@0	3568	// Session context
sl@0	3569	protected:
sl@0	3570	DMMCSession* iSessionP;
sl@0	3571	private:
sl@0	3572	//
sl@0	3573	// Bus control
sl@0	3574	TDSR iCurrentDSR;
sl@0	3575	//
sl@0	3576	// Stack data structures and Session/StateMachine miscellaneous
sl@0	3577	TUint iDeselectsToIssue;
sl@0	3578	TInt iCxDeselectCount;
sl@0	3579	TUint8 iCMD42CmdByte;
sl@0	3580	TMediaPassword iMPTgt;
sl@0	3581	public:
sl@0	3582	IMPORT_C TUint32 EffectiveModes(const TMMCStackConfig& aClientConfig);
sl@0	3583	TUint32 iCurrentOpRange;
sl@0	3584	TInt iCxCardCount;
sl@0	3585	TInt iCxPollRetryCount;
sl@0	3586	TMMCStackConfig iConfig;
sl@0	3587	TUint iMaxCardsInStack;
sl@0	3588	TMMCRCAPool iRCAPool;
sl@0	3589	TMMCardArray* iCardArray;
sl@0	3590	TMMCStackConfig iMasterConfig;
sl@0	3591	friend class DMMCSocket;
sl@0	3592	friend class DMMCSession;
sl@0	3593	friend class TMMCardArray;
sl@0	3594
sl@0	3595	private:
sl@0	3596	//
sl@0	3597	// Dummy functions to maintain binary compatibility
sl@0	3598	IMPORT_C virtual void Dummy1();
sl@0	3599
sl@0	3600	protected:
sl@0	3601	/**
sl@0	3602	Gets an interface from a derived class
sl@0	3603	replaces reserved virtual Dummy4()
sl@0	3604	*/
sl@0	3605	IMPORT_C virtual void GetInterface(TInterfaceId aInterfaceId, MInterface*& aInterfacePtr);
sl@0	3606
sl@0	3607	private:
sl@0	3608	TBusWidthAndClock iBusWidthAndClock;
sl@0	3609	TInt iSelectedCardIndex;
sl@0	3610	//
sl@0	3611	// Reserved members to maintain binary compatibility
sl@0	3612	protected:
sl@0	3613	TBool iMultiplexedBus; // ETrue if cards are individually selectable. EFalse if stacked on a common bus.
sl@0	3614	private:
sl@0	3615	TMMCCommandTypeEnum iYieldCommandType;
sl@0	3616	TInt iReserved;
sl@0	3617
sl@0	3618	protected:
sl@0	3619	// Pointer to protected utility class which allows class to grow while maintining BC
sl@0	3620	// replaces fourth element of iReserved[]
sl@0	3621	class DBody;
sl@0	3622	friend class DBody;
sl@0	3623	DBody* iBody;
sl@0	3624	};
sl@0	3625
sl@0	3626
sl@0	3627
sl@0	3628
sl@0	3629	class TMMCMachineInfo
sl@0	3630	/**
sl@0	3631	Platform-specific configuration information for the
sl@0	3632	MultiMediaCard stack.
sl@0	3633
sl@0	3634	An object of this type is passed to the Variant implementation
sl@0	3635	of DMMCStack::MachineInfo(), which should fill the public data
sl@0	3636	members with appropriate information and values.
sl@0	3637
sl@0	3638	@publishedPartner
sl@0	3639	@released
sl@0	3640	*/
sl@0	3641	{
sl@0	3642
sl@0	3643	public:
sl@0	3644	enum THardwareConfig
sl@0	3645	{
sl@0	3646	/**
sl@0	3647	Set this bit in iFlags if hardware supports SPI mode (not currently supported - set this bit to zero)
sl@0	3648	*/
sl@0	3649	ESupportsSPIMode = 0x01,
sl@0	3650
sl@0	3651	/**
sl@0	3652	Set this bit in iFlags if the PSL is enabled for double-buffered data transfers
sl@0	3653	*/
sl@0	3654	ESupportsDoubleBuffering = 0x02,
sl@0	3655
sl@0	3656	/**
sl@0	3657	Set this bit in iFlags if the PSL supports response type R7
sl@0	3658	*/
sl@0	3659	ESupportsR7 = 0x04,
sl@0	3660
sl@0	3661	/**
sl@0	3662	Set this bit in iFlags if the hardware DMA controller utilises 8-Bit Addressing
sl@0	3663	*/
sl@0	3664	EDma8BitAddressing = 0x08,
sl@0	3665
sl@0	3666	/**
sl@0	3667	Set this bit in iFlags if the hardware DMA controller utilises 16-Bit Addressing
sl@0	3668	*/
sl@0	3669	EDma16BitAddressing = 0x10,
sl@0	3670
sl@0	3671	/**
sl@0	3672	Set this bit in iFlags if the hardware DMA controller utilises 32-Bit Addressing
sl@0	3673	*/
sl@0	3674	EDma32BitAddressing = 0x20,
sl@0	3675
sl@0	3676	/**
sl@0	3677	Set this bit in iFlags if the hardware DMA controller utilises 64-Bit Addressing
sl@0	3678	*/
sl@0	3679	EDma64BitAddressing = 0x40,
sl@0	3680
sl@0	3681	/**
sl@0	3682	Set this in iFlags if the hardware supports DMA and can cope with being given a physical address.
sl@0	3683	This also sets the ESupportsDoubleBuffering flag, physical addressing is dependent on
sl@0	3684	doublebuffering functionality.
sl@0	3685	@see ESupportsDoubleBuffering
sl@0	3686	@see KMMCCmdFlagPhysAddr flag
sl@0	3687	*/
sl@0	3688	ESupportsDMA = 0x082,
sl@0	3689
sl@0	3690	/**
sl@0	3691	Set this in iFlags if the hardware is unable to perform data transfers of more than 256K
sl@0	3692	- Transfers greater than 256K will be split into multiple transactions.
sl@0	3693	*/
sl@0	3694	EMaxTransferLength_256K = 0x100,
sl@0	3695
sl@0	3696	/**
sl@0	3697	Set this in iFlags if the hardware is unable to perform data transfers of more than 512K
sl@0	3698	- Transfers greater than 512K will be split into multiple transactions.
sl@0	3699	*/
sl@0	3700	EMaxTransferLength_512K = 0x200,
sl@0	3701
sl@0	3702	/**
sl@0	3703	Set this in iFlags if the hardware is unable to perform data transfers of more than 1M
sl@0	3704	- Transfers greater than 1M will be split into multiple transactions.
sl@0	3705	*/
sl@0	3706	EMaxTransferLength_1M = 0x300,
sl@0	3707
sl@0	3708	/**
sl@0	3709	Set this in iFlags if the hardware is unable to perform data transfers of more than 2M
sl@0	3710	- Transfers greater than 2M will be split into multiple transactions.
sl@0	3711	*/
sl@0	3712	EMaxTransferLength_2M = 0x400,
sl@0	3713
sl@0	3714	/**
sl@0	3715	Set this in iFlags if the hardware is unable to perform data transfers of more than 4M
sl@0	3716	- Transfers greater than 4M will be split into multiple transactions.
sl@0	3717	*/
sl@0	3718	EMaxTransferLength_4M = 0x500,
sl@0	3719
sl@0	3720	/**
sl@0	3721	Set this in iFlags if the hardware is unable to perform data transfers of more than 8M
sl@0	3722	- Transfers greater than 8M will be split into multiple transactions.
sl@0	3723	*/
sl@0	3724	EMaxTransferLength_8M = 0x600,
sl@0	3725
sl@0	3726	/**
sl@0	3727	Set this in iFlags if the hardware is unable to perform data transfers of more than 16M
sl@0	3728	- Transfers greater than 16M will be split into multiple transactions.
sl@0	3729	*/
sl@0	3730	EMaxTransferLength_16M = 0x700,
sl@0	3731
sl@0	3732	/**
sl@0	3733	The card in slot 1 is internal, i.e. not removable
sl@0	3734	*/
sl@0	3735	ESlot1Internal = 0x0800,
sl@0	3736
sl@0	3737	/**
sl@0	3738	The card in slot 2 is internal, i.e. not removable
sl@0	3739	*/
sl@0	3740	ESlot2Internal = 0x1000,
sl@0	3741	};
sl@0	3742
sl@0	3743	public:
sl@0	3744	/**
sl@0	3745	The total number of MultiMediaCard slots for this stack.
sl@0	3746
sl@0	3747	Be aware that this refers to the stack, and NOT to the platform;
sl@0	3748	a platform can have multiple stacks.
sl@0	3749	*/
sl@0	3750	TInt iTotalSockets;
sl@0	3751
sl@0	3752	/**
sl@0	3753	Not currently used.
sl@0	3754
sl@0	3755	Set this value to zero.
sl@0	3756	*/
sl@0	3757	TInt iTotalMediaChanges;
sl@0	3758
sl@0	3759	/**
sl@0	3760	Not currently used.
sl@0	3761
sl@0	3762	Set this value to zero.
sl@0	3763	*/
sl@0	3764	TInt iTotalPrimarySupplies;
sl@0	3765
sl@0	3766	union
sl@0	3767	{
sl@0	3768	/**
sl@0	3769	Indicates whether the SPI protocol is being used or not.
sl@0	3770
sl@0	3771	SPI not currently supported; set this to EFalse.
sl@0	3772	*/
sl@0	3773	TBool iSPIMode; // SPI mode not yet supported
sl@0	3774	/**
sl@0	3775	Hardware configuration flags
sl@0	3776	*/
sl@0	3777	TUint32 iFlags;
sl@0	3778	};
sl@0	3779
sl@0	3780	/**
sl@0	3781	The number of the first peripheral bus slot claimed by the
sl@0	3782	MultiMediaCard controller.
sl@0	3783
sl@0	3784	Symbian OS supports 4, so set this to a value in the range 0-3.
sl@0	3785	*/
sl@0	3786	TInt iBaseBusNumber;
sl@0	3787	};
sl@0	3788
sl@0	3789
sl@0	3790
sl@0	3791
sl@0	3792	typedef TPckg<TMMCMachineInfo> TMMCardMachineInfoPckg;
sl@0	3793
sl@0	3794	/**
sl@0	3795	Platform-specific configuration information for the
sl@0	3796	MultiMediaCard stack. Contains information pertinent to
sl@0	3797	MMC specification version 4.0/4.1
sl@0	3798
sl@0	3799	An object of this type is passed to the Variant implementation
sl@0	3800	of DMMCStack::MachineInfo(), which should fill the public data
sl@0	3801	members with appropriate information and values.
sl@0	3802
sl@0	3803	@internalComponent
sl@0	3804	*/
sl@0	3805	class TMMCMachineInfoV4 : public TMMCMachineInfo
sl@0	3806	{
sl@0	3807	public:
sl@0	3808	inline TMMCMachineInfoV4() {memclr(this, sizeof(*this));}
sl@0	3809
sl@0	3810	/**
sl@0	3811	The version of the structure returned by the PSL in a call to DMMStack::MachineInfo()
sl@0	3812	The fields defined in TMMCMachineInfoV4 are only valid if the version is EVersion4 or higher
sl@0	3813	*/
sl@0	3814	enum TVersion {EVersion3, EVersion4};
sl@0	3815	TVersion iVersion;
sl@0	3816
sl@0	3817	/**
sl@0	3818	The maximum bus width supported.
sl@0	3819	*/
sl@0	3820	TBusWidth iMaxBusWidth;
sl@0	3821
sl@0	3822	/**
sl@0	3823	Maximum clock frequency supported,
sl@0	3824	N.B. if the controller's maximum clock rate is only slightly less than one of the
sl@0	3825	"high-speed" clock frequencies defined in MMC spec 4.0 (i.e 26 Mhz and 52 Mhz), then
sl@0	3826	it can still report that it is supported and then run at the slightly lower clock rate.
sl@0	3827	*/
sl@0	3828	enum THighSpeedClocks {EClockSpeed26Mhz = 26, EClockSpeed52Mhz = 52};
sl@0	3829	TUint iMaxClockSpeedInMhz;
sl@0	3830
sl@0	3831	/**
sl@0	3832	The power class supported for 3.6V (high voltage).
sl@0	3833	This is a 4-bit value encoded in the same way as the POWER_CLASS field in the EXT_CSD
sl@0	3834	register. i.e. 0=100mA, 1=120mA, ... 10=450mA.
sl@0	3835	See MMC sepcification version 4.1, EXT_CSD register.
sl@0	3836	*/
sl@0	3837	enum THiVoltagePowerClasses {EHi100mA, EHi120mA, EHi150mA, EHi180mA, EHi200mA, EHi220mA, EHi250mA, EHi300mA, EHi350mA, EHi400mA, EHi450mA };
sl@0	3838	TUint iHighVoltagePowerClass;
sl@0	3839
sl@0	3840	/**
sl@0	3841	The power class supported for 1.95V (low voltage).
sl@0	3842	This is a 4-bit value encoded in the same way as the POWER_CLASS field in the EXT_CSD
sl@0	3843	register. i.e. 0=65mA, 1=70mA, ... 10=250mA.
sl@0	3844	See MMC sepcification version 4.1, EXT_CSD register.
sl@0	3845	*/
sl@0	3846	enum TLoVoltagePowerClasses {ELo065mA, ELo070mA, ELo080mA, ELo090mA, ELo100mA, ELo120mA, ELo140mA, ELo160mA, ELo180mA, ELo200mA, ELo250mA };
sl@0	3847	TUint iLowVoltagePowerClass;
sl@0	3848	};
sl@0	3849
sl@0	3850
sl@0	3851	class DMMCPsu : public DPBusPsuBase
sl@0	3852	/**
sl@0	3853	DPBusPsuBase derived abstract class to control the MMC socket's power supply.
sl@0	3854
sl@0	3855	This class is intended for derivation at the variant layer, which handles the
sl@0	3856	variant specific functionality of the power supply.
sl@0	3857
sl@0	3858	@publishedPartner
sl@0	3859	@released
sl@0	3860	*/
sl@0	3861	{
sl@0	3862	public:
sl@0	3863	IMPORT_C DMMCPsu(TInt aPsuNum, TInt aMediaChangedNum);
sl@0	3864
sl@0	3865	// Re-declaring virtual and pure-virtual interface defined in DPBusPsuBase for clarity...
sl@0	3866
sl@0	3867	IMPORT_C virtual TInt DoCreate();
sl@0	3868
sl@0	3869	/**
sl@0	3870	* Controls the power supply.
sl@0	3871	* Implemented by the variant, directly controls the power to the MMC stack.
sl@0	3872	* @param aState A TPBusPsuState enumeration specifying the required state
sl@0	3873	* (EPsuOnFull, EPsuOff, EPsuOnCurLimit)
sl@0	3874	*/
sl@0	3875	virtual void DoSetState(TPBusPsuState aState)=0;
sl@0	3876
sl@0	3877	/**
sl@0	3878	* Checks the PSU's voltage.
sl@0	3879	* Implemented by the variant, uses a mechanism such as a comparator to check
sl@0	3880	* the PSU's voltage level. Upon reciept of the voltage level (the process may
sl@0	3881	* be asynchronous), the variant calls ReceiveVoltageCheckResult() with KErrNone
sl@0	3882	* if the voltage is OK, KErrGeneral if there is a problem, or KErrNotReady if the
sl@0	3883	* hardware has not yet powered up.
sl@0	3884	*/
sl@0	3885	virtual void DoCheckVoltage()=0;
sl@0	3886
sl@0	3887	/**
sl@0	3888	* Fills in the supplied TPBusPsuInfo object with the characteristics of the platform.
sl@0	3889	* Provided at the variant layer.
sl@0	3890	* @param anInfo A reference to a TPBusPsuInfo to be filled in with the PSU characteristics.
sl@0	3891	*/
sl@0	3892	virtual void PsuInfo(TPBusPsuInfo &anInfo)=0;
sl@0	3893
sl@0	3894	inline void SetVoltage(TUint32 aVoltage);
sl@0	3895
sl@0	3896	static void SleepCheck(TAny* aPtr);
sl@0	3897
sl@0	3898	protected:
sl@0	3899	/**
sl@0	3900	* The current voltage setting, in OCR register format
sl@0	3901	*/
sl@0	3902	TUint32 iVoltageSetting;
sl@0	3903	};
sl@0	3904
sl@0	3905	class DMMCMediaChange : public DMediaChangeBase
sl@0	3906	/**
sl@0	3907	DMediaChangeBase derived abstract class to handle the isertion and removal of removable media.
sl@0	3908
sl@0	3909	This class is intended for derivation at the variant layer, which handles the variant specific
sl@0	3910	functionality such as interrupt detection, and calls functions of the DMediaChangeBase class
sl@0	3911	to pass notifications of media change to the socket layers.
sl@0	3912
sl@0	3913	@publishedPartner
sl@0	3914	@released
sl@0	3915	*/
sl@0	3916	{
sl@0	3917	public:
sl@0	3918	IMPORT_C DMMCMediaChange(TInt aMediaChangeNum);
sl@0	3919
sl@0	3920	// Re-declaring virtual and pure-virtual interface defined in DMediaChangeBase for clarity...
sl@0	3921
sl@0	3922	IMPORT_C virtual TInt Create();
sl@0	3923
sl@0	3924	/**
sl@0	3925	* Forces a media change, executing the same actions as if a door open has occurred.
sl@0	3926	* @see DoDoorOpen
sl@0	3927	*/
sl@0	3928	virtual void ForceMediaChange()=0;
sl@0	3929
sl@0	3930	/**
sl@0	3931	* Called by DMediaChangeBase when the door is opened.
sl@0	3932	* Implemented at the variant layer, DoDoorOpen is invoked in response to the variant
sl@0	3933	* calling ::DoDoorOpenService upon detection of a door open event.
sl@0	3934	* DoDoorOpen may queue a debounce timer which masks further events until it expires.
sl@0	3935	* @see DoDoorClosed
sl@0	3936	*/
sl@0	3937	virtual void DoDoorOpen()=0;
sl@0	3938
sl@0	3939	/**
sl@0	3940	* Called by DMediaChangeBase when the door is closed.
sl@0	3941	* Implemented at the variant layer, DoDoorClosed is invoked in response to the variant
sl@0	3942	* calling ::DoorOpenService upon detection of a door closed event.
sl@0	3943	* Systems without a door should perform this sequence when the debounce timer has
sl@0	3944	* expired after a door open event has been detected.
sl@0	3945	* @see DoDoorOpen
sl@0	3946	*/
sl@0	3947	virtual void DoDoorClosed()=0;
sl@0	3948
sl@0	3949	/**
sl@0	3950	* Returns the current state of the door.
sl@0	3951	* Implemented at the variant layer to provide information as to the state of the door.
sl@0	3952	* @return TMediaState enumeration descibing the state of door (EDoorOpen, EDoorClosed).
sl@0	3953	*/
sl@0	3954	virtual TMediaState MediaState() = 0;
sl@0	3955	};
sl@0	3956
sl@0	3957
sl@0	3958	/===========================================================================/
sl@0	3959	/* CLASS : DMMCEmbeddedMediaChange */
sl@0	3960	/===========================================================================/
sl@0	3961	NONSHARABLE_CLASS(DMMCEmbeddedMediaChange) : public DMMCMediaChange
sl@0	3962	/**
sl@0	3963	* This class looks after the processing to be carried out when the media door
sl@0	3964	* is opened or closed. It may be queried without the interrupt being enabled.
sl@0	3965	*
sl@0	3966	*/
sl@0	3967	{
sl@0	3968	public:
sl@0	3969	DMMCEmbeddedMediaChange(TInt aMediaChangeNum) : DMMCMediaChange(aMediaChangeNum){};
sl@0	3970
sl@0	3971	/// Directly calls the media change event
sl@0	3972	virtual void ForceMediaChange() {return;};
sl@0	3973
sl@0	3974	/// Handle media door open (called on media door open interrupt).
sl@0	3975	virtual void DoDoorOpen() {return;};
sl@0	3976
sl@0	3977	/// Handle media door closing (called on media door open interrupt).
sl@0	3978	virtual void DoDoorClosed() {return;};
sl@0	3979
sl@0	3980	/// Return status of media changed signal.
sl@0	3981	virtual TMediaState MediaState() {return EDoorClosed;};
sl@0	3982	};
sl@0	3983
sl@0	3984
sl@0	3985
sl@0	3986	class TMapping
sl@0	3987	/**
sl@0	3988	MMC Mapping
sl@0	3989	*/
sl@0	3990	{
sl@0	3991	public:
sl@0	3992	TBuf8<KMMCCIDLength> iCID;
sl@0	3993	TMediaPassword iPWD;
sl@0	3994	enum TState {EStPending, EStValid, EStInvalid};
sl@0	3995	TState iState;
sl@0	3996	};
sl@0	3997
sl@0	3998	NONSHARABLE_CLASS(TMMCPasswordStore) : public TPasswordStore
sl@0	3999	/**
sl@0	4000	MMC Password Store
sl@0	4001	*/
sl@0	4002	{
sl@0	4003	public:
sl@0	4004	TMMCPasswordStore();
sl@0	4005
sl@0	4006	// Pure virtual...
sl@0	4007	TInt Init();
sl@0	4008	TInt ReadPasswordData(TDes8 &aBuf);
sl@0	4009	TInt WritePasswordData(TDesC8 &aBuf);
sl@0	4010	TInt PasswordStoreLengthInBytes();
sl@0	4011
sl@0	4012	public:
sl@0	4013	TMapping *FindMappingInStore(const TCID &aCID);
sl@0	4014	TInt InsertMapping(const TCID &aCID, const TMediaPassword &aPWD, TMapping::TState aState);
sl@0	4015	IMPORT_C TBool IsMappingIncorrect(const TCID& aCID, const TMediaPassword& aPWD);
sl@0	4016
sl@0	4017	static TInt CompareCID(const TMapping& aLeft, const TMapping& aRight);
sl@0	4018	TIdentityRelation<TMapping> iIdentityRelation;
sl@0	4019
sl@0	4020	private:
sl@0	4021	RArray<TMapping> *iStore;
sl@0	4022
sl@0	4023	friend class DMMCSocket;
sl@0	4024	};
sl@0	4025
sl@0	4026	class DMMCSocket : public DPBusSocket
sl@0	4027	/**
sl@0	4028	This DPBusSocket derived object oversees the power supplies
sl@0	4029	and media change functionality of DMMCStack Objects. A socket
sl@0	4030	directly corresponds to a single stack, which may support multiple cards.
sl@0	4031
sl@0	4032	@publishedPartner
sl@0	4033	@released
sl@0	4034	*/
sl@0	4035	{
sl@0	4036	public:
sl@0	4037	IMPORT_C DMMCSocket(TInt aSocketNumber, TMMCPasswordStore* aPasswordStore);
sl@0	4038
sl@0	4039	// Functions inherited from DPBusSocket
sl@0	4040	virtual TInt Init();
sl@0	4041	virtual void InitiatePowerUpSequence();
sl@0	4042	virtual TBool CardIsPresent();
sl@0	4043	virtual void Reset1();
sl@0	4044	virtual void Reset2();
sl@0	4045
sl@0	4046	TInt TotalSupportedCards();
sl@0	4047
sl@0	4048	// MMC specific functions
sl@0	4049	inline DMMCStack* Stack(TInt aBus);
sl@0	4050	inline void ResetInactivity(TInt aBus);
sl@0	4051	inline const TMMCMachineInfo& MachineInfo() const;
sl@0	4052
sl@0	4053	virtual void AdjustPartialRead(const TMMCard* aCard, TUint32 aStart, TUint32 aEnd, TUint32* aPhysStart, TUint32* aPhysEnd) const;
sl@0	4054	virtual void GetBufferInfo(TUint8** aMDBuf, TInt* aMDBufLen);
sl@0	4055	virtual TInt PrepareStore(TInt aBus, TInt aFunc, TLocalDrivePasswordData &aData);
sl@0	4056
sl@0	4057	inline TBool SupportsDoubleBuffering();
sl@0	4058	inline TUint32 MaxDataTransferLength();
sl@0	4059	inline TUint32 DmaAlignment();
sl@0	4060
sl@0	4061	protected:
sl@0	4062	// MMC specific functions
sl@0	4063	virtual void GetMachineInfo();
sl@0	4064
sl@0	4065	private:
sl@0	4066	// Password Store Control Functions
sl@0	4067	TInt PasswordControlStart(const TCID &aCID, const TMediaPassword *aPWD);
sl@0	4068	void PasswordControlEnd(DMMCSession *aSessP, TInt aResult);
sl@0	4069	TBool RefreshStore();
sl@0	4070
sl@0	4071	protected:
sl@0	4072	TMMCMachineInfo iMachineInfo;
sl@0	4073	TMMCPasswordStore* iPasswordStore;
sl@0	4074
sl@0	4075	public:
sl@0	4076	DMMCStack* iStack;
sl@0	4077	DMMCPsu* iVccCore;
sl@0	4078
sl@0	4079	private:
sl@0	4080	TUint32 iReserved[4];
sl@0	4081
sl@0	4082	public:
sl@0	4083	enum TMMCPanic
sl@0	4084	{
sl@0	4085	EMMCMachineStack =0,
sl@0	4086	EMMCMachineState =1,
sl@0	4087	EMMCSessRingNoSession =2,
sl@0	4088	EMMCStackSessionEngaged =3,
sl@0	4089	EMMCInitStackBlocked =4,
sl@0	4090	EMMCNoFreeRCA =5,
sl@0	4091	EMMCCommandStack =6,
sl@0	4092	EMMCRWSessionID =7,
sl@0	4093	EMMCEraseSessionID =8,
sl@0	4094	EMMCIOSessionID =9,
sl@0	4095	EMMCSessionNoPswdCard =10,
sl@0	4096	EMMCSessionPswdCmd =11,
sl@0	4097	EMMCSessionBadSessionID =12,
sl@0	4098	EMMCSetBusWidthNotImplemented =13,
sl@0	4099	EMMCInvalidNumberOfCardSlots =14,
sl@0	4100	EMMCBadBusWidth =15,
sl@0	4101	EMMCInvalidDBCommand =16,
sl@0	4102	EMMCInvalidDBBlockLength =17,
sl@0	4103	EMMCUnblockingInWrongContext =18,
sl@0	4104	EMMCInvalidCardNumber =19,
sl@0	4105	EMMCNotInDfcContext =20,
sl@0	4106	};
sl@0	4107	IMPORT_C static void Panic(TMMCPanic aPanic);
sl@0	4108	friend class DMMCStack;
sl@0	4109	friend class DMMCSession;
sl@0	4110	friend class DMMCMediaChange;
sl@0	4111	};
sl@0	4112
sl@0	4113	const TUint32 KMMCEraseClassCmdsSupported= KBit0;
sl@0	4114	const TUint32 KMMCEraseGroupCmdsSupported= KBit1;
sl@0	4115	NONSHARABLE_CLASS(TMMCEraseInfo)
sl@0	4116	{
sl@0	4117	public:
sl@0	4118	inline TBool EraseClassCmdsSupported() const;
sl@0	4119	inline TBool EraseGroupCmdsSupported() const;
sl@0	4120	public:
sl@0	4121	TUint32 iEraseFlags;
sl@0	4122	TUint32 iPreferredEraseUnitSize;
sl@0	4123	TUint32 iMinEraseSectorSize;
sl@0	4124	};
sl@0	4125
sl@0	4126	#include <drivers/mmc.inl>
sl@0	4127
sl@0	4128	#endif // __MMC_H__
sl@0	4129

author	sl
	Tue, 10 Jun 2014 14:32:02 +0200
changeset 1	260cb5ec6c19
permissions	-rw-r--r--