os/kernelhwsrv/kernel/eka/drivers/debug/rmdebug/d_rmd_stepping.h
author sl
Tue, 10 Jun 2014 14:32:02 +0200
changeset 1 260cb5ec6c19
permissions -rw-r--r--
Update contrib.
sl@0
     1
// Copyright (c) 2004-2009 Nokia Corporation and/or its subsidiary(-ies).
sl@0
     2
// All rights reserved.
sl@0
     3
// This component and the accompanying materials are made available
sl@0
     4
// under the terms of the License "Eclipse Public License v1.0"
sl@0
     5
// which accompanies this distribution, and is available
sl@0
     6
// at the URL "http://www.eclipse.org/legal/epl-v10.html".
sl@0
     7
//
sl@0
     8
// Initial Contributors:
sl@0
     9
// Nokia Corporation - initial contribution.
sl@0
    10
//
sl@0
    11
// Contributors:
sl@0
    12
//
sl@0
    13
// Description:
sl@0
    14
//
sl@0
    15
sl@0
    16
#ifndef D_RMD_STEPPING_H
sl@0
    17
#define D_RMD_STEPPING_H
sl@0
    18
sl@0
    19
// fwd declaration of DRM_DebugChannel
sl@0
    20
class DRM_DebugChannel;
sl@0
    21
sl@0
    22
// extracted from rm_debug_kerneldriver.h
sl@0
    23
// Register definitions
sl@0
    24
#define SP_REGISTER			13
sl@0
    25
#define LINK_REGISTER		14
sl@0
    26
#define PC_REGISTER			15
sl@0
    27
#define STATUS_REGISTER		16
sl@0
    28
sl@0
    29
class DRMDStepping : public DBase
sl@0
    30
{
sl@0
    31
public:
sl@0
    32
	// ctor
sl@0
    33
	DRMDStepping(DRM_DebugChannel* aChannel);
sl@0
    34
sl@0
    35
	// dtor
sl@0
    36
	~DRMDStepping();
sl@0
    37
sl@0
    38
	// extracted from rm_debug_kerneldriver.cpp
sl@0
    39
	TBool IsExecuted(TUint8 aCondition, TUint32 aStatusRegister);
sl@0
    40
	TBool IsPreviousInstructionMovePCToLR(DThread *aThread);
sl@0
    41
	void DecodeDataProcessingInstruction(TUint8 aOpcode, TUint32 aOp1, TUint32 aOp2, TUint32 aStatusRegister, TUint32 &aBreakAddress);
sl@0
    42
	TUint32 PCAfterInstructionExecutes(DThread *aThread, TUint32 aCurrentPC, TUint32 aStatusRegister, TInt aInstSize, TUint32 &aNewRangeEnd, TBool &aChangingModes);
sl@0
    43
	TUint32 ShiftedRegValue(DThread *aThread, TUint32 aInstruction, TUint32 aCurrentPC, TUint32 aStatusRegister);
sl@0
    44
	TInt ModifyBreaksForStep(DThread *aThread, TUint32 aRangeStart, TUint32 aRangeEnd,TBool aResumeOnceOutOfRange, TBool aCheckForStubs, const TUint32 aNumSteps);
sl@0
    45
sl@0
    46
private:
sl@0
    47
sl@0
    48
	// Needed to access private data until re-structuring work is complete.
sl@0
    49
	friend class DRM_DebugChannel;
sl@0
    50
sl@0
    51
	DRM_DebugChannel* iChannel;	// temporary reference back to DRM_DebugChannel to help with refactoring
sl@0
    52
sl@0
    53
	// Set of inline functions for decoding instructions. Formerly these were all macros
sl@0
    54
sl@0
    55
	// ARM instruction bitmasks
sl@0
    56
	inline TUint32 arm_opcode(const TUint32 aInst);
sl@0
    57
sl@0
    58
	// Generic instruction defines
sl@0
    59
	inline TUint32 arm_rm(const TUint32 aInst);
sl@0
    60
	inline TUint32 arm_rs(const TUint32 aInst);
sl@0
    61
	inline TUint32 arm_rd(const TUint32 aInst);
sl@0
    62
	inline TUint32 arm_rn(const TUint32 aInst);
sl@0
    63
	inline TUint32 arm_load(const TUint32 aInst);
sl@0
    64
sl@0
    65
	// Data processing instruction defines
sl@0
    66
	inline TUint32 arm_data_shift(const TUint32 aInst);
sl@0
    67
	inline TUint32 arm_data_c(const TUint32 aInst);
sl@0
    68
	inline TUint32 arm_data_imm(const TUint32 aInst);
sl@0
    69
	inline TUint32 arm_data_rot(const TUint32 aInst);
sl@0
    70
sl@0
    71
	// Single date transfer instruction defines
sl@0
    72
	inline TUint32 arm_single_imm(const TUint32 aInst);
sl@0
    73
	inline TUint32 arm_single_byte(const TUint32 aInst);
sl@0
    74
	inline TUint32 arm_single_u(const TUint32 aInst);
sl@0
    75
	inline TUint32 arm_single_pre(const TUint32 aInst);
sl@0
    76
sl@0
    77
	// Block data transfer instruction defines
sl@0
    78
	inline TUint32 arm_block_reglist(const TUint32 aInst);
sl@0
    79
	inline TUint32 arm_block_u(const TUint32 aInst);
sl@0
    80
	inline TUint32 arm_block_pre(const TUint32 aInst);
sl@0
    81
sl@0
    82
	// Branch instruction defines
sl@0
    83
	inline TUint32 arm_b_addr(const TUint32 aInst);
sl@0
    84
	inline TUint32 arm_instr_b_dest(const TUint32 aInst, TUint32& aAddr);
sl@0
    85
	inline TUint32 thumb_b_addr(const TUint32 aInst);
sl@0
    86
	inline TUint32 thumb_instr_b_dest(const TUint32 aInst, TUint32& aAddr);
sl@0
    87
	inline TUint32 arm_carry_bit(void);
sl@0
    88
	
sl@0
    89
sl@0
    90
	// Thumb instruction bitmasks
sl@0
    91
	inline TUint16 thumb_opcode(const TUint16 aInst);
sl@0
    92
	inline TUint16 thumb_inst_7_15(const TUint16 aInst);
sl@0
    93
	inline TUint16 thumb_inst_8_15(const TUint16 aInst);
sl@0
    94
sl@0
    95
	// Thumb2 decode support functions
sl@0
    96
	inline TUint16 t2opcode16(const TUint16 aInst);
sl@0
    97
sl@0
    98
	inline TUint16 t2opcode16special(const TUint16 aInst);
sl@0
    99
sl@0
   100
	// Helper functions
sl@0
   101
	TInt CurrentPC(DThread* aThread, TUint32& aPC);
sl@0
   102
sl@0
   103
	TInt CurrentCPSR(DThread* aThread, TUint32& aCPSR);	
sl@0
   104
sl@0
   105
	TInt CurrentInstruction(DThread* aThread, TUint32& aInstruction);
sl@0
   106
sl@0
   107
	TInt CurrentArchMode(const TUint32 cpsr, Debug::TArchitectureMode& mode);
sl@0
   108
sl@0
   109
	TInt RegisterValue(DThread *aThread, const TUint32 aKernelRegisterId, TUint32 &aValue);
sl@0
   110
sl@0
   111
	TInt ReadMem32(DThread* aThread, const TUint32 aAddress, TUint32& aValue);
sl@0
   112
sl@0
   113
	TInt ReadMem16(DThread* aThread, const TUint32 aAddress, TUint16& aValue);
sl@0
   114
sl@0
   115
	TInt ReadMem8(DThread* aThread, const TUint32 aAddress, TUint8& aValue);
sl@0
   116
sl@0
   117
	inline TUint32 BitCount(const TUint32 aVal);
sl@0
   118
sl@0
   119
	inline TUint32 IsBitSet(const TUint32 aBitset, const TUint8 aBitNum);
sl@0
   120
};
sl@0
   121
sl@0
   122
#include "d_rmd_stepping.inl"
sl@0
   123
sl@0
   124
#endif	// D_RMD_STEPPPING_H
sl@0
   125
sl@0
   126
// End of file - d-rmd-stepping.h