os/kernelhwsrv/kernel/eka/common/arm/cdes8.cia
author sl
Tue, 10 Jun 2014 14:32:02 +0200
changeset 1 260cb5ec6c19
permissions -rw-r--r--
Update contrib.
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// Copyright (c) 1997-2009 Nokia Corporation and/or its subsidiary(-ies).
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// All rights reserved.
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// This component and the accompanying materials are made available
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// under the terms of the License "Eclipse Public License v1.0"
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// which accompanies this distribution, and is available
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// at the URL "http://www.eclipse.org/legal/epl-v10.html".
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//
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// Initial Contributors:
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// Nokia Corporation - initial contribution.
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//
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// Contributors:
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//
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// Description:
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// e32\common\arm\cdes8.cia
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// 
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//
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#include <e32cia.h>
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#include "../common.h"
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#define __FIXED_POINT_64BIT_DIV10__
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#if defined(__DES8_MACHINE_CODED__) || defined(__EABI__)
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GLREF_C void Des8PanicBadDesType();
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GLREF_C void Des8PanicPosOutOfRange();
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#endif
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#ifdef __DES8_MACHINE_CODED__
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GLREF_C void Des8PanicLengthNegative();
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GLREF_C void Des8PanicMaxLengthNegative();
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GLREF_C void Des8PanicLengthOutOfRange();
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GLREF_C void Des8PanicDesOverflow();
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GLREF_C void Des8PanicDesIndexOutOfRange();
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__NAKED__ EXPORT_C const TUint8 *TDesC8::Ptr() const
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//
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// Return a pointer to the buffer.
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//
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	{
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	asm("ldr r1, [r0], #4 ");
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	asm("cmp r1, #0x50000000 ");
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	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
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	asm("eor r1, r1, r1, lsr #1 ");
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	asm("msr cpsr_flg, r1 ");
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	asm("addcs r0, r0, #4 ");
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	asm("ldrle r0, [r0] ");
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	asm("addeq r0, r0, #4 ");
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	__JUMP(,lr);
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	}
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#ifndef __EABI_CTORS__
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__NAKED__ EXPORT_C TPtrC8::TPtrC8()
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//
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// Default constructor
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//
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	{
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	asm("mov r1, #0x10000000 ");	// type=EPtrC, length=0
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	asm("mov r2, #0 ");				// ptr=NULL
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	asm("stmia r0, {r1,r2} ");
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	__JUMP(,lr);
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	}
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__NAKED__ EXPORT_C TPtrC8::TPtrC8(const TDesC8& /*aDes*/)
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//
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// Constructor
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//
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	{
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	asm("ldr r2, [r1], #4 ");		// r2 = type/length
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	asm("bic r3, r2, #0xF0000000");	// r3 = length
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	asm("orr r3, r3, #0x10000000");	// r3 = EPtrC + length
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	asm("cmp r2, #0x50000000 ");
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	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
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	asm("eor r2, r2, r2, lsr #1 ");
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	asm("msr cpsr_flg, r2 ");
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	asm("addcs r1, r1, #4 ");
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	asm("ldrle r1, [r1] ");
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	asm("addeq r1, r1, #4 ");		// r1 = aDes.Ptr()
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	asm("str r3, [r0] ");
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	asm("str r1, [r0, #4] ");
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	__JUMP(,lr);
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	}
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__NAKED__ EXPORT_C TPtrC8::TPtrC8(const TUint8* /*aString*/)
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//
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// Constructor
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//
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	{
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	asm("mov r2, r1 ");				// save aString pointer
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	asm("1: ");
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	asm("ldrb r3, [r1], #1 ");
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	asm("cmp r3, #0 ");
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	asm("bne 1b ");					// loop until we reach zero terminator
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	asm("sub r1, r1, r2 ");			// r1 = length + 1
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	asm("sub r1, r1, #1 ");			// r1 = length
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	asm("orr r1, r1, #0x10000000 ");	// r1=EPtrC + length
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	asm("stmia r0, {r1, r2} ");		// store type/length and ptr fields
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	__JUMP(,lr);
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	}
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__NAKED__ EXPORT_C TPtrC8::TPtrC8(const TUint8* /*aBuf*/,TInt /*aLength*/)
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//
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// Constructor
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//
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	{
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	asm("orrs r2, r2, #0x10000000 ");
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	asm("strpl r2, [r0] ");
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	asm("strpl r1, [r0, #4] ");
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	__JUMP(pl,lr);
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	asm("b  " CSM_Z23Des8PanicLengthNegativev);
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	}
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__NAKED__ EXPORT_C TPtr8::TPtr8(TUint8* /*aBuf*/,TInt /*aMaxLength*/)
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//
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// Constructor
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//
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	{
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	asm("cmp r2, #0 ");
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	asm("movpl r3, r1 ");
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	asm("movpl r1, #0x20000000 ");	// length=0, EPtr
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	asm("stmplia r0, {r1,r2,r3} ");
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	__JUMP(pl,lr);
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	asm("b  " CSM_Z26Des8PanicMaxLengthNegativev);
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	}
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__NAKED__ EXPORT_C TPtr8::TPtr8(TUint8* /*aBuf*/,TInt /*aLength*/,TInt /*aMaxLength*/)
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//
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// Constructor
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//
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	{
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	asm("cmp r2, #0 ");				// check length>=0
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	asm("cmpge r3, r2 ");			// if so, check maxlength>=length
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	asm("movge r12, r1 ");
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	asm("orrge r2, r2, #0x20000000 ");	// r2 = length + EPtr
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	asm("stmgeia r0, {r2,r3,r12} ");
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	__JUMP(ge,lr);
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	asm("cmp r2, #0 ");
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	asm("bmi  " CSM_Z23Des8PanicLengthNegativev);
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	asm("cmp r3, #0 ");
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	asm("bmi  " CSM_Z26Des8PanicMaxLengthNegativev);
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	asm("b  " CSM_Z25Des8PanicLengthOutOfRangev);
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	}
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__NAKED__ EXPORT_C TPtr8::TPtr8(TBufCBase8& /*aLcb*/,TInt /*aMaxLength*/)
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//
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// Constructor
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//
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	{
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	asm("mov r3, r1 ");
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	asm("ldr r1, [r3] ");
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	asm("bic r1, r1, #0xF0000000 ");		// r1=aLcb.Length()
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	asm("cmp r1, r2 ");						// check against maxlength
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	asm("orrle r1, r1, #0x40000000 ");		// r1=aLcb.Length() + EBufCPtr
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	asm("stmleia r0, {r1,r2,r3} ");
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	__JUMP(le,lr);
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	asm("b  " CSM_Z25Des8PanicLengthOutOfRangev);
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	}
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__NAKED__ EXPORT_C TBufCBase8::TBufCBase8()
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//
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// Constructor
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//
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	{
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	asm("mov r1, #0 ");
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	asm("str r1, [r0] ");
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	__JUMP(,lr);
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	}
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__NAKED__ EXPORT_C TBufCBase8::TBufCBase8(const TUint8* /*aString*/,TInt /*aMaxLength*/)
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//
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// Constructor
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//
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	{
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	asm("mov r3, r1 ");					// save aString pointer
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	asm("1: ");
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	asm("ldrb r12, [r3], #1 ");
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	asm("cmp r12, #0 ");
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	asm("bne 1b ");						// loop until we reach zero terminator
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	asm("sub r3, r3, r1 ");				// r3 = length + 1
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	asm("sub r3, r3, #1 ");				// r3 = length (+EBufC)
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	asm("cmp r3, r2 ");					// check against max length
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	asm("bgt  " CSM_Z25Des8PanicLengthOutOfRangev);
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	asm("stmfd sp!, {r0,lr} ");			// save registers for function call
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	asm("str r3, [r0], #4 ");			// save length/type field, r0->buffer
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	asm("mov r2, r3 ");					// length into r2 for function call
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	asm("bl memmove ");
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	__POPRET("r0,");
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	}
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__NAKED__ EXPORT_C TBufCBase8::TBufCBase8(const TDesC8& /*aDes*/,TInt /*aMaxLength*/)
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//
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// Constructor
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//
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	{
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	asm("ldr r3, [r1], #4 ");			// r3 = type/length
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	asm("bic r12, r3, #0xF0000000");	// r12 = length
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	asm("cmp r12, r2 ");				// compare with maxlength
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	asm("bgt  " CSM_Z25Des8PanicLengthOutOfRangev);
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	asm("cmp r3, #0x50000000 ");
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	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
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	asm("eor r3, r3, r3, lsr #1 ");
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	asm("msr cpsr_flg, r3 ");
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	asm("addcs r1, r1, #4 ");
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	asm("ldrle r1, [r1] ");
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	asm("addeq r1, r1, #4 ");			// r1 = aDes.Ptr()
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	asm("stmfd sp!, {r0,lr} ");			// save registers for function call
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	asm("str r12, [r0], #4 ");			// store length/type, r0->buffer
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	asm("mov r2, r12 ");				// length into r2 for function call
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	asm("bl memmove ");
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	__POPRET("r0,");
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	}
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#endif
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__NAKED__ EXPORT_C void TBufCBase8::Copy(const TUint8* /*aString*/,TInt /*aMaxLength*/)
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//
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// Copy from a string.
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//
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	{
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	asm("mov r3, r1 ");					// save aString pointer
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	asm("1: ");
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	asm("ldrb r12, [r3], #1 ");
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	asm("cmp r12, #0 ");
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	asm("bne 1b ");						// loop until we reach zero terminator
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	asm("sub r3, r3, r1 ");				// r3 = length + 1
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	asm("sub r3, r3, #1 ");				// r3 = length (+EBufC)
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	asm("cmp r3, r2 ");					// check against max length
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	asm("bgt  " CSM_Z25Des8PanicLengthOutOfRangev);
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	asm("str r3, [r0], #4 ");			// save length/type field, r0->buffer
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	asm("mov r2, r3	");					// length into r2 for function call
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	asm("b memmove ");
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	}
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__NAKED__ EXPORT_C void TBufCBase8::Copy(const TDesC8& /*aDes*/,TInt /*aMaxLength*/)
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//
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// Copy from a descriptor.
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//
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	{
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	asm("ldr r3, [r1], #4 ");			// r3 = type/length
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	asm("bic r12, r3, #0xF0000000");	// r12 = length
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	asm("cmp r12, r2 ");				// compare with maxlength
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	asm("bgt  " CSM_Z20Des8PanicDesOverflowv);
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	asm("cmp r3, #0x50000000 ");
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	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
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	asm("eor r3, r3, r3, lsr #1 ");
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	asm("msr cpsr_flg, r3 ");
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	asm("addcs r1, r1, #4 ");
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	asm("ldrle r1, [r1] ");
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	asm("addeq r1, r1, #4 ");			// r1 = aDes.Ptr()
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	asm("str r12, [r0], #4 ");			// store length/type, r0->buffer
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	asm("mov r2, r12 ");				// length into r2 for function call
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	asm("b memmove ");
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	}
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#ifndef __EABI_CTORS__
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__NAKED__ EXPORT_C TBufBase8::TBufBase8(TInt /*aMaxLength*/)
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	{
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	asm("mov r2, #0x30000000 ");		// EBuf + zero length
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	asm("str r2, [r0] ");
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	asm("str r1, [r0, #4] ");
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	__JUMP(,lr);
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	}
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__NAKED__ EXPORT_C TBufBase8::TBufBase8(TInt /*aLength*/, TInt /*aMaxLength*/)
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	{
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	asm("cmp r1, #0 ");					// check length>=0
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	asm("cmpge r2, r1 ");				// if so, check maxlength>=length
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	asm("orrge r1, r1, #0x30000000 ");	// r1=length + EBuf
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	asm("stmgeia r0, {r1,r2} ");		// store length/type and maxlength fields
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	__JUMP(ge,lr);
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	asm("cmp r2, #0 ");
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	asm("bmi  " CSM_Z26Des8PanicMaxLengthNegativev);
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	asm("b  " CSM_Z25Des8PanicLengthOutOfRangev);
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	}
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__NAKED__ EXPORT_C TBufBase8::TBufBase8(const TUint8* /*aString*/, TInt /*aMaxLength*/)
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	{
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	asm("mov r12, r1 ");				// save aString pointer
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	asm("1: ");
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	asm("ldrb r3, [r1], #1 ");
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	asm("cmp r3, #0 ");
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	asm("bne 1b ");						// loop until we reach zero terminator
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	asm("sub r1, r1, r12 ");			// r1 = length + 1
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	asm("sub r1, r1, #1 ");				// r1 = length
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	asm("cmp r1, r2 ");					// compare to max length
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	asm("bgt  " CSM_Z25Des8PanicLengthOutOfRangev);	// length too big, so panic
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	asm("orr r1, r1, #0x30000000 ");	// if length<=max, r1=EBuf + length
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	asm("stmfd sp!, {r0,lr} ");			// save registers for function call
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	asm("stmia r0!, {r1, r2} ");		// store type/length and max length fields, r0->buffer
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	asm("bic r2, r1, #0xf0000000 ");	// r2=length
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	asm("mov r1, r12 ");				// r12=aString
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	asm("bl memmove ");
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	__POPRET("r0,");
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	}
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__NAKED__ EXPORT_C TBufBase8::TBufBase8(const TDesC8& /*aDes*/, TInt /*aMaxLength*/)
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	{
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	asm("ldr r3, [r1], #4 ");		// r3 = type/length
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	asm("bic r12, r3, #0xF0000000");	// r12 = length
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	asm("cmp r12, r2 ");				// compare with maxlength
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	asm("bgt  " CSM_Z25Des8PanicLengthOutOfRangev);
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	asm("cmp r3, #0x50000000 ");
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	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
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	asm("eor r3, r3, r3, lsr #1 ");
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	asm("msr cpsr_flg, r3 ");
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	asm("addcs r1, r1, #4 ");
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	asm("ldrle r1, [r1] ");
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	asm("addeq r1, r1, #4 ");		// r1 = aDes.Ptr()
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	asm("stmfd sp!, {r0,lr} ");		// save registers for function call
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	asm("orr r12, r12, #0x30000000 ");	// add EBuf type field
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	asm("str r12, [r0], #4 ");		// store length/type, r0->max length
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	asm("str r2, [r0], #4 ");		// store max length, r0->buffer
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	asm("bic r2, r12, #0xf0000000 ");	// length into r2 for function call
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	asm("bl memmove ");
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	__POPRET("r0,");
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	}
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#endif
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__NAKED__ EXPORT_C void TDes8::SetLength(TInt /*aLength*/)
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//
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// Set the length of the descriptor, checking the length is O.K.
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//
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	{
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	asm("ldmia r0, {r2,r3} ");			// r2=length/type, r3=maxlength
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	asm("cmp r1, r3 ");					// check aLength against maxlength and for -ve values
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	asm("bhi  " CSM_Z20Des8PanicDesOverflowv);
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	asm("and r2, r2, #0xF0000000 ");	// r2=type field
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	asm("cmp r2, #0x40000000 ");		// check for EBufCPtr
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	asm("orr r2, r2, r1 ");				// r2=type + new length
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	asm("str r2, [r0] ");				// store new length
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	__JUMP(ne,lr);
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	asm("ldr r2, [r0, #8] ");			// r2=pointer to TBufCBase
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	asm("str r1, [r2] ");				// update length of TBufCBase
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	__JUMP(,lr);
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  	}
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__NAKED__ EXPORT_C void TDes8::SetMax()
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//
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// Set the length to MaxLength().
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//
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	{
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	asm("ldmia r0, {r1,r2} ");			// r1=length/type, r2=maxlength
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	asm("and r1, r1, #0xF0000000 ");	// r1=type field
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	asm("cmp r1, #0x40000000 ");		// check for EBufCPtr
sl@0
   346
	asm("orr r1, r1, r2 ");				// r1=type field + maxlength
sl@0
   347
	asm("str r1, [r0] ");				// store new length
sl@0
   348
	__JUMP(ne,lr);
sl@0
   349
	asm("ldr r1, [r0, #8] ");			// r1 = pointer to TBufCBase
sl@0
   350
	asm("str r2, [r1] ");				// update length of TBufCBase
sl@0
   351
	__JUMP(,lr);
sl@0
   352
	}
sl@0
   353
sl@0
   354
__NAKED__ EXPORT_C void TDes8::Copy(const TUint8* /*aString*/)
sl@0
   355
//
sl@0
   356
// Copy a string to this descriptor.
sl@0
   357
//
sl@0
   358
	{
sl@0
   359
	asm("mov r2, r1 ");					// r2=aString
sl@0
   360
	asm("1: ");
sl@0
   361
	asm("ldrb r3, [r2], #1 ");
sl@0
   362
	asm("cmp r3, #0 ");
sl@0
   363
	asm("bne 1b ");						// loop until zero terminator reached
sl@0
   364
	asm("sub r2, r2, r1 ");
sl@0
   365
	asm("sub r2, r2, #1 ");				// r2=length of string
sl@0
   366
	asm("ldmia r0, {r3,r12} ");			// r3=type/length of this, r12=maxlength
sl@0
   367
	asm("cmp r2, r12 ");				// compare new length against maxlength
sl@0
   368
	asm("bgt  " CSM_Z20Des8PanicDesOverflowv);
sl@0
   369
	asm("cmp r3, #0x50000000 ");
sl@0
   370
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
   371
	asm("and r3, r3, #0xF0000000 ");	// r3=type of this
sl@0
   372
	asm("orr r3, r3, r2 ");				// r3=new type/length
sl@0
   373
	asm("str r3, [r0], #4 ");			// store it
sl@0
   374
	asm("eor r3, r3, r3, lsr #1 ");
sl@0
   375
	asm("msr cpsr_flg, r3 ");
sl@0
   376
	asm("addcs r0, r0, #4 ");
sl@0
   377
	asm("ldrle r0, [r0] ");
sl@0
   378
	asm("streq r2, [r0], #4 ");			// if EBufCPtr, update length of TBufCBase, r0=Ptr()
sl@0
   379
	asm("b memmove ");
sl@0
   380
	}
sl@0
   381
sl@0
   382
__NAKED__ EXPORT_C void TDes8::Copy(const TUint8* /*aBuf*/,TInt /*aLength*/)
sl@0
   383
//
sl@0
   384
// Copy the aLength characters to the descriptor.
sl@0
   385
//
sl@0
   386
	{
sl@0
   387
	asm("ldmia r0, {r3,r12} ");			// r3=type/length of this, r12=maxlength
sl@0
   388
	asm("cmp r2, r12 ");				// compare new length against maxlength
sl@0
   389
	asm("bhi  " CSM_Z20Des8PanicDesOverflowv);	// Des8Panic if >MaxLength or -ve
sl@0
   390
	asm("cmp r3, #0x50000000 ");
sl@0
   391
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
   392
	asm("and r3, r3, #0xF0000000 ");	// r3=type of this
sl@0
   393
	asm("orr r3, r3, r2 ");				// r3=new type/length
sl@0
   394
	asm("str r3, [r0], #4 ");			// store it
sl@0
   395
	asm("eor r3, r3, r3, lsr #1 ");
sl@0
   396
	asm("msr cpsr_flg, r3 ");
sl@0
   397
	asm("addcs r0, r0, #4 ");
sl@0
   398
	asm("ldrle r0, [r0] ");
sl@0
   399
	asm("streq r2, [r0], #4 ");			// if EBufCPtr, update length of TBufCBase, r0=Ptr()
sl@0
   400
	asm("b memmove ");
sl@0
   401
	}
sl@0
   402
sl@0
   403
__NAKED__ EXPORT_C void TDes8::Copy(const TDesC8& /*aDes*/)
sl@0
   404
//
sl@0
   405
// Copy a descriptor to this descriptor.
sl@0
   406
//
sl@0
   407
	{
sl@0
   408
	asm("ldr r3, [r1], #4 ");			// r3 = type/length of aDes
sl@0
   409
	asm("bic r12, r3, #0xF0000000");	// r12 = aDes.length
sl@0
   410
	asm("ldr r2, [r0, #4] ");			// r2=this.maxlength
sl@0
   411
	asm("cmp r12, r2 ");				// compare with maxlength
sl@0
   412
	asm("bgt  " CSM_Z20Des8PanicDesOverflowv);
sl@0
   413
	asm("ldr r2, [r0] ");				// get type of this
sl@0
   414
	asm("cmp r2, #0x50000000 ");		// check both descriptor types
sl@0
   415
	asm("cmpcc r3, #0x50000000 ");
sl@0
   416
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
   417
	asm("and r2, r2, #0xF0000000 ");
sl@0
   418
	asm("orr r2, r12, r2 ");			// r2=new type/length of this
sl@0
   419
	asm("str r2, [r0], #4 ");			// store it
sl@0
   420
	asm("eor r3, r3, r3, lsr #1 ");
sl@0
   421
	asm("msr cpsr_flg, r3 ");
sl@0
   422
	asm("addcs r1, r1, #4 ");
sl@0
   423
	asm("ldrle r1, [r1] ");
sl@0
   424
	asm("addeq r1, r1, #4 ");			// r1 = aDes.Ptr()
sl@0
   425
	asm("eor r2, r2, r2, lsr #1 ");
sl@0
   426
	asm("msr cpsr_flg, r2 ");
sl@0
   427
	asm("addcs r0, r0, #4 ");
sl@0
   428
	asm("ldrle r0, [r0] ");
sl@0
   429
	asm("streq r12, [r0], #4 ");		// if EBufCPtr, update length of TBufCBase, r0=Ptr()
sl@0
   430
	asm("mov r2, r12 ");				// length into r2 for function call
sl@0
   431
	asm("b memmove ");
sl@0
   432
	}
sl@0
   433
sl@0
   434
#ifndef __KERNEL_MODE__
sl@0
   435
__NAKED__ EXPORT_C TPtr8 TDes8::LeftTPtr(TInt /*aLength*/) const
sl@0
   436
//
sl@0
   437
// Extract the left portion of the descriptor.
sl@0
   438
//
sl@0
   439
	{
sl@0
   440
	// On entry r0=return store ptr, r1=this, r2=aLength
sl@0
   441
	// Return TPtr8 ([r0]=length/type,[r0,#4]=maxLength,[r0,#8]=Ptr)
sl@0
   442
	asm("ldr r3, [r1], #4 ");				// r3=this.length/type
sl@0
   443
	asm("cmp r2, #0 ");						// check aLength>=0
sl@0
   444
	asm("blt Des8PanicPosOutOfRange__Fv ");	// if not panic
sl@0
   445
	asm("bic r12, r3, #0xF0000000 ");		// r12=this.Length()
sl@0
   446
	asm("cmp r2, r12 ");					// limit aLength to Length()
sl@0
   447
	asm("movgt r2, r12 ");
sl@0
   448
	asm("cmp r3, #0x50000000 ");			// check type() <= 4
sl@0
   449
	asm("bcs Des8PanicBadDesType__Fv ");	// if not, panic
sl@0
   450
	asm("eor r3, r3, r3, lsr #1 ");
sl@0
   451
	asm("msr cpsr_flg, r3 ");
sl@0
   452
	asm("addcs r1, r1, #4 ");
sl@0
   453
	asm("ldrle r1, [r1] ");
sl@0
   454
	asm("addeq r1, r1, #4 ");				// r1=this.Ptr()
sl@0
   455
	asm("mov r3, r1 ");						// r3=this.Ptr()
sl@0
   456
	asm("orr r1, r2, #0x20000000 ");		// r1=aLength + EPtr
sl@0
   457
	asm("stmia r0, {r1-r3} ");				
sl@0
   458
	__JUMP(,lr);
sl@0
   459
	}
sl@0
   460
sl@0
   461
__NAKED__ EXPORT_C TPtr8 TDes8::RightTPtr(TInt /*aLength*/) const
sl@0
   462
//
sl@0
   463
// Extract the right portion of the descriptor.
sl@0
   464
//
sl@0
   465
	{
sl@0
   466
	// On entry r0=return store ptr, r1=this, r2=aLength
sl@0
   467
	// Return TPtr8 ([r0]=length/type,[r0,#4]=maxLength,[r0,#8]=Ptr)
sl@0
   468
	asm("ldr r3, [r1], #4 ");				// r3=this.length/type
sl@0
   469
	asm("cmp r2, #0 ");						// check aLength>=0
sl@0
   470
	asm("blt Des8PanicPosOutOfRange__Fv ");	// if not, panic
sl@0
   471
	asm("bic r12, r3, #0xF0000000 ");		// r12=this.Length()
sl@0
   472
	asm("cmp r2, r12 ");					// limit aLength to Length()
sl@0
   473
	asm("movgt r2, r12 ");
sl@0
   474
	asm("cmp r3, #0x50000000 ");			// check type() <= 4
sl@0
   475
	asm("bcs Des8PanicBadDesType__Fv ");
sl@0
   476
	asm("eor r3, r3, r3, lsr #1 ");
sl@0
   477
	asm("msr cpsr_flg, r3 ");
sl@0
   478
	asm("addcs r1, r1, #4 ");
sl@0
   479
	asm("ldrle r1, [r1] ");
sl@0
   480
	asm("addeq r1, r1, #4 ");				// r1=this.Ptr()
sl@0
   481
	asm("add r3, r1, r12 ");				// r3=this.Ptr()+Length()
sl@0
   482
	asm("orr r1, r2, #0x20000000 ");		// r1=aLength + EPtr
sl@0
   483
	asm("sub r3, r3, r2 ");					// r3=Ptr()+Length()-aLength
sl@0
   484
	asm("stmia r0, {r1-r3} ");
sl@0
   485
	__JUMP(,lr);
sl@0
   486
	}
sl@0
   487
sl@0
   488
__NAKED__ EXPORT_C TPtr8 TDes8::MidTPtr(TInt /*aPos*/) const
sl@0
   489
//
sl@0
   490
// Extract the middle portion of the descriptor.
sl@0
   491
//
sl@0
   492
	{
sl@0
   493
	// On entry r0=return store ptr, r1=this, r2=aPos
sl@0
   494
	// Return TPtr8 ([r0]=length/type,[r0,#4]=maxLength,[r0,#8]=Ptr)
sl@0
   495
	asm("ldr r3, [r1], #4 ");				// r3=this.length/type
sl@0
   496
	asm("bic r12, r3, #0xF0000000 ");		// r12=this.Length()
sl@0
   497
	asm("cmp r2, #0 ");						// check aPos>=0
sl@0
   498
	asm("cmpge r12, r2 ");					// if so check Length()>=aPos
sl@0
   499
	asm("blt Des8PanicPosOutOfRange__Fv ");
sl@0
   500
	asm("cmp r3, #0x50000000 ");			// check type() <= 4
sl@0
   501
	asm("bcs Des8PanicBadDesType__Fv ");
sl@0
   502
	asm("eor r3, r3, r3, lsr #1 ");
sl@0
   503
	asm("msr cpsr_flg, r3 ");
sl@0
   504
	asm("addcs r1, r1, #4 ");
sl@0
   505
	asm("ldrle r1, [r1] ");
sl@0
   506
	asm("addeq r1, r1, #4 ");				// r1=this.Ptr()
sl@0
   507
	asm("add r3, r1, r2 ");					// r3=this.Ptr()+aPos
sl@0
   508
	asm("sub r2, r12, r2 ");				// r2=Length()-aPos (=newMaxLen)
sl@0
   509
	asm("orr r1, r2, #0x20000000 ");		// r1=Length()-aPos + EPtr (=newLen/Type)
sl@0
   510
	asm("stmia r0, {r1-r3} ");
sl@0
   511
	__JUMP(,lr);
sl@0
   512
	}
sl@0
   513
sl@0
   514
__NAKED__ EXPORT_C TPtr8 TDes8::MidTPtr(TInt /*aPos*/,TInt /*aLength*/) const
sl@0
   515
//
sl@0
   516
// Extract the middle portion of the descriptor.
sl@0
   517
//
sl@0
   518
	{
sl@0
   519
	// On entry r0=return store ptr, r1=this, r2=aPos, r3=aLength
sl@0
   520
	// Return TPtr8 ([r0]=length/type,[r0,#4]=maxLength,[r0,#8]=Ptr)
sl@0
   521
	asm("str r4, [sp, #-4]! ");				// save r4
sl@0
   522
	asm("ldr r12, [r1], #4 ");				// r12=this.length/type
sl@0
   523
	asm("mov r4, r1 ");
sl@0
   524
	asm("cmp r12, #0x50000000 ");			// check valid descriptor type
sl@0
   525
	asm("bcs Des8PanicBadDesType__Fv ");
sl@0
   526
	asm("eor r12, r12, r12, lsr #1 ");
sl@0
   527
	asm("msr cpsr_flg, r12 ");
sl@0
   528
	asm("ldr r12, [r1, #-4] ");
sl@0
   529
	asm("addcs r4, r4, #4 ");
sl@0
   530
	asm("ldrle r4, [r4] ");
sl@0
   531
	asm("bic r12, r12, #0xF0000000 ");		// r12=Length()
sl@0
   532
	asm("addeq r4, r4, #4 ");				// r4=this.Ptr()
sl@0
   533
	asm("cmp r2, #0 ");						// check aPos>=0
sl@0
   534
	asm("subge r12, r12, r2 ");				// if so, r12=Length()-aPos
sl@0
   535
	asm("cmpge r12, r3 ");					// and check Length()-aPos>=aLength
sl@0
   536
	asm("orrge r1, r3, #0x20000000 ");		// if so, r1=aLength + EPtr
sl@0
   537
	asm("addge r3, r4, r2 ");				// and r3=this.Ptr()+aPos
sl@0
   538
	asm("bicge r2, r1, #0xF0000000 ");		// and r2=aLength
sl@0
   539
	asm("stmgeia r0, {r1-r3} ");
sl@0
   540
	asm("ldrge r4, [sp], #4 ");
sl@0
   541
	__JUMP(ge,lr);
sl@0
   542
	asm("b Des8PanicPosOutOfRange__Fv ");
sl@0
   543
	}
sl@0
   544
#endif
sl@0
   545
sl@0
   546
__NAKED__ EXPORT_C const TUint8 &TDesC8::AtC(TInt /*anIndex*/) const
sl@0
   547
//
sl@0
   548
// Return a reference to the character in the buffer.
sl@0
   549
//
sl@0
   550
	{
sl@0
   551
	asm("ldr r2, [r0], #4 ");			// r2=length/type
sl@0
   552
	asm("bic r3, r2, #0xF0000000 ");	// r3=length
sl@0
   553
	asm("cmp r2, #0x50000000 ");
sl@0
   554
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
   555
	asm("eor r2, r2, r2, lsr #1 ");
sl@0
   556
	asm("msr cpsr_flg, r2 ");
sl@0
   557
	asm("addcs r0, r0, #4 ");
sl@0
   558
	asm("ldrle r0, [r0] ");
sl@0
   559
	asm("addeq r0, r0, #4 ");			// r0=this.Ptr()
sl@0
   560
	asm("cmp r1, #0 ");					// check index>=0
sl@0
   561
	asm("cmpge r3, r1 ");				// if so, check Length()>index
sl@0
   562
	asm("addgt r0, r0, r1 ");			// return value = this.Ptr()+index
sl@0
   563
	__JUMP(gt,lr);
sl@0
   564
	asm("b  " CSM_Z27Des8PanicDesIndexOutOfRangev);
sl@0
   565
	}
sl@0
   566
sl@0
   567
__NAKED__ EXPORT_C TInt TDesC8::Locate(TChar /*aChar*/) const
sl@0
   568
//
sl@0
   569
// Locate character aChar in the descriptor.
sl@0
   570
//
sl@0
   571
	{
sl@0
   572
	asm("ldr r2, [r0], #4 ");			// r2=length/type
sl@0
   573
	asm("cmp r2, #0x50000000 ");
sl@0
   574
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
   575
	asm("bics r3, r2, #0xF0000000 ");	// r3=length
sl@0
   576
	asm("mvneq r0, #0 ");				// if length=0, not found
sl@0
   577
	__JUMP(eq,lr);
sl@0
   578
	asm("eor r2, r2, r2, lsr #1 ");
sl@0
   579
	asm("msr cpsr_flg, r2 ");
sl@0
   580
	asm("addcs r0, r0, #4 ");
sl@0
   581
	asm("ldrle r0, [r0] ");
sl@0
   582
	asm("addeq r0, r0, #4 ");			// r0=this.Ptr()
sl@0
   583
	asm("add r3, r3, r0 ");				// r3=ptr+length
sl@0
   584
	asm("add r12, r0, #1 ");			// r12=ptr+1
sl@0
   585
	asm("1: ");
sl@0
   586
	asm("ldrb r2, [r0], #1 ");			// r2=*r0++
sl@0
   587
	asm("cmp r1, r2 ");					// is r1=match char?
sl@0
   588
	asm("cmpne r0, r3 ");				// if not, is r0=r3 (end pointer)
sl@0
   589
	asm("bne 1b ");
sl@0
   590
	asm("cmp r1, r2 ");					// did we find char?
sl@0
   591
	asm("subeq r0, r0, r12 ");			// if we did, return value = r0-ptr-1
sl@0
   592
	asm("mvnne r0, #0 ");				// else return value =-1
sl@0
   593
	__JUMP(,lr);
sl@0
   594
	}
sl@0
   595
sl@0
   596
__NAKED__ EXPORT_C TInt TDesC8::LocateReverse(TChar /*aChar*/) const
sl@0
   597
//
sl@0
   598
// Locate character aChar in the descriptor in reverse.
sl@0
   599
//
sl@0
   600
	{
sl@0
   601
	asm("ldr r2, [r0], #4 ");			// r2=length/type
sl@0
   602
	asm("cmp r2, #0x50000000 ");
sl@0
   603
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
   604
	asm("bics r3, r2, #0xF0000000 ");	// r3=length
sl@0
   605
	asm("mvneq r0, #0 ");				// if length=0, not found
sl@0
   606
	__JUMP(eq,lr);
sl@0
   607
	asm("eor r2, r2, r2, lsr #1 ");
sl@0
   608
	asm("msr cpsr_flg, r2 ");
sl@0
   609
	asm("addcs r0, r0, #4 ");
sl@0
   610
	asm("ldrle r0, [r0] ");
sl@0
   611
	asm("addeq r0, r0, #4 ");			// r0=this.Ptr()
sl@0
   612
	asm("sub r0, r0, #1 ");				// r0=Ptr-1
sl@0
   613
	asm("1: ");
sl@0
   614
	asm("ldrb r2, [r0, r3] ");			// r2=Ptr[r3-1]
sl@0
   615
	asm("cmp r1, r2 ");					// is r1=match char?
sl@0
   616
	asm("subnes r3, r3, #1 ");			// if not, decrement char count
sl@0
   617
	asm("bne 1b ");
sl@0
   618
	asm("cmp r1, r2 ");					// did we find match char?
sl@0
   619
	asm("subeq r0, r3, #1 ");			// if we did, return value = r3-1
sl@0
   620
	asm("mvnne r0, #0 ");				// else return value =-1
sl@0
   621
	__JUMP(,lr);
sl@0
   622
	}
sl@0
   623
sl@0
   624
#ifndef __KERNEL_MODE__
sl@0
   625
__NAKED__ EXPORT_C TInt TDesC8::CompareF(const TDesC8& /*aDes*/) const
sl@0
   626
//
sl@0
   627
// Compare a descriptor to this descriptor folded.
sl@0
   628
//
sl@0
   629
	{
sl@0
   630
	asm("ldr r12, 1f ");
sl@0
   631
	asm("b comparebody ");
sl@0
   632
	asm("1: ");
sl@0
   633
	asm(".word  " CSM_ZN3Mem8CompareFEPKhiS0_i);
sl@0
   634
	}
sl@0
   635
sl@0
   636
__NAKED__ EXPORT_C TInt TDesC8::CompareC(const TDesC8& /*aDes*/) const
sl@0
   637
//
sl@0
   638
// Compare a descriptor to this descriptor collated.
sl@0
   639
//
sl@0
   640
	{
sl@0
   641
	asm("ldr r12, 1f ");
sl@0
   642
	asm("b comparebody ");
sl@0
   643
	asm("1: ");
sl@0
   644
	asm(".word  " CSM_ZN3Mem8CompareCEPKhiS0_i);
sl@0
   645
	}
sl@0
   646
#endif
sl@0
   647
sl@0
   648
__NAKED__ EXPORT_C TInt TDesC8::Compare(const TDesC8& /*aDes*/) const
sl@0
   649
//
sl@0
   650
// Compare a descriptor to this descriptor.
sl@0
   651
//
sl@0
   652
	{
sl@0
   653
	asm("ldr r12, 1f ");
sl@0
   654
	asm("comparebody: ");
sl@0
   655
	asm("mov r2, r1 ");						// r2=&aDes
sl@0
   656
	asm("ldr r3, [r0], #4 ");				// r3=this.length/type
sl@0
   657
	asm("cmp r3, #0x50000000 ");
sl@0
   658
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
   659
	asm("bic r1, r3, #0xF0000000 ");		// r1=this.Length()
sl@0
   660
	asm("eor r3, r3, r3, lsr #1 ");
sl@0
   661
	asm("msr cpsr_flg, r3 ");
sl@0
   662
	asm("addcs r0, r0, #4 ");
sl@0
   663
	asm("ldrle r0, [r0] ");
sl@0
   664
	asm("addeq r0, r0, #4 ");				// r0=this.Ptr()
sl@0
   665
	asm("ldr r3, [r2], #4 ");				// r3=aDes.length/type
sl@0
   666
	asm("cmp r3, #0x50000000 ");
sl@0
   667
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
   668
	asm("eor r3, r3, r3, lsr #1 ");
sl@0
   669
	asm("msr cpsr_flg, r3 ");
sl@0
   670
	asm("ldr r3, [r2, #-4] ");
sl@0
   671
	asm("bic r3, r3, #0xF0000000 ");		// r3=aDes.Length()
sl@0
   672
	asm("addcs r2, r2, #4 ");
sl@0
   673
	asm("ldrle r2, [r2] ");
sl@0
   674
	asm("addeq r2, r2, #4 ");				// r2=aDes.Ptr()
sl@0
   675
	__JUMP(,r12);
sl@0
   676
	
sl@0
   677
	asm("1: ");
sl@0
   678
	asm(".word memcompare ");
sl@0
   679
	}
sl@0
   680
#endif // __DES8_MACHINE_CODED__
sl@0
   681
sl@0
   682
#if defined(__DES8_MACHINE_CODED__) && !defined(__EABI__)
sl@0
   683
__NAKED__ EXPORT_C TPtrC8 TDesC8::Left(TInt /*aLength*/) const
sl@0
   684
//
sl@0
   685
// Extract the left portion of the descriptor.
sl@0
   686
//
sl@0
   687
	{
sl@0
   688
	// On entry r0=this, r1=aLength
sl@0
   689
	// Return TPtrC8 in r0,r1
sl@0
   690
	asm("ldr r3, [r0], #4 ");				// r3=this.length/type
sl@0
   691
	asm("bic r12, r3, #0xF0000000 ");		// r12=this.Length()
sl@0
   692
	asm("cmp r1, #0 ");						// check aLength>=0
sl@0
   693
	asm("blt  " CSM_Z22Des8PanicPosOutOfRangev);	// if not panic
sl@0
   694
	asm("cmp r1, r12 ");					// else limit aLength to Length()
sl@0
   695
	asm("movgt r1, r12 ");
sl@0
   696
	asm("cmp r3, #0x50000000 ");
sl@0
   697
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
   698
	asm("eor r3, r3, r3, lsr #1 ");
sl@0
   699
	asm("msr cpsr_flg, r3 ");
sl@0
   700
	asm("addcs r0, r0, #4 ");
sl@0
   701
	asm("ldrle r0, [r0] ");
sl@0
   702
	asm("addeq r0, r0, #4 ");				// r0=this.Ptr()
sl@0
   703
	asm("orr r2, r1, #0x10000000 ");		// r2=aLength + EPtrC
sl@0
   704
	asm("mov r1, r0 ");						// r1=result ptr
sl@0
   705
	asm("mov r0, r2 ");						// r0=result type/length
sl@0
   706
	__JUMP(,lr);
sl@0
   707
	}
sl@0
   708
sl@0
   709
__NAKED__ EXPORT_C TPtrC8 TDesC8::Right(TInt /*aLength*/) const
sl@0
   710
//
sl@0
   711
// Extract the right portion of the descriptor.
sl@0
   712
//
sl@0
   713
	{
sl@0
   714
	// On entry r0=this, r1=aLength
sl@0
   715
	// Return TPtrC8 in r0,r1
sl@0
   716
	asm("ldr r3, [r0], #4 ");				// r3=this.length/type
sl@0
   717
	asm("bic r12, r3, #0xF0000000 ");		// r12=this.Length()
sl@0
   718
	asm("cmp r1, #0 ");						// check aLength>=0
sl@0
   719
	asm("blt  " CSM_Z22Des8PanicPosOutOfRangev);	// if not, panic
sl@0
   720
	asm("cmp r1, r12 ");					// else limit aLength to Length()
sl@0
   721
	asm("movgt r1, r12 ");
sl@0
   722
	asm("cmp r3, #0x50000000 ");
sl@0
   723
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
   724
	asm("eor r3, r3, r3, lsr #1 ");
sl@0
   725
	asm("msr cpsr_flg, r3 ");
sl@0
   726
	asm("addcs r0, r0, #4 ");
sl@0
   727
	asm("ldrle r0, [r0] ");
sl@0
   728
	asm("addeq r0, r0, #4 ");				// r0=this.Ptr()
sl@0
   729
	asm("add r3, r0, r12 ");				// r3=this.Ptr()+len
sl@0
   730
	asm("orr r0, r1, #0x10000000 ");		// r0=aLength + EPtrC
sl@0
   731
	asm("sub r1, r3, r1 ");					// r1=Ptr()+len-aLength
sl@0
   732
	__JUMP(,lr);
sl@0
   733
	}
sl@0
   734
sl@0
   735
__NAKED__ EXPORT_C TPtrC8 TDesC8::Mid(TInt /*aPos*/) const
sl@0
   736
//
sl@0
   737
// Extract the middle portion of the descriptor.
sl@0
   738
//
sl@0
   739
	{
sl@0
   740
	// On entry r0=this, r1=aPos
sl@0
   741
	// Return TPtrC8 in r0,r1
sl@0
   742
	asm("ldr r3, [r0], #4 ");				// r3=this.length/type
sl@0
   743
	asm("bic r12, r3, #0xF0000000 ");		// r12=this.Length()
sl@0
   744
	asm("cmp r1, #0 ");						// check aPos>=0
sl@0
   745
	asm("cmpge r12, r1 ");					// if so check Length()>=aPos
sl@0
   746
	asm("blt  " CSM_Z22Des8PanicPosOutOfRangev);
sl@0
   747
	asm("cmp r3, #0x50000000 ");
sl@0
   748
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
   749
	asm("eor r3, r3, r3, lsr #1 ");
sl@0
   750
	asm("msr cpsr_flg, r3 ");
sl@0
   751
	asm("addcs r0, r0, #4 ");
sl@0
   752
	asm("ldrle r0, [r0] ");
sl@0
   753
	asm("addeq r0, r0, #4 ");				// r0=this.Ptr()
sl@0
   754
	asm("sub r2, r12, r1 ");				// r2=len-aPos
sl@0
   755
	asm("add r1, r0, r1 ");					// r1=this.Ptr()+aPos
sl@0
   756
	asm("orr r0, r2, #0x10000000 ");		// r0=aLength + EPtrC
sl@0
   757
	__JUMP(,lr);
sl@0
   758
	}
sl@0
   759
sl@0
   760
__NAKED__ EXPORT_C TPtrC8 TDesC8::Mid(TInt /*aPos*/,TInt /*aLength*/) const
sl@0
   761
//
sl@0
   762
// Extract the middle portion of the descriptor.
sl@0
   763
//
sl@0
   764
	{
sl@0
   765
	// On entry r0=this, r1=aPos, r2=aLength
sl@0
   766
	// Return TPtrC8 in r0,r1
sl@0
   767
	asm("ldr r12, [r0], #4 ");				// r12=this.length/type
sl@0
   768
	asm("cmp r12, #0x50000000 ");			// check valid descriptor type
sl@0
   769
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
   770
	asm("eor r12, r12, r12, lsr #1 ");
sl@0
   771
	asm("msr cpsr_flg, r12 ");
sl@0
   772
	asm("ldr r12, [r0, #-4] ");
sl@0
   773
	asm("bic r12, r12, #0xF0000000 ");		// r12=Length()
sl@0
   774
	asm("addcs r0, r0, #4 ");
sl@0
   775
	asm("ldrle r0, [r0] ");
sl@0
   776
	asm("addeq r0, r0, #4 ");				// r0=this.Ptr()
sl@0
   777
	asm("cmp r1, #0 ");						// check aPos>=0
sl@0
   778
	asm("subge r12, r12, r1 ");				// if so, r12=Length()-aPos
sl@0
   779
	asm("cmpge r12, r2 ");					// and check Length()-aPos>=aLength
sl@0
   780
	asm("addge r1, r1, r0 ");				// if so, r1=Ptr()+aPos
sl@0
   781
	asm("orrge r0, r2, #0x10000000 ");		// and r0 = aLength + EPtrC
sl@0
   782
	__JUMP(ge,lr);
sl@0
   783
	asm("b  " CSM_Z22Des8PanicPosOutOfRangev);
sl@0
   784
	}
sl@0
   785
#endif // defined(__DES8_MACHINE_CODED__) && !defined(__EABI__)
sl@0
   786
sl@0
   787
#ifdef __DES8_MACHINE_CODED__
sl@0
   788
sl@0
   789
// Here are the __EABI__ compliant versions of the above
sl@0
   790
#ifdef __EABI__
sl@0
   791
sl@0
   792
__NAKED__ EXPORT_C TPtrC8 TDesC8::Left(TInt /*aLength*/) const
sl@0
   793
//
sl@0
   794
// Extract the left portion of the descriptor.
sl@0
   795
//
sl@0
   796
	{
sl@0
   797
	// On entry r0=return store ptr, r1=this, r2=aLength
sl@0
   798
	// Return TPtrC8 ([r0]=length/type,[r0,#4]=Ptr)
sl@0
   799
	asm("ldr r3, [r1], #4 ");				// r3=this.length/type
sl@0
   800
	asm("cmp r2, #0 ");					// check aLength>=0
sl@0
   801
	asm("blt Des8PanicPosOutOfRange__Fv ");			// if not panic
sl@0
   802
	asm("bic r12, r3, #0xF0000000 ");			// r12=this.Length()
sl@0
   803
	asm("cmp r2, r12 ");					// limit aLength to Length()
sl@0
   804
	asm("movgt r2, r12 ");
sl@0
   805
	asm("cmp r3, #0x50000000 ");				// check type() <= 4
sl@0
   806
	asm("bcs Des8PanicBadDesType__Fv ");			// if not, panic
sl@0
   807
	asm("eor r3, r3, r3, lsr #1 ");
sl@0
   808
	asm("msr cpsr_flg, r3 ");
sl@0
   809
	asm("addcs r1, r1, #4 ");
sl@0
   810
	asm("ldrle r1, [r1] ");
sl@0
   811
	asm("addeq r1, r1, #4 ");				// r1=this.Ptr()
sl@0
   812
	asm("mov r3, r1");					// r3=this.Ptr()
sl@0
   813
	asm("orr r1, r2, #0x10000000 ");			// r1=aLength + EPtrC
sl@0
   814
	asm("stmia r0, {r1,r3} ");				
sl@0
   815
	__JUMP(,lr);
sl@0
   816
	}
sl@0
   817
sl@0
   818
__NAKED__ EXPORT_C TPtrC8 TDesC8::Right(TInt /*aLength*/) const
sl@0
   819
//
sl@0
   820
// Extract the right portion of the descriptor.
sl@0
   821
//
sl@0
   822
	{
sl@0
   823
	// On entry r0=return store ptr, r1=this, r2=aLength
sl@0
   824
	// Return TPtrC8 ([r0]=length/type,[r0,#4]=Ptr)
sl@0
   825
	asm("ldr r3, [r1], #4 ");				// r3=this.length/type
sl@0
   826
	asm("cmp r2, #0 ");					// check aLength>=0
sl@0
   827
	asm("blt Des8PanicPosOutOfRange__Fv ");			// if not, panic
sl@0
   828
	asm("bic r12, r3, #0xF0000000 ");			// r12=this.Length()
sl@0
   829
	asm("cmp r2, r12 ");					// limit aLength to Length()
sl@0
   830
	asm("movgt r2, r12 ");
sl@0
   831
	asm("cmp r3, #0x50000000 ");				// check type() <= 4
sl@0
   832
	asm("bcs Des8PanicBadDesType__Fv ");
sl@0
   833
	asm("eor r3, r3, r3, lsr #1 ");
sl@0
   834
	asm("msr cpsr_flg, r3 ");
sl@0
   835
	asm("addcs r1, r1, #4 ");
sl@0
   836
	asm("ldrle r1, [r1] ");
sl@0
   837
	asm("addeq r1, r1, #4 ");				// r3=this.Ptr()
sl@0
   838
	asm("add r3, r1, r12 ");				// r3=this.Ptr()+Length()
sl@0
   839
	asm("orr r1, r2, #0x10000000 ");			// r1=aLength + EPtrC
sl@0
   840
	asm("sub r3, r3, r2 ");					// r3=Ptr()+Length()-aLength
sl@0
   841
	asm("stmia r0, {r1,r3} ");
sl@0
   842
	__JUMP(,lr);
sl@0
   843
	}
sl@0
   844
sl@0
   845
__NAKED__ EXPORT_C TPtrC8 TDesC8::Mid(TInt /*aPos*/) const
sl@0
   846
//
sl@0
   847
// Extract the middle portion of the descriptor.
sl@0
   848
//
sl@0
   849
	{
sl@0
   850
	// On entry r0=return store ptr, r1=this, r2=aPos
sl@0
   851
	// Return TPtrC8 ([r0]=length/type,[r0,#4]=Ptr)
sl@0
   852
	asm("ldr r3, [r1], #4 ");				// r3=this.length/type
sl@0
   853
	asm("bic r12, r3, #0xF0000000 ");			// r12=this.Length()
sl@0
   854
	asm("cmp r2, #0 ");					// check aPos>=0
sl@0
   855
	asm("cmpge r12, r2 ");					// if so check Length()>=aPos
sl@0
   856
	asm("blt Des8PanicPosOutOfRange__Fv ");
sl@0
   857
	asm("cmp r3, #0x50000000 ");				// check type() <= 4
sl@0
   858
	asm("bcs Des8PanicBadDesType__Fv ");
sl@0
   859
	asm("eor r3, r3, r3, lsr #1 ");
sl@0
   860
	asm("msr cpsr_flg, r3 ");
sl@0
   861
	asm("addcs r1, r1, #4 ");
sl@0
   862
	asm("ldrle r1, [r1] ");
sl@0
   863
	asm("addeq r1, r1, #4 ");				// r1=this.Ptr()
sl@0
   864
	asm("add r3, r1, r2 ");					// r3=this.Ptr()+aPos
sl@0
   865
	asm("sub r2, r12, r2 ");				// r2=Length()-aPos (=newMaxLen)
sl@0
   866
	asm("orr r1, r2, #0x10000000 ");		// r1=Length()-aPos + EPtrC (=newLen/Type)
sl@0
   867
	asm("stmia r0, {r1,r3} ");
sl@0
   868
	__JUMP(,lr);
sl@0
   869
	}
sl@0
   870
sl@0
   871
__NAKED__ EXPORT_C TPtrC8 TDesC8::Mid(TInt /*aPos*/,TInt /*aLength*/) const
sl@0
   872
//
sl@0
   873
// Extract the middle portion of the descriptor.
sl@0
   874
//
sl@0
   875
	{
sl@0
   876
	// On entry r0=return store ptr, r1=this, r2=aPos, r3=aLength
sl@0
   877
	// Return TPtrC8 ([r0]=length/type,[r0,#4]=Ptr)
sl@0
   878
	asm("ldr r12, [r1], #4 ");				// r12=this.length/type
sl@0
   879
	asm("cmp r12, #0x50000000 ");			// check valid descriptor type
sl@0
   880
	asm("bcs Des8PanicBadDesType__Fv ");
sl@0
   881
	asm("eor r12, r12, r12, lsr #1 ");
sl@0
   882
	asm("msr cpsr_flg, r12 ");
sl@0
   883
	asm("ldr r12, [r1, #-4] ");
sl@0
   884
	asm("addcs r1, r1, #4 ");
sl@0
   885
	asm("ldrle r1, [r1] ");
sl@0
   886
	asm("bic r12, r12, #0xF0000000 ");			// r12=Length()
sl@0
   887
	asm("addeq r1, r1, #4 ");				// r1=this.Ptr()
sl@0
   888
	asm("cmp r2, #0 ");					// check aPos>=0
sl@0
   889
	asm("subge r12, r12, r2 ");				// if so, r12=Length()-aPos
sl@0
   890
	asm("cmpge r12, r3 ");					// and check Length()-aPos>=aLength
sl@0
   891
	asm("addge r2, r1, r2 ");				// if so r2=this.Ptr()+aPos
sl@0
   892
	asm("orrge r1, r3, #0x10000000 ");			// and r1=aLength + EPtrC
sl@0
   893
	asm("stmgeia r0, {r1,r2} ");
sl@0
   894
	__JUMP(ge,lr);
sl@0
   895
	asm("b Des8PanicPosOutOfRange__Fv ");
sl@0
   896
	}
sl@0
   897
#endif
sl@0
   898
sl@0
   899
__NAKED__ EXPORT_C void TDes8::Zero()
sl@0
   900
//
sl@0
   901
// Zero the buffer.
sl@0
   902
//
sl@0
   903
	{
sl@0
   904
	asm("ldr r1, [r0] ");				// r1=length/type
sl@0
   905
	asm("and r1, r1, #0xF0000000 ");	// r1=type field, zero length
sl@0
   906
	asm("cmp r1, #0x40000000 ");		// check for EBufCPtr
sl@0
   907
	asm("str r1, [r0] ");				// store zero length
sl@0
   908
	__JUMP(ne,lr);
sl@0
   909
	asm("ldr r2, [r0, #8] ");			// r2 = pointer to TBufCBase
sl@0
   910
	asm("mov r1, #0 ");
sl@0
   911
	asm("str r1, [r2] ");				// update length of TBufCBase
sl@0
   912
	__JUMP(,lr);
sl@0
   913
	}
sl@0
   914
sl@0
   915
#ifndef __KERNEL_MODE__
sl@0
   916
__NAKED__ EXPORT_C void TDes8::ZeroTerminate()
sl@0
   917
//
sl@0
   918
// Zero terminate at Length().
sl@0
   919
//
sl@0
   920
	{
sl@0
   921
	// Fall through to PtrZ below...
sl@0
   922
	}
sl@0
   923
sl@0
   924
__NAKED__ EXPORT_C const TUint8 *TDes8::PtrZ()
sl@0
   925
//
sl@0
   926
// Return a pointer to a 0 terminated string.
sl@0
   927
//
sl@0
   928
	{
sl@0
   929
	asm("ldmia r0, {r1,r2} ");			// r1=length/type, r2=maxlength
sl@0
   930
	asm("bic r3, r1, #0xF0000000 ");	// r3=Length();
sl@0
   931
	asm("cmp r3, r2 ");					// check Length()<MaxLength()
sl@0
   932
	asm("bge  " CSM_Z20Des8PanicDesOverflowv);
sl@0
   933
	asm("cmp r1, #0x50000000 ");
sl@0
   934
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
   935
	asm("eor r1, r1, r1, lsr #1 ");
sl@0
   936
	asm("msr cpsr_flg, r1 ");
sl@0
   937
	asm("add r0, r0, #4 ");
sl@0
   938
	asm("addcs r0, r0, #4 ");
sl@0
   939
	asm("ldrle r0, [r0] ");
sl@0
   940
	asm("addeq r0, r0, #4 ");			// r0=Ptr()
sl@0
   941
	asm("mov r2, #0 ");
sl@0
   942
	asm("strb r2, [r0, r3] ");			// Ptr()[Length()]=0;
sl@0
   943
	__JUMP(,lr);
sl@0
   944
	}
sl@0
   945
#endif
sl@0
   946
sl@0
   947
__NAKED__ EXPORT_C void TDes8::Append(TChar /*aChar*/)
sl@0
   948
//
sl@0
   949
// Add a character at the end of the string.
sl@0
   950
//
sl@0
   951
	{
sl@0
   952
	asm("ldmia r0, {r2,r3} ");			// r2=length/type, r3=maxlength
sl@0
   953
	asm("bic r12, r2, #0xF0000000 ");	// r12=Length();
sl@0
   954
	asm("cmp r12, r3 ");				// check Length()<MaxLength()
sl@0
   955
	asm("bge  " CSM_Z20Des8PanicDesOverflowv);
sl@0
   956
	asm("cmp r2, #0x50000000 ");
sl@0
   957
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
   958
	asm("add r2, r2, #1 ");				// increment length by 1
sl@0
   959
	asm("str r2, [r0] ");				// store new length
sl@0
   960
	asm("eor r2, r2, r2, lsr #1 ");
sl@0
   961
	asm("msr cpsr_flg, r2 ");
sl@0
   962
	asm("add r2, r0, #4 ");				// r2=this+4
sl@0
   963
	asm("addcs r2, r2, #4 ");
sl@0
   964
	asm("ldrle r2, [r2] ");
sl@0
   965
	asm("addeq r3, r12, #1 ");			// if EBufCPtr, r3=Length()+1
sl@0
   966
	asm("streq r3, [r2], #4 ");			// and update length of TBufCBase, r2=Ptr()
sl@0
   967
	asm("strb r1, [r2, r12] ");			// Ptr()[Length()]=aChar;
sl@0
   968
	__JUMP(,lr);
sl@0
   969
	}
sl@0
   970
sl@0
   971
__NAKED__ EXPORT_C void TDes8::Append(const TDesC8& /*aDes*/)
sl@0
   972
//
sl@0
   973
// Append a descriptor to this descriptor.
sl@0
   974
//
sl@0
   975
	{
sl@0
   976
	asm("ldr r3, [r1], #4 ");			// r3=aDes.length/type
sl@0
   977
	asm("cmp r3, #0x50000000 ");
sl@0
   978
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
   979
	asm("bics r2, r3, #0xF0000000 ");	// r2=aDes.Length()
sl@0
   980
	__JUMP(eq,lr);
sl@0
   981
	asm("eor r3, r3, r3, lsr #1 ");
sl@0
   982
	asm("msr cpsr_flg, r3 ");
sl@0
   983
	asm("addcs r1, r1, #4 ");
sl@0
   984
	asm("ldrle r1, [r1] ");
sl@0
   985
	asm("addeq r1, r1, #4 ");			// r1=aDes.Ptr()
sl@0
   986
	asm("b appendbody ");	// use following routine for rest of job
sl@0
   987
	}
sl@0
   988
sl@0
   989
__NAKED__ EXPORT_C void TDes8::Append(const TUint8* /*aBuf*/,TInt /*aLength*/)
sl@0
   990
//
sl@0
   991
// Append aLength from aBuf characters to the descriptor.
sl@0
   992
//
sl@0
   993
	{
sl@0
   994
	asm("cmp r2, #0 ");					// check aLength>=0
sl@0
   995
	__JUMP(eq,lr);
sl@0
   996
	asm("blt  " CSM_Z23Des8PanicLengthNegativev);
sl@0
   997
	asm("appendbody: ");
sl@0
   998
	asm("ldmia r0, {r3,r12} ");			// r3=type/length, r12=maxlength
sl@0
   999
	asm("cmp r3, #0x50000000 ");
sl@0
  1000
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
  1001
	asm("bic r3, r3, #0xF0000000 ");	// r3=Length()
sl@0
  1002
	asm("sub r12, r12, r3 ");			// r12=MaxLength-Length
sl@0
  1003
	asm("cmp r2, r12 ");				// check aLength<=(MaxLength-Length)
sl@0
  1004
	asm("bgt  " CSM_Z20Des8PanicDesOverflowv);
sl@0
  1005
	asm("ldr r12, [r0] ");
sl@0
  1006
	asm("add r12, r12, r2 ");			// new length/type field
sl@0
  1007
	asm("str r12, [r0], #4 ");			// store it
sl@0
  1008
	asm("eor r12, r12, r12, lsr #1 ");
sl@0
  1009
	asm("msr cpsr_flg, r12 ");
sl@0
  1010
	asm("addcs r0, r0, #4 ");
sl@0
  1011
	asm("ldrle r0, [r0] ");
sl@0
  1012
	asm("ldreq r12, [r0] ");			// fetch length from TBufCBase
sl@0
  1013
	asm("addeq r12, r12, r2 ");			// add aLength
sl@0
  1014
	asm("streq r12, [r0], #4 ");		// update length of TBufCBase, r0=Ptr()
sl@0
  1015
	asm("add r0, r0, r3 ");				// r0=Ptr()+Length()
sl@0
  1016
	asm("b memmove ");
sl@0
  1017
	}
sl@0
  1018
sl@0
  1019
__NAKED__ EXPORT_C void TDes8::FillZ()
sl@0
  1020
//
sl@0
  1021
// Fill the descriptor with 0.
sl@0
  1022
//
sl@0
  1023
	{
sl@0
  1024
	asm("ldr r2, [r0] ");				// r2=length/type
sl@0
  1025
	asm("cmp r2, #0x50000000 ");
sl@0
  1026
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
  1027
	asm("bic r1, r2, #0xF0000000 ");	// r1=Length()
sl@0
  1028
	asm("eor r2, r2, r2, lsr #1 ");
sl@0
  1029
	asm("msr cpsr_flg, r2 ");
sl@0
  1030
	asm("add r0, r0, #4 ");
sl@0
  1031
	asm("addcs r0, r0, #4 ");
sl@0
  1032
	asm("ldrle r0, [r0] ");
sl@0
  1033
	asm("addeq r0, r0, #4 ");			// r0=Ptr()
sl@0
  1034
	asm("b memclr ");
sl@0
  1035
	}
sl@0
  1036
sl@0
  1037
__NAKED__ EXPORT_C void TDes8::Fill(TChar /*aChar*/)
sl@0
  1038
//
sl@0
  1039
// Fill the descriptor with aChar.
sl@0
  1040
//
sl@0
  1041
	{
sl@0
  1042
	asm("ldr r3, [r0] ");				// r3=length/type
sl@0
  1043
	asm("cmp r3, #0x50000000 ");
sl@0
  1044
	asm("bcs  " CSM_Z19Des8PanicBadDesTypev);
sl@0
  1045
	asm("bic r2, r3, #0xF0000000 ");	// r2=Length()
sl@0
  1046
	asm("eor r3, r3, r3, lsr #1 ");
sl@0
  1047
	asm("msr cpsr_flg, r3 ");
sl@0
  1048
	asm("add r0, r0, #4 ");
sl@0
  1049
	asm("addcs r0, r0, #4 ");
sl@0
  1050
	asm("ldrle r0, [r0] ");
sl@0
  1051
	asm("addeq r0, r0, #4 ");			// r0=Ptr()
sl@0
  1052
	asm("b memset ");					// memset(Ptr(),aChar,Length())
sl@0
  1053
	}
sl@0
  1054
#endif //__DES8_MACHINE_CODED__
sl@0
  1055
sl@0
  1056
#ifdef __DES_MACHINE_CODED__
sl@0
  1057
__NAKED__ GLDEF_C TInt __DoConvertNum(TUint /*aVal*/, TRadix /*aRadix*/, TUint /*aA*/, TUint8*& /*aDest*/)
sl@0
  1058
	{
sl@0
  1059
	asm("ldr ip, [r3] ");				// ip = aDest
sl@0
  1060
	asm("cmp r1, #16 ");
sl@0
  1061
	asm("beq do_convert_hex ");
sl@0
  1062
	asm("cmp r1, #10 ");
sl@0
  1063
	asm("beq do_convert_dec ");
sl@0
  1064
#ifdef __KERNEL_MODE__
sl@0
  1065
	asm("mov r0, #%a0" : : "i" ((TInt)EInvalidRadix));
sl@0
  1066
	asm("b  " CSM_Z5Panic9TCdtPanic);
sl@0
  1067
#else // !__KERNEL_MODE__
sl@0
  1068
	asm("cmp r1, #2 ");
sl@0
  1069
	asm("beq do_convert_bin ");
sl@0
  1070
	asm("cmp r1, #8 ");
sl@0
  1071
	asm("beq do_convert_oct ");
sl@0
  1072
	asm("do_convert_any: ");
sl@0
  1073
	asm("stmfd sp!, {r4-r8,lr} ");
sl@0
  1074
	asm("mov r5, r1 ");					// save radix
sl@0
  1075
	asm("and r6, r2, #0xff ");
sl@0
  1076
	asm("sub r6, r6, #10 ");			// save aA - 10
sl@0
  1077
	asm("mov r4, ip ");					// r4 = aDest
sl@0
  1078
	asm("mov r7, r3 ");					// save &aDest
sl@0
  1079
	asm("mov r8, r2");					// save aA
sl@0
  1080
	asm("1: ");
sl@0
  1081
	asm("mov r1, r5 ");					// r1 = radix
sl@0
  1082
#ifndef __EABI__
sl@0
  1083
	asm(".extern __umodsi3 ");
sl@0
  1084
	asm("bl __umodsi3 ");				// do division, quotient->r3, rem->r0
sl@0
  1085
	asm("mov r1, r0");					// move to make regs same as EABI function
sl@0
  1086
	asm("mov r0, r3");
sl@0
  1087
#else //__EABI__
sl@0
  1088
	asm(".extern __aeabi_uidivmod ");
sl@0
  1089
	asm("bl __aeabi_uidivmod ");		// do division, quotient->r0, rem->r1
sl@0
  1090
#endif //__EABI__
sl@0
  1091
	asm("cmp r1, #9 ");
sl@0
  1092
	asm("addhi r1, r1, r6 ");			// r1 = (r1 > 9) ? (r1 + (aA - 10)) : r1 + '0'
sl@0
  1093
	asm("addls r1, r1, #0x30 ");
sl@0
  1094
	asm("tst r8, #0x100 ");
sl@0
  1095
	asm("strneh r1, [r4, #-2]! ");		// *--r4 = (TUint16)r1
sl@0
  1096
	asm("streqb r1, [r4, #-1]! ");		// *--r4 = (TUint8)r1
sl@0
  1097
	asm("movs r1, r0 ");				// new aVal into r1
sl@0
  1098
	asm("bne 1b ");
sl@0
  1099
	asm("ldr ip, [r7] ");				// ip can be scratched by __aeabi_uidivmod
sl@0
  1100
	asm("str r4, [r7] ");				// aDest = r4
sl@0
  1101
	asm("sub r0, ip, r4 ");				// return aDest - r4
sl@0
  1102
	__POPRET("r4-r8,");
sl@0
  1103
sl@0
  1104
	asm("do_convert_bin: ");
sl@0
  1105
	asm("mov r2, r2, lsl #22 ");		// aA bit 8 into bit 30
sl@0
  1106
	asm("adds r2, r2, r2 ");			// set V flag = aA bit 8
sl@0
  1107
	asm("1: ");
sl@0
  1108
	asm("movs r0, r0, lsr #1 ");		// aVal>>=1, bit 0 into carry, V unaffected
sl@0
  1109
	asm("mov r1, #0x30 ");				// r1 = '0'
sl@0
  1110
	asm("adc r1, r1, #0 ");				// add in carry
sl@0
  1111
	asm("strvsh r1, [ip, #-2]! ");		// if aA bit 8 set, store 16 bits
sl@0
  1112
	asm("strvcb r1, [ip, #-1]! ");		// else store 8 bits
sl@0
  1113
	asm("bne 1b ");						// loop back if aVal still nonzero
sl@0
  1114
	asm("ldr r1, [r3] ");				// r1 = original aDest
sl@0
  1115
	asm("str ip, [r3] ");				// aDest = ip
sl@0
  1116
	asm("sub r0, r1, ip ");				// return aDest - ip
sl@0
  1117
	__JUMP(,lr);
sl@0
  1118
sl@0
  1119
	asm("do_convert_oct: ");
sl@0
  1120
	asm("mov r2, r2, lsl #22 ");		// aA bit 8 into bit 30
sl@0
  1121
	asm("adds r2, r2, r2 ");			// set V flag = aA bit 8
sl@0
  1122
	asm("1: ");
sl@0
  1123
	asm("and r1, r0, #7 ");				// r1 = aVal & 7
sl@0
  1124
	asm("movs r0, r0, lsr #3 ");		// aVal>>=3, set Z accordingly, V unaffected
sl@0
  1125
	asm("add r1, r1, #0x30 ");			// r1 += '0'
sl@0
  1126
	asm("strvsh r1, [ip, #-2]! ");		// if aA bit 8 set, store 16 bits
sl@0
  1127
	asm("strvcb r1, [ip, #-1]! ");		// else store 8 bits
sl@0
  1128
	asm("bne 1b ");						// loop back if aVal still nonzero
sl@0
  1129
	asm("ldr r1, [r3] ");				// r1 = original aDest
sl@0
  1130
	asm("str ip, [r3] ");				// aDest = ip
sl@0
  1131
	asm("sub r0, r1, ip ");				// return aDest - ip
sl@0
  1132
	__JUMP(,lr);
sl@0
  1133
#endif //__KERNEL_MODE__
sl@0
  1134
sl@0
  1135
	asm("do_convert_hex: ");
sl@0
  1136
	asm("mov r1, r2, lsl #22 ");		// aA bit 8 into r1 bit 30
sl@0
  1137
	asm("adds r1, r1, r1 ");			// set V flag = aA bit 8
sl@0
  1138
	asm("and r2, r2, #0xff ");
sl@0
  1139
	asm("sub r2, r2, #0x40 ");
sl@0
  1140
	asm("1: ");
sl@0
  1141
	asm("and r1, r0, #15 ");			// r1 = aVal & 15
sl@0
  1142
	asm("add r1, r1, #0x36 ");			// r1 += '0'+6
sl@0
  1143
	asm("tst r1, #0x40 ");
sl@0
  1144
	asm("subeq r1, r1, #6 ");
sl@0
  1145
	asm("addne r1, r1, r2 ");
sl@0
  1146
	asm("movs r0, r0, lsr #4 ");		// aVal>>=4, V unaffected
sl@0
  1147
	asm("strvsh r1, [ip, #-2]! ");		// if aA bit 8 set, store 16 bits
sl@0
  1148
	asm("strvcb r1, [ip, #-1]! ");		// else store 8 bits
sl@0
  1149
	asm("bne 1b ");						// loop back if aVal still nonzero
sl@0
  1150
	asm("ldr r1, [r3] ");				// r1 = original aDest
sl@0
  1151
	asm("str ip, [r3] ");				// aDest = ip
sl@0
  1152
	asm("sub r0, r1, ip ");				// return aDest - ip
sl@0
  1153
	__JUMP(,lr);
sl@0
  1154
sl@0
  1155
	asm("do_convert_dec: ");
sl@0
  1156
	asm("and r2, r2, #0x100 ");			// mask all bits of aA except bit 8
sl@0
  1157
	asm("orr r3, r3, r2, lsr #8 ");		// r3 bit 0 = aA bit 8
sl@0
  1158
	asm("1: ");
sl@0
  1159
    asm("sub r1, r0, #10 ");			// divide aVal by 10, r0=quotient, r1=remainder
sl@0
  1160
    asm("sub r0, r0, r0, lsr #2 ");
sl@0
  1161
    asm("add r0, r0, r0, lsr #4 ");
sl@0
  1162
    asm("add r0, r0, r0, lsr #8 ");
sl@0
  1163
    asm("add r0, r0, r0, lsr #16 ");
sl@0
  1164
	asm("mov r0, r0, lsr #3 ");
sl@0
  1165
	asm("add r2, r0, r0, lsl #2 ");
sl@0
  1166
	asm("subs r1, r1, r2, lsl #1 ");
sl@0
  1167
	asm("addpl r0, r0, #1 ");
sl@0
  1168
	asm("addmi r1, r1, #10 ");
sl@0
  1169
	asm("add r1, r1, #0x30 ");			// add '0' to remainder
sl@0
  1170
	asm("tst r3, #1 ");					// test aA bit 8
sl@0
  1171
	asm("strneh r1, [ip, #-2]! ");		// if aA bit 8 set, store 16 bits
sl@0
  1172
	asm("streqb r1, [ip, #-1]! ");		// else store 8 bits
sl@0
  1173
	asm("teq r0, #0 ");
sl@0
  1174
	asm("bne 1b ");						// loop back if aVal still nonzero
sl@0
  1175
	asm("bic r3, r3, #1 ");
sl@0
  1176
	asm("ldr r1, [r3] ");				// r1 = original aDest
sl@0
  1177
	asm("str ip, [r3] ");				// aDest = ip
sl@0
  1178
	asm("sub r0, r1, ip ");				// return aDest - ip
sl@0
  1179
	__JUMP(,lr);
sl@0
  1180
	}
sl@0
  1181
sl@0
  1182
__NAKED__ GLDEF_C TInt __DoConvertNum(TUint64 /*aVal*/, TRadix /*aRadix*/, TUint /*aA*/, TUint8*& /*aDest*/)
sl@0
  1183
	{
sl@0
  1184
	asm("ldr ip, [sp] ");				// ip = &aDest
sl@0
  1185
	asm("cmp r2, #16 ");
sl@0
  1186
	asm("beq do_convert_hex64 ");
sl@0
  1187
	asm("cmp r2, #10 ");
sl@0
  1188
	asm("beq do_convert_dec64 ");
sl@0
  1189
#ifdef __KERNEL_MODE__
sl@0
  1190
	asm("mov r0, #%a0" : : "i" ((TInt)EInvalidRadix));
sl@0
  1191
	asm("b  " CSM_Z5Panic9TCdtPanic);
sl@0
  1192
#else // !__KERNEL_MODE__
sl@0
  1193
	asm("cmp r2, #2 ");
sl@0
  1194
	asm("beq do_convert_bin64 ");
sl@0
  1195
	asm("cmp r2, #8 ");
sl@0
  1196
	asm("beq do_convert_oct64 ");
sl@0
  1197
	asm("stmfd sp!, {r4-r8,lr} ");
sl@0
  1198
	asm("ldr r4, [ip] ");				// r4 = aDest
sl@0
  1199
	asm("mov r5, r2 ");					// save radix
sl@0
  1200
	asm("and r6, r3, #0xff ");			// r6 = aA & 0xff
sl@0
  1201
	asm("sub r6, r6, #10 ");			// save a - 10
sl@0
  1202
	asm("mov r7, ip ");					// save &aDest
sl@0
  1203
	asm("mov r8, r3");					// save aA
sl@0
  1204
	asm("teq r1, #0 ");					// aVal > 0xffffffffu
sl@0
  1205
	asm("beq 2f ");
sl@0
  1206
	asm("1: ");
sl@0
  1207
	asm("mov r3, #0 ");
sl@0
  1208
	asm("mov r2, r5 ");					// r3:r2 = radix
sl@0
  1209
#ifndef __EABI__
sl@0
  1210
	asm("stmfd sp!, {r4-r6} ");			// push the registers that are scratched by UDiv01
sl@0
  1211
	asm(".extern UDiv01 ");
sl@0
  1212
	asm("bl UDiv01 ");					// do division, quotient->r5:r4, rem->r6:r3
sl@0
  1213
	asm("mov r0, r4");					// move to make regs same as EABI function
sl@0
  1214
	asm("mov r1, r5");
sl@0
  1215
	asm("mov r2, r3");
sl@0
  1216
	asm("mov r3, r6");
sl@0
  1217
	asm("ldmfd sp!, {r4-r6} ");			// pop the registers that are scratched by UDiv01
sl@0
  1218
#else //__EABI__
sl@0
  1219
	asm(".extern __aeabi_uldivmod ");
sl@0
  1220
	asm("bl __aeabi_uldivmod ");		// do division, quotient->r1:r0, rem->r3:r2
sl@0
  1221
#endif //__EABI__
sl@0
  1222
	asm("cmp r2, #9 ");
sl@0
  1223
	asm("addhi r2, r2, r6 ");			// r2 = (r2>9) ? r2+aA-10 : r2+'0'
sl@0
  1224
	asm("addls r2, r2, #0x30 ");
sl@0
  1225
	asm("tst r8, #0x100 ");
sl@0
  1226
	asm("strneh r2, [r4, #-2]! ");		// *--r4 = (TUint16)r2
sl@0
  1227
	asm("streqb r2, [r4, #-1]! ");		// *--r4 = (TUint8)r2
sl@0
  1228
	asm("teq r1, #0 ");					// new aVal > 0xffffffffu
sl@0
  1229
	asm("bne 1b ");
sl@0
  1230
	asm("2: ");
sl@0
  1231
	asm("mov r2, r8 ");					// r2 = aA
sl@0
  1232
	asm("ldr r1, [r7] ");				// r1 = aDest
sl@0
  1233
	asm("mov r3, r7 ");					// r3 = &aDest
sl@0
  1234
	asm("sub r6, r1, r4 ");				// r6 = aDest - r4
sl@0
  1235
	asm("mov r1, r5 ");					// r1 = radix
sl@0
  1236
	asm("str r4, [r3] ");				// aDest = r4
sl@0
  1237
	asm("mov ip, r4 ");					// ip = aDest
sl@0
  1238
	asm("bl do_convert_any ");
sl@0
  1239
	asm("add r0, r0, r6 ");				// r0 += r6
sl@0
  1240
	__POPRET("r4-r8,");
sl@0
  1241
sl@0
  1242
	asm("do_convert_bin64: ");
sl@0
  1243
	asm("mov r2, ip ");					// r2 = &aDest
sl@0
  1244
	asm("ldr ip, [ip] ");				// ip = aDest
sl@0
  1245
	asm("mov r3, r3, lsl #22 ");		// aA bit 8 into bit 30
sl@0
  1246
	asm("adds r3, r3, r3 ");			// set V flag = aA bit 8
sl@0
  1247
	asm("teq r1, #0 ");					// if (aVal <= 0xffffffffu)
sl@0
  1248
	asm("moveq r1, ip ");				// r1 = orig. aDest in second half
sl@0
  1249
	asm("beq 2f ");						// branch to second half of the loop
sl@0
  1250
	asm("1: ");
sl@0
  1251
	asm("movs r0, r0, lsr #1 ");		// aVal >>= 1, bit 0 into carry, V unaffected
sl@0
  1252
	asm("mov r3, #0x30 ");				// r3 = '0'
sl@0
  1253
	asm("adc r3, r3, #0 ");				// add in carry
sl@0
  1254
	asm("strvsh r3, [ip, #-2]! ");		// if aA bit 8 set, store 16 bits
sl@0
  1255
	asm("strvcb r3, [ip, #-1]! ");		// else store 8 bits
sl@0
  1256
	asm("bne 1b ");						// loop back if (aVal & 0xffffffffu) still nonzero
sl@0
  1257
	asm("ldr r0, [r2] ");				// r0 = original aDest
sl@0
  1258
	asm("subvc r0, r0, #32 ");			// r0 = end of buffer for first word (8-bit descriptor)
sl@0
  1259
	asm("subvs r0, r0, #64 ");			// r0 = end of buffer for first word (16-bit descriptor)
sl@0
  1260
	asm("teq ip, r0 ");					// don't pad if we have already emitted 32 bits
sl@0
  1261
	asm("beq finish_bin_zero_pad ");
sl@0
  1262
	asm("bin_zero_pad: ");
sl@0
  1263
	asm("mov r3, #0x30 ");				// r3 = '0'
sl@0
  1264
	asm("bin_zero_pad_loop: ");
sl@0
  1265
	asm("strvsh r3, [ip, #-2]! ");		// if aA bit 8 set, store 16 bits
sl@0
  1266
	asm("strvcb r3, [ip, #-1]! ");		// else store 8 bits
sl@0
  1267
	asm("teq ip, r0 ");
sl@0
  1268
	asm("bne bin_zero_pad_loop ");		// loop back if padding not complete
sl@0
  1269
	asm("finish_bin_zero_pad: ");
sl@0
  1270
	asm("addvc r0, r0, #32 ");			// r0 = original aDest
sl@0
  1271
	asm("addvs r0, r0, #64 ");			// r0 = original aDest
sl@0
  1272
	asm("mov r3, r1 ");
sl@0
  1273
	asm("mov r1, r0 ");
sl@0
  1274
	asm("mov r0, r3 ");					// r1 = orig aDest, r0 = aVal >> 32
sl@0
  1275
	asm("2: ");
sl@0
  1276
	asm("movs r0, r0, lsr #1 ");		// aVal >>= 1, bit 0 into carry, V unaffected
sl@0
  1277
	asm("mov r3, #0x30 ");				// r3 = '0'
sl@0
  1278
	asm("adc r3, r3, #0 ");				// add in carry
sl@0
  1279
	asm("strvsh r3, [ip, #-2]! ");		// if aA bit 8 set, store 16 bits
sl@0
  1280
	asm("strvcb r3, [ip, #-1]! ");		// else store 8 bits
sl@0
  1281
	asm("bne 2b ");						// loop back if aVal still nonzero
sl@0
  1282
	asm("str ip, [r2] ");				// aDest = ip
sl@0
  1283
	asm("sub r0, r1, ip ");				// return aDest - ip
sl@0
  1284
	__JUMP(,lr);
sl@0
  1285
sl@0
  1286
	asm("do_convert_oct64: ");			// Convert as 31 + 33 bits when > 32 bits
sl@0
  1287
	asm("mov r2, ip ");					// r2 = &aDest
sl@0
  1288
	asm("ldr ip, [ip] ");				// ip = aDest
sl@0
  1289
	asm("mov r3, r3, lsl #22 ");		// aA bit 8 into bit 30
sl@0
  1290
	asm("adds r3, r3, r3 ");			// set V flag = aA bit 8
sl@0
  1291
	asm("teq r1, #0 ");					// if (aVal <= 0xffffffffu)
sl@0
  1292
	asm("moveq r1, ip ");				// r1 = orig. aDest in second half
sl@0
  1293
	asm("beq 3f ");						// branch to second half of the loop
sl@0
  1294
	asm("and r3, r0, #7 ");				// r3 = aVal & 7
sl@0
  1295
	asm("mov r0, r0, lsr #3 ");			// aVal>>=3, set Z accordingly, V unaffected
sl@0
  1296
	asm("orr r0, r0, r1, lsl #29 ");	//  note we now have the bottom 33 bits in r0:r3[2:0]
sl@0
  1297
	asm("ands r0, r0, #0x3fffffff ");	//  and the top 31 bits in r1
sl@0
  1298
	asm("mov r1, r1, lsr #1 ");
sl@0
  1299
	asm("add r3, r3, #0x30 ");			// r3 += '0'
sl@0
  1300
	asm("strvsh r3, [ip, #-2]! ");		// if aA bit 8 set, store 16 bits
sl@0
  1301
	asm("strvcb r3, [ip, #-1]! ");		// else store 8 bits
sl@0
  1302
	asm("beq 2f ");
sl@0
  1303
	asm("1: ");
sl@0
  1304
	asm("and r3, r0, #7 ");				// r3 = aVal & 7
sl@0
  1305
	asm("movs r0, r0, lsr #3 ");		// aVal>>=3, set Z accordingly, V unaffected
sl@0
  1306
	asm("add r3, r3, #0x30 ");			// r3 += '0'
sl@0
  1307
	asm("strvsh r3, [ip, #-2]! ");		// if aA bit 8 set, store 16 bits
sl@0
  1308
	asm("strvcb r3, [ip, #-1]! ");		// else store 8 bits
sl@0
  1309
	asm("bne 1b ");						// loop back if (aVal & 0xffffffff) still nonzero
sl@0
  1310
	asm("2: ");
sl@0
  1311
	asm("ldr r0, [r2] ");				// r0 = original aDest
sl@0
  1312
	asm("subvc r0, r0, #11 ");			// r0 = end of buffer for first word (8-bit descriptor)
sl@0
  1313
	asm("subvs r0, r0, #22 ");			// r0 = end of buffer for first word (16-bit descriptor)
sl@0
  1314
	asm("teq ip, r0 ");					// don't pad if we have already emitted 32 bits
sl@0
  1315
	asm("beq finish_oct_zero_pad ");
sl@0
  1316
	asm("oct_zero_pad: ");
sl@0
  1317
	asm("mov r3, #0x30 ");				// r3 = '0'
sl@0
  1318
	asm("oct_zero_pad_loop: ");
sl@0
  1319
	asm("strvsh r3, [ip, #-2]! ");		// if aA bit 8 set, store 16 bits
sl@0
  1320
	asm("strvcb r3, [ip, #-1]! ");		// else store 8 bits
sl@0
  1321
	asm("teq ip, r0 ");
sl@0
  1322
	asm("bne oct_zero_pad_loop ");		// loop back if padding not complete
sl@0
  1323
	asm("finish_oct_zero_pad: ");
sl@0
  1324
	asm("addvc r0, r0, #11 ");			// r0 = original aDest
sl@0
  1325
	asm("addvs r0, r0, #22 ");			// r0 = original aDest
sl@0
  1326
	asm("mov r3, r0 ");
sl@0
  1327
	asm("mov r0, r1 ");
sl@0
  1328
	asm("mov r1, r3 ");					// r1 = orig aDest, r0 = aVal >> 32
sl@0
  1329
	asm("3: ");
sl@0
  1330
	asm("and r3, r0, #7 ");				// r3 = aVal & 7
sl@0
  1331
	asm("movs r0, r0, lsr #3 ");		// aVal>>=3, set Z accordingly, V unaffected
sl@0
  1332
	asm("add r3, r3, #0x30 ");			// r3 += '0'
sl@0
  1333
	asm("strvsh r3, [ip, #-2]! ");		// if aA bit 8 set, store 16 bits
sl@0
  1334
	asm("strvcb r3, [ip, #-1]! ");		// else store 8 bits
sl@0
  1335
	asm("bne 3b ");						// loop back if aVal still nonzero
sl@0
  1336
	asm("str ip, [r2] ");				// aDest = ip
sl@0
  1337
	asm("sub r0, r1, ip ");				// return aDest - ip
sl@0
  1338
	__JUMP(,lr);
sl@0
  1339
sl@0
  1340
#endif //__KERNEL_MODE__
sl@0
  1341
sl@0
  1342
	asm("do_convert_hex64: ");
sl@0
  1343
	asm("ldr ip, [ip] ");				// ip = aDest
sl@0
  1344
	asm("mov r2, r3, lsl #22 ");		// aA bit 8 into r2 bit 30
sl@0
  1345
	asm("adds r2, r2, r2 ");			// set V flag = aA bit 8
sl@0
  1346
	asm("and r3, r3, #0xff ");			// aA = aA & 0xff
sl@0
  1347
	asm("teq r1, #0 ");					// if (aVal <= 0xffffffffu)
sl@0
  1348
	asm("sub r3, r3, #0x40 ");			// bias by ('0' + 16) either way => r3 = aA - ('0' + 16)
sl@0
  1349
	asm("moveq r1, ip ");				// r1 = orig. aDest in second half
sl@0
  1350
	asm("beq 2f ");						// branch to second half of the loop
sl@0
  1351
	asm("1: ");
sl@0
  1352
	asm("and r2, r0, #0xf ");			// r2 = aVal & 0xf
sl@0
  1353
	asm("add r2, r2, #0x36 ");			// r2 += ('0' + 6)
sl@0
  1354
	asm("tst r2, #0x40 ");				// if ((aVal & 0xf) > 9)
sl@0
  1355
	asm("addne r2, r2, r3 ");			// r2 = (aVal & 0xf) + (aA - 10)
sl@0
  1356
	asm("subeq r2, r2, #6 ");			// r2 = (aVal & 0xf) + '0'
sl@0
  1357
	asm("movs r0, r0, lsr #4 ");		// aVal>>=4, V unaffected
sl@0
  1358
	asm("strvsh r2, [ip, #-2]! ");		// if aA bit 8 set, store 16 bits
sl@0
  1359
	asm("strvcb r2, [ip, #-1]! ");		// else store 8 bits
sl@0
  1360
	asm("bne 1b ");						// loop back if (aVal & 0xffffffffu) still nonzero
sl@0
  1361
	asm("ldr r0, [sp] ");				// r0 = &aDest
sl@0
  1362
	asm("ldr r2, [r0] ");				// r2 = original aDest
sl@0
  1363
	asm("subvc r0, r2, #8 ");			// r0 = end of buffer for first word (8-bit descriptor)
sl@0
  1364
	asm("subvs r0, r2, #16 ");			// r0 = end of buffer for first word (16-bit descriptor)
sl@0
  1365
	asm("teq ip, r0 ");					// don't pad if we have already emitted 32 bits
sl@0
  1366
	asm("beq finish_hex_zero_pad ");
sl@0
  1367
	asm("hex_zero_pad: ");
sl@0
  1368
	asm("mov r2, #0x30 ");				// r3 = '0'
sl@0
  1369
	asm("hex_zero_pad_loop: ");
sl@0
  1370
	asm("strvsh r2, [ip, #-2]! ");		// if aA bit 8 set, store 16 bits
sl@0
  1371
	asm("strvcb r2, [ip, #-1]! ");		// else store 8 bits
sl@0
  1372
	asm("teq ip, r0 ");
sl@0
  1373
	asm("bne hex_zero_pad_loop ");		// loop back if padding not complete
sl@0
  1374
	asm("finish_hex_zero_pad: ");
sl@0
  1375
	asm("addvc r0, r0, #8 ");			// r0 = original aDest
sl@0
  1376
	asm("addvs r0, r0, #16 ");			// r0 = original aDest
sl@0
  1377
	asm("mov r2, r0 ");
sl@0
  1378
	asm("mov r0, r1 ");
sl@0
  1379
	asm("mov r1, r2 ");					// r1 = orig aDest, r0 = aVal >> 32
sl@0
  1380
	asm("2: ");
sl@0
  1381
	asm("and r2, r0, #0xf ");			// r2 = aVal & 0xf
sl@0
  1382
	asm("add r2, r2, #0x36 ");			// r2 += '0'+6
sl@0
  1383
	asm("tst r2, #0x40 ");
sl@0
  1384
	asm("subeq r2, r2, #6 ");			// r2 = (aVal & 0xf) + '0'
sl@0
  1385
	asm("addne r2, r2, r3 ");			// r2 = (aVal & 0xf) + (aA - 10)
sl@0
  1386
	asm("movs r0, r0, lsr #4 ");		// aVal>>=4, V unaffected
sl@0
  1387
	asm("strvsh r2, [ip, #-2]! ");		// if aA bit 8 set, store 16 bits
sl@0
  1388
	asm("strvcb r2, [ip, #-1]! ");		// else store 8 bits
sl@0
  1389
	asm("bne 2b ");						// loop back if aVal still nonzero
sl@0
  1390
	asm("ldr r2, [sp] ");				// r2 = &aDest
sl@0
  1391
	asm("sub r0, r1, ip ");				// return aDest - ip
sl@0
  1392
	asm("str ip, [r2] ");				// aDest = ip
sl@0
  1393
	__JUMP(,lr);
sl@0
  1394
sl@0
  1395
#ifndef __FIXED_POINT_64BIT_DIV10__
sl@0
  1396
sl@0
  1397
	asm("do_convert_dec64: ");			// As generic case, except can save one reg as radix known
sl@0
  1398
	asm("stmfd sp!, {r4-r6,lr} ");
sl@0
  1399
	asm("ldr r4, [ip] ");				// r4 = aDest
sl@0
  1400
	asm("mov r5, ip ");					// save &aDest
sl@0
  1401
	asm("mov r6, r3");					// save aA
sl@0
  1402
	asm("teq r1, #0 ");					// aVal > 0xffffffffu
sl@0
  1403
	asm("beq 2f ");
sl@0
  1404
	asm("1: ");
sl@0
  1405
	asm("mov r3, #0 ");
sl@0
  1406
	asm("mov r2, #10 ");				// r3:r2 = radix
sl@0
  1407
#ifndef __EABI__
sl@0
  1408
	asm("stmfd sp!, {r4-r6} ");			// push the registers that are scratched by UDiv01
sl@0
  1409
	asm(".extern UDiv01 ");
sl@0
  1410
	asm("bl UDiv01 ");					// do division, quotient->r5:r4, rem->r6:r3
sl@0
  1411
	asm("mov r0, r4");					// move to make regs same as EABI function
sl@0
  1412
	asm("mov r1, r5");
sl@0
  1413
	asm("mov r2, r3");
sl@0
  1414
	asm("mov r3, r6");
sl@0
  1415
	asm("ldmfd sp!, {r4-r6} ");			// pop the registers that are scratched by UDiv01
sl@0
  1416
#else //__EABI__
sl@0
  1417
	asm(".extern __aeabi_uldivmod ");
sl@0
  1418
	asm("bl __aeabi_uldivmod ");		// do division, quotient->r1:r0, rem->r3:r2
sl@0
  1419
#endif //__EABI__
sl@0
  1420
	asm("add r2, r2, #0x30 ");			// add '0' to remainder
sl@0
  1421
	asm("tst r6, #0x100 ");
sl@0
  1422
	asm("strneh r2, [r4, #-2]! ");		// *--r4 = (TUint16)r2
sl@0
  1423
	asm("streqb r2, [r4, #-1]! ");		// *--r4 = (TUint8)r2
sl@0
  1424
	asm("teq r1, #0 ");					// new aVal > 0xffffffffu
sl@0
  1425
	asm("bne 1b ");
sl@0
  1426
	asm("2: ");
sl@0
  1427
	asm("mov r2, r6 ");					// r2 = aA
sl@0
  1428
	asm("ldr r1, [r5] ");				// r1 = original aDest
sl@0
  1429
	asm("mov r3, r5 ");					// r3 = &aDest
sl@0
  1430
	asm("sub r6, r1, r4 ");				// r6 = original aDest - r4
sl@0
  1431
	asm("mov r1, #10 ");				// r1 = radix
sl@0
  1432
	asm("str r4, [r3] ");				// aDest = r4
sl@0
  1433
	asm("mov ip, r4 ");					// ip = aDest
sl@0
  1434
	asm("bl do_convert_dec ");
sl@0
  1435
	asm("add r0, r0, r6 ");				// r0 += r6
sl@0
  1436
	__POPRET("r4-r6,");
sl@0
  1437
sl@0
  1438
#else //__FIXED_POINT_64BIT_DIV10__
sl@0
  1439
sl@0
  1440
	asm("do_convert_dec64: ");			// Be extra cunning by doing fixed-point arithmetic using only shifts, adds and subtracts
sl@0
  1441
	asm("stmfd sp!, {r4-r7,lr} ");		//  - avoids costs of potentially inefficient calls to __aeabi_uldivmod
sl@0
  1442
	asm("mov r4, r3 ");					// r4 = aA
sl@0
  1443
	asm("ldr r5, [ip] ");				// r5 = aDest
sl@0
  1444
	asm("teq r1, #0 ");					// aVal > 0xffffffffu
sl@0
  1445
	asm("beq 2f ");
sl@0
  1446
	asm("1: ");
sl@0
  1447
	asm("subs r2, r0, #10 ");			// divide aVal by 10, r1:r0=quotient, r3:r2=remainder
sl@0
  1448
	asm("sbc r3, r1, #0 ");
sl@0
  1449
	asm("mov r6, r0, lsr #2 ");			// NB: 0.8 rounded to 64 bits is:
sl@0
  1450
	asm("orr r6, r6, r1, lsl #30 ");	// 		0.11001100110011001100110011001100110011001100110011001100110011
sl@0
  1451
	asm("subs r0, r0, r6 ");
sl@0
  1452
	asm("sbc r1, r1, r1, lsr #2 ");		// quotient -= quotient >> 2	(0.11)
sl@0
  1453
	asm("mov r6, r0, lsr #4 ");
sl@0
  1454
	asm("orr r6, r6, r1, lsl #28 ");
sl@0
  1455
	asm("adds r0, r0, r6 ");
sl@0
  1456
	asm("adc r1, r1, r1, lsr #4 ");		// quotient += quotient >> 4	(0.110011)
sl@0
  1457
	asm("mov r6, r0, lsr #8 ");
sl@0
  1458
	asm("orr r6, r6, r1, lsl #24 ");
sl@0
  1459
	asm("adds r0, r0, r6 ");
sl@0
  1460
	asm("adc r1, r1, r1, lsr #8 ");		// quotient += quotient >> 8	(0.11001100110011)
sl@0
  1461
	asm("mov r6, r0, lsr #16 ");
sl@0
  1462
	asm("orr r6, r6, r1, lsl #16 ");
sl@0
  1463
	asm("adds r0, r0, r6 ");
sl@0
  1464
	asm("adc r1, r1, r1, lsr #16 ");	// quotient += quotient >> 16	(0.110011001100110011001100110011)
sl@0
  1465
	asm("adds r0, r0, r1 ");
sl@0
  1466
	asm("adc r1, r1, #0 ");				// quotient += quotient >> 32	(0.11001100110011001100110011001100110011001100110011001100110011)
sl@0
  1467
	asm("mov r0, r0, lsr #3 ");
sl@0
  1468
	asm("orr r0, r0, r1, lsl #29 ");
sl@0
  1469
	asm("mov r1, r1, lsr #3 ");			// quotient >>= 3		0.1 ==	(0.00011001100110011001100110011001100110011001100110011001100110011)
sl@0
  1470
	asm("mov r7, r1, lsl #2 ");			// use r7:r6 as a temp
sl@0
  1471
	asm("orr r7, r7, r0, lsr #30 ");
sl@0
  1472
	asm("mov r6, r0, lsl #2 ");			// r7:r6 = quotient << 2 == 4 * |aVal/10|
sl@0
  1473
	asm("adds r6, r6, r0 ");
sl@0
  1474
	asm("adc r7, r7, r1 ");				// r7:r6 += quotient == 5 * |aVal/10|
sl@0
  1475
	asm("mov r7, r7, lsl #1 ");
sl@0
  1476
	asm("orr r7, r7, r6, lsr #31 ");
sl@0
  1477
	asm("mov r6, r6, lsl #1 ");			// r7:r6 <<= 1 == 10 * |aVal/10|
sl@0
  1478
	asm("subs r2, r2, r6 ");
sl@0
  1479
	asm("sbcs r3, r3, r7 ");			// r3:r2 = aVal - (10 * |aVal/10|) == remainder
sl@0
  1480
	asm("bpl fix_quotient ");
sl@0
  1481
	asm("adds r2, r2, #10 ");
sl@0
  1482
	asm("adc r3, r3, #0 ");				// fix remainder
sl@0
  1483
	asm("b fix_end ");
sl@0
  1484
	asm("fix_quotient: ");
sl@0
  1485
	asm("adds r0, r0, #1 ");
sl@0
  1486
	asm("adc r1, r1, #0 ");				// increment quotient
sl@0
  1487
	asm("fix_end: ");
sl@0
  1488
	asm("add r2, r2, #0x30 ");			// add '0' to remainder
sl@0
  1489
	asm("tst r4, #0x100 ");				// test aA bit 8
sl@0
  1490
	asm("strneh r2, [r5, #-2]! ");		// if aA bit 8 set, store 16 bits
sl@0
  1491
	asm("streqb r2, [r5, #-1]! ");		// else store 8 bits
sl@0
  1492
	asm("teq r1, #0 ");
sl@0
  1493
	asm("bne 1b ");						// loop back if new aVal > 0xffffffffu
sl@0
  1494
	asm("2: ");
sl@0
  1495
	asm("mov r2, r4 ");					// r2 = aA
sl@0
  1496
	asm("ldr r1, [ip] ");				// r1 = original aDest
sl@0
  1497
	asm("mov r3, ip ");					// r3 = &aDest
sl@0
  1498
	asm("sub r6, r1, r5 ");				// r6 = original aDest - r5
sl@0
  1499
	asm("str r5, [r3] ");				// aDest = r5
sl@0
  1500
	asm("mov r1, #10 ");				// r1 = radix
sl@0
  1501
	asm("mov ip, r5 ");					// ip = aDest
sl@0
  1502
	asm("bl do_convert_dec ");
sl@0
  1503
	asm("add r0, r0, r6 ");				// r0 += r6
sl@0
  1504
	__POPRET("r4-r7,");
sl@0
  1505
sl@0
  1506
#endif //__FIXED_POINT_64BIT_DIV10__
sl@0
  1507
sl@0
  1508
	}
sl@0
  1509
sl@0
  1510
#endif //__DES_MACHINE_CODED__